JPH02184823A - Active matrix type liquid crystal display device - Google Patents

Active matrix type liquid crystal display device

Info

Publication number
JPH02184823A
JPH02184823A JP1004275A JP427589A JPH02184823A JP H02184823 A JPH02184823 A JP H02184823A JP 1004275 A JP1004275 A JP 1004275A JP 427589 A JP427589 A JP 427589A JP H02184823 A JPH02184823 A JP H02184823A
Authority
JP
Japan
Prior art keywords
liquid crystal
capacity
parallel
pixel electrode
scan bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1004275A
Other languages
Japanese (ja)
Inventor
Michiya Oura
大浦 道也
Tetsuya Kobayashi
哲也 小林
Tetsuya Hamada
哲也 濱田
Kazuhiro Takahara
高原 和博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1004275A priority Critical patent/JPH02184823A/en
Publication of JPH02184823A publication Critical patent/JPH02184823A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To form the additive capacity to be connected in parallel with the capacity of a liquid crystal cell without complicating production processes by adopting the disposition in which one end of picture element electrodes and one end of the adjacent scan bus lines facing thereto are formed as comb-tooth patterns and the comb-tooth parts of both are meshed with each other so as to face each other in parallel. CONSTITUTION:The opposite parts of both the respective picture element electrodes E and the adjacent scan bus lines SB' are formed as the comb-tooth-shaped 11, 12 patterns and are disposed to face each other in parallel in such a manner that the projecting parts on one side are positioned in the recesses of the other. The length of the opposite sides of the picture element electrodes E and the scan bus lines SB' is extremely long at this time and since both are in proximity to each other, a large capacity is formed between the picture element and the adjacent scan bus line SB'. The greater part between one frame of all the scan bus lines is in a non-selection state and since the potential at the time of the non-selection is constant, the capacity acts as the additive capacity C3 connected in parallel to the liquid crystal cell capacity CLC. The additive capacity C3 is formed in this way by the simplified production processes.

Description

【発明の詳細な説明】 〔概 要〕 高画質・高信頬性を達成できるアクティブマトリクス型
液晶表示装置に関し、 液晶セルの容量と並列に接続する付加容量を、製造工程
を複雑化することなく形成できるようにすることを目的
とし、 複数個の画素電極と該各画素電極に対応付けられたスイ
ッチング素子とをマトリクス状に配置するとともに、該
画素電極の各行対応に当該行を選択するためのスキャン
バスラインを設けたアクティブマトリクス構成において
、 前記各画素電極の一端部とこれに対向する隣接行対応の
スキャンバスラインの一例端部をともに櫛の歯状パター
ンとし、両方の櫛の歯部分を噛み合わせた配置とした構
成とする。
[Detailed Description of the Invention] [Summary] Regarding an active matrix liquid crystal display device that can achieve high image quality and high reliability, an additional capacitance connected in parallel with the capacitance of a liquid crystal cell can be added without complicating the manufacturing process. A plurality of pixel electrodes and switching elements associated with each pixel electrode are arranged in a matrix, and a plurality of pixel electrodes and a switching element corresponding to each pixel electrode are arranged in a matrix, and a switch is provided for selecting the row corresponding to each row of the pixel electrode. In an active matrix configuration in which a scan canvas line is provided, one end of each pixel electrode and an example end of the scan canvas line corresponding to an adjacent row opposite thereto are both formed into a comb tooth pattern, and the tooth portions of both combs are formed into a comb tooth pattern. The configuration is an interlocking arrangement.

〔産業上の利用分野〕[Industrial application field]

本発明は高画質・高信頼性を達成できるアクティブマト
リクス型液晶表示装置に関する。
The present invention relates to an active matrix liquid crystal display device that can achieve high image quality and high reliability.

液晶表示装置は、消費電力が少なく、軽量、カラー表示
が容易などの特徴を有することから、ボゲットTVやO
A端末機器等の平面表示装置として広範な市場を得つつ
あり、特に大容量で鮮明な階調表示が得られる薄膜トラ
ンジスタ駆動のアクティブマトリクス型液晶表示装置は
、一部実用化されるとともに、現在盛んに開発・研究が
進められ、より一層の高画質化、高信鎖性化が図られて
いる。しかし現状においては温度上昇或いは製作時の汚
染などにより、液晶の抵抗が減少して表示品質が劣化す
る。そのため液晶抵抗が減少しても表示品質が劣化しな
い液晶表示装置の出現が強く要望されている。
Liquid crystal display devices have the characteristics of low power consumption, light weight, and easy color display, so they are widely used in TVs and TVs.
A: Active matrix type liquid crystal display devices driven by thin film transistors, which have a large capacity and can provide clear gradation displays, are gaining a wide market as flat display devices for terminal equipment, etc., and are currently in widespread use, with some of them being put into practical use. Development and research is progressing to further improve image quality and reliability. However, at present, due to temperature rise or contamination during manufacturing, the resistance of the liquid crystal decreases and the display quality deteriorates. Therefore, there is a strong demand for a liquid crystal display device in which the display quality does not deteriorate even if the liquid crystal resistance decreases.

〔従来の技術〕[Conventional technology]

従来のアクティブマトリクス型液晶表示装置は、第3図
の等価回路図に示すように、薄膜トランジスタ(TPT
)1をスイッチング素子として用い、選択時には液晶セ
ルLCにデータ電圧を書込み、非選択時は上記液晶セル
の静電容量(以後これを単にセル容量と称する)etc
により電位を保つ。
A conventional active matrix liquid crystal display device uses thin film transistors (TPTs) as shown in the equivalent circuit diagram of FIG.
)1 is used as a switching element, and when selected, data voltage is written to the liquid crystal cell LC, and when not selected, the capacitance of the liquid crystal cell (hereinafter simply referred to as cell capacitance) etc.
The potential is maintained by

この液晶セルの抵抗成分(これを液晶抵抗と称する)R
tcが減少すると、セル容I CL Cとの積で定まる
時定数が小さくなり、液晶セルLCにかかる電圧のリー
クによる低下が著しくなって、輝度が低下するという問
題がある。
The resistance component of this liquid crystal cell (this is called liquid crystal resistance) R
When tc decreases, the time constant determined by its product with the cell capacity I CL C decreases, causing a problem in that the voltage applied to the liquid crystal cell LC decreases significantly due to leakage, resulting in a decrease in brightness.

〔発明が解決しようとする課題] そこで第4図(a)、 (b)に示すように、画素電極
Eの一部と隣接行のスキャンバスラインSB”を絶縁膜
2を挟んで対向させることにより静電容量を形成し、こ
れを付加容量C8としてセル容ffi Ct cに並列
に接続したものが考案されている。なお同図の(b)は
(a)のB−B矢視部断面図である。
[Problems to be Solved by the Invention] Therefore, as shown in FIGS. 4(a) and 4(b), a part of the pixel electrode E and the scan canvas line SB" in the adjacent row are made to face each other with the insulating film 2 in between. It has been devised that an electrostatic capacitance is formed by connecting this as an additional capacitance C8 in parallel to the cell capacitance ffi Ct c.(b) in the same figure is a cross section taken along the line B-B in (a). It is a diagram.

上記第4図(a)、 (b)のように付加容量C5を設
けた場合の等価回路を第5図に示す。
FIG. 5 shows an equivalent circuit when the additional capacitor C5 is provided as shown in FIGS. 4(a) and 4(b) above.

このようにしたことにより容量成分がセル容量CtCと
付加容量C8との和に増大するので、時定数がRLCX
 (CLC+ Cs )と大きくなり、液晶抵抗RLC
が多少低下しても、液晶セルLCにかかる電圧のリーク
による低下は抑制され、表示に対する悪影響が小さくな
る。
By doing this, the capacitance component increases to the sum of the cell capacitance CtC and the additional capacitance C8, so that the time constant RLCX
(CLC+Cs) becomes large, and the liquid crystal resistance RLC
Even if the voltage decreases to some extent, the decrease in voltage applied to the liquid crystal cell LC due to leakage is suppressed, and the adverse effect on display is reduced.

しかしこの構造では、各画素電極Eは隣接するスキャン
バスラインSB’ と重なり合うため、製造工程が複雑
となり、製造歩留りが低下するという問題がある。
However, in this structure, since each pixel electrode E overlaps the adjacent scan canvas line SB', there is a problem that the manufacturing process is complicated and the manufacturing yield is lowered.

そこで本発明は、液晶セルの容量と並列に接続する付加
容量を、製造工程を複雑化することなく形成できるよう
にすることを目的とする。
Therefore, an object of the present invention is to enable formation of an additional capacitor connected in parallel with the capacitor of a liquid crystal cell without complicating the manufacturing process.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、画素電極の一端部と、これに対向する隣接ス
キャンバスラインの一端部を、ともに櫛の歯状パターン
として、この両者の櫛の歯部分を噛み合わせた互いに平
行に対向する配置とした。
In the present invention, one end of a pixel electrode and one end of an adjacent scan canvas line opposite thereto are both formed into a comb tooth-like pattern, and the two comb tooth portions are interlocked and arranged to face each other in parallel. did.

〔作 用〕[For production]

上記構成としたことにより、画素電極と隣接スキャンバ
スラインの対向する辺の長さが非常に長くなる。この両
者は近接しているので、画素電極と隣接スキャンバスラ
インの間に大きな容量が形成される。スキャンバスライ
ンはいずれも、1フレームの間の大部分は非選択の状態
であり、非選択時の電位は一定であるので、上記容量は
液晶セル容Mt Ct cに並列に接続された付加容量
C5として働く。
With the above configuration, the length of the opposing sides of the pixel electrode and the adjacent scan canvas line becomes extremely long. Since the two are close to each other, a large capacitance is formed between the pixel electrode and the adjacent scan canvas line. Most of the scan canvas lines are in a non-selected state during one frame, and the potential when non-selected is constant, so the above capacitance is an additional capacitor connected in parallel to the liquid crystal cell volume Mt Ct c. Works as C5.

本発明の付加容1csを形成するには、画素電極および
スキャンバスラインをパターニングする工程で、使用す
るマスクパターンを一部変更するのみでよく、製造工程
そのものは何ら変える必要はない。従って、本発明を実
施するに際し、製造工程上は何の問題もなく、付加容量
C8を容易に形成できる。
To form the additional capacitor 1cs of the present invention, it is only necessary to partially change the mask pattern used in the step of patterning the pixel electrode and scan canvas line, and there is no need to change the manufacturing process itself. Therefore, when implementing the present invention, the additional capacitor C8 can be easily formed without any problems in the manufacturing process.

従って本発明は、液晶の抵抗が低下しても輝度の変化は
ごく僅かとなり、液晶表示装置の画質が劣化することを
防止できるとともに、上記構造としたことにより、画素
電極とスキャンバスラインとの交叉部分がなくなり、こ
の面からも製造歩留りが向上する。
Therefore, in the present invention, even if the resistance of the liquid crystal decreases, the change in brightness is negligible, and it is possible to prevent the image quality of the liquid crystal display device from deteriorating. There are no crossing parts, and the manufacturing yield is improved from this point of view as well.

〔実 施 例〕 以下本発明の一実施例を第1図および第2図により説明
する。
[Embodiment] An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は本実施例の1画素分を示す図で、画素電極Eは
当該画素を駆動する薄膜トランジスタ1は、制御電極(
ゲート電極)GをスキャンバスラインSBに、2つの被
制御電極(ドレイン電極。
FIG. 1 is a diagram showing one pixel of this embodiment, where the pixel electrode E is the thin film transistor 1 that drives the pixel, and the control electrode (
Gate electrode) G to scan canvas line SB, and two controlled electrodes (drain electrode).

ソース電極)の一方3をデータバスラインDBに、他方
4を画素電極已に接続している。
One side 3 of the source electrodes is connected to the data bus line DB, and the other side 4 is connected to the pixel electrode.

このように構成された多数の画素が、一つのガラス基板
(図示せず)上にマトリクス状に配置されて、TPT基
板を構成する。
A large number of pixels configured in this manner are arranged in a matrix on one glass substrate (not shown) to constitute a TPT substrate.

TPT基板は対向配置された今一つのガラス基板(対向
基板)との間に液晶を挟持して、液晶表示パネルを構成
する。
A liquid crystal display panel is constructed by sandwiching liquid crystal between the TPT substrate and another glass substrate (counter substrate) placed opposite to each other.

対向基板上に透明電極による対向電極が形成されている
。従って、各画素電極Eは液晶を挟んで対向電極と向か
い合い、平行平板コンデンサを形成する。この容量が液
晶セル容Ietcを形成する。
A counter electrode made of a transparent electrode is formed on the counter substrate. Therefore, each pixel electrode E faces a counter electrode with the liquid crystal interposed therebetween, forming a parallel plate capacitor. This capacitance forms the liquid crystal cell volume Ietc.

以上の従来構造に加えて本実施例は、各画素電極E及び
隣接するスキャンバスラインSB“ともに、相対する部
分を櫛の歯状のパターンとし、−方の凸部が他方の凹部
に位置するよう平行に対向させ、両方の櫛の歯部状パタ
ーンを互いに噛み合わせた配置とする。
In addition to the above-mentioned conventional structure, in this embodiment, each pixel electrode E and the adjacent scan canvas line SB have a comb tooth-like pattern in their opposing parts, and the convex part on the - side is located in the concave part on the other side. The combs are arranged so that they face each other parallel to each other, and the tooth patterns of both combs are interlocked with each other.

このように櫛の歯部分lL12を互いに平行に対向させ
たことにより、画素型iEと隣接スキャンバスラインS
B’ とが近接して平行する距離がきわめて大となり、
この部分で大きな静電容量を形成することができる。
By arranging the comb tooth parts lL12 to face each other in parallel, the pixel type iE and the adjacent scan canvas line S
The distance between B' and B' is extremely large, and
A large capacitance can be formed in this portion.

因みに、櫛の歯部分11.12の寸法を、長さが約10
0μm9幅および間隔をともに約2μm、画素電極の大
きさを約300μm X 300μmとした場合、約0
.5pFの付加容量C5を得ることができる。
By the way, the length of the tooth part 11.12 of the comb is about 10
0μm9 When both the width and the interval are approximately 2μm, and the size of the pixel electrode is approximately 300μm x 300μm, approximately 0
.. An additional capacitance C5 of 5 pF can be obtained.

このように0.5pF程度の付加容量C3を設けた場合
には、第2図の曲線Aで示すように、凡そ0.4pFの
セル容量CLcのみの場合〔同図の曲線B〕に比較して
、液晶セルにかかる実効電圧即ち画素電極Eと対向電極
間の電圧の1フレーム内の実効値が大幅に増大する。な
お、同図の横軸は液晶の抵抗率〔Ωcm〕、縦軸は液晶
にかかる実効電圧のデータ電圧に対する比率である。
When an additional capacitance C3 of about 0.5 pF is provided in this way, as shown by curve A in Fig. 2, compared to the case where only the cell capacitance CLc is about 0.4 pF [curve B in the same figure]. Therefore, the effective voltage applied to the liquid crystal cell, that is, the effective value of the voltage between the pixel electrode E and the counter electrode within one frame increases significantly. Note that the horizontal axis in the figure represents the resistivity [Ωcm] of the liquid crystal, and the vertical axis represents the ratio of the effective voltage applied to the liquid crystal to the data voltage.

このように本実施例では、液晶の抵抗率が減少しても実
効値の低下は少なくなり、従って輝度の低下も少なくな
り、画質の劣化を低減できる。しかも本実施例のアクテ
ィブマトリクス型液晶表示装置を製造するに際しては、
製造工程で使用するマスクパターンを一部変更するのみ
でよく、製造工程そのものは何ら変える必要はない。従
って本実施例の製造には何の困難もない。更に、本実施
例ではパスラインと画素電極との重なりがないので、段
差に起因する短絡等の不良発生もなく、これらがあいま
って製造歩留りおよび信頼性が向上する。
In this manner, in this embodiment, even if the resistivity of the liquid crystal decreases, the effective value decreases less, and therefore the brightness decreases less, thereby reducing deterioration in image quality. Moreover, when manufacturing the active matrix liquid crystal display device of this example,
It is only necessary to partially change the mask pattern used in the manufacturing process, and there is no need to change the manufacturing process itself. Therefore, there is no difficulty in manufacturing this embodiment. Furthermore, in this embodiment, since there is no overlap between the pass line and the pixel electrode, there is no occurrence of defects such as short circuits due to differences in level, and these factors combine to improve manufacturing yield and reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例構成説明図、第2図は上記一
実施例の効果説明図、 第3図は従来の液晶セル1画素分の等価回路図、第4図
(a)、 (b)は従来の付加容量の構造説明図、第5
図は付加容量を設けた場合の等価回路図である。 図において、1は薄膜トランジスタ、Eは画素電極、S
Bはスキャンバスライン、SB’ は隣接スキャンバス
ライン、DBはデータバスライン、CLCは液晶セル容
量、C3は付加容量、RLcは液晶抵抗を示す。 〔発明の効果〕 以上説明したように、本発明によれば簡単化された製造
工程で付加容量を形成することができ、画質の劣化防止
、製造歩留りおよび信頼性の向上が可能となる。 ゲート1【6に 不発呵め一突廷例精へ銭朝酊 第1図 RLe :涛品爪抗 cLc:  3f(+シ記ル滲量 む/157を品宅1しT!−1りに11116回を1第
3図 シ覧晶1zか月突H燵/企−7電圧 庭創住如容量め講遣ぽ廚酊 第4図
Fig. 1 is an explanatory diagram of the configuration of one embodiment of the present invention, Fig. 2 is an explanatory diagram of the effect of the above embodiment, Fig. 3 is an equivalent circuit diagram for one pixel of a conventional liquid crystal cell, Fig. 4 (a), (b) is an explanatory diagram of the structure of the conventional additional capacitor, No. 5
The figure is an equivalent circuit diagram when additional capacitance is provided. In the figure, 1 is a thin film transistor, E is a pixel electrode, and S
B is a scan canvas line, SB' is an adjacent scan canvas line, DB is a data bus line, CLC is a liquid crystal cell capacitance, C3 is an additional capacitance, and RLc is a liquid crystal resistance. [Effects of the Invention] As described above, according to the present invention, an additional capacitor can be formed through a simplified manufacturing process, and it is possible to prevent deterioration of image quality and improve manufacturing yield and reliability. Gate 1 [Unexploded at 6, Ichitutei Reisei to Qiancho drunkenness Figure 1 RLe: 涛品马性cLc: 3f(+Shikiru oomumu/157 to T!-1 R) Figure 4

Claims (1)

【特許請求の範囲】 複数個の画素電極(E)と該各画素電極に対応付けられ
たスイッチング素子(1)とをマトリクス状に配置する
とともに、該画素電極(E)の各行対応に当該行を選択
するためのスキャンバスライン(SB、SB’)を設け
たアクティブマトリクス構成において、 前記各画素電極(E)の一端部とこれに対向する隣接行
対応のスキャンバスライン(SB’)の一側端部をとも
に櫛の歯状パターンとし、両方の櫛の歯(11、12)
を互いに噛み合わせた配置としたことを特徴とするアク
ティブマトリクス型液晶表示装置。
[Claims] A plurality of pixel electrodes (E) and switching elements (1) associated with each pixel electrode are arranged in a matrix, and a switching element (1) corresponding to each row of the pixel electrode (E) is arranged in a matrix. In an active matrix configuration in which scan canvas lines (SB, SB') are provided for selecting the pixels, one end of each pixel electrode (E) and one scan canvas line (SB') corresponding to the adjacent row facing thereto. Both side edges have a comb tooth pattern, and both comb teeth (11, 12)
An active matrix liquid crystal display device characterized by an arrangement in which the two are interlocked with each other.
JP1004275A 1989-01-10 1989-01-10 Active matrix type liquid crystal display device Pending JPH02184823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1004275A JPH02184823A (en) 1989-01-10 1989-01-10 Active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1004275A JPH02184823A (en) 1989-01-10 1989-01-10 Active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH02184823A true JPH02184823A (en) 1990-07-19

Family

ID=11579990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1004275A Pending JPH02184823A (en) 1989-01-10 1989-01-10 Active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH02184823A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5098633A (en) * 1990-03-19 1992-03-24 Illinois Tool Works Inc. Backlit button by thermoformed cap process
EP0916992A2 (en) * 1992-09-18 1999-05-19 Hitachi, Ltd. A liquid crystal display device
US5960527A (en) * 1986-10-28 1999-10-05 Rexam Industries Corp. Method of injection molding plastic automobile body parts with integral weatherable pigmented film surface
US5993719A (en) * 1994-09-08 1999-11-30 Idemitsu Petrochemical Co., Ltd. Method of producing a laminated molding
US6028650A (en) * 1996-07-19 2000-02-22 Nec Corporation Liquid crystal display apparatus with uniform feed-through voltage in panel

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5960527A (en) * 1986-10-28 1999-10-05 Rexam Industries Corp. Method of injection molding plastic automobile body parts with integral weatherable pigmented film surface
US5098633A (en) * 1990-03-19 1992-03-24 Illinois Tool Works Inc. Backlit button by thermoformed cap process
EP0916992A2 (en) * 1992-09-18 1999-05-19 Hitachi, Ltd. A liquid crystal display device
EP0916992A3 (en) * 1992-09-18 1999-06-02 Hitachi, Ltd. A liquid crystal display device
US5993719A (en) * 1994-09-08 1999-11-30 Idemitsu Petrochemical Co., Ltd. Method of producing a laminated molding
US6028650A (en) * 1996-07-19 2000-02-22 Nec Corporation Liquid crystal display apparatus with uniform feed-through voltage in panel

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