JPH02180443A - Parity error detection system - Google Patents

Parity error detection system

Info

Publication number
JPH02180443A
JPH02180443A JP63333735A JP33373588A JPH02180443A JP H02180443 A JPH02180443 A JP H02180443A JP 63333735 A JP63333735 A JP 63333735A JP 33373588 A JP33373588 A JP 33373588A JP H02180443 A JPH02180443 A JP H02180443A
Authority
JP
Japan
Prior art keywords
signal
descramble
patterns
circuit
parity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63333735A
Inventor
Naoto Kubo
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP63333735A priority Critical patent/JPH02180443A/en
Publication of JPH02180443A publication Critical patent/JPH02180443A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To execute descrambling in one descrambling circuit without switching scramble patterns at a reception side by generating any descramble patterns, which correspond to plural types of scramble patterns at a transmission side and respectively have the same number of '1' in a parity interval.
CONSTITUTION: In an intermediate repeater station 1, after a received signal a+s is demodulated in a demodulator 2, the frame synchronization of the signal a+s is obtained in a frame synchronizing circuit 3. The signal a+s from the frame synchronizing circuit 3 to reach a modulator 4 is modulated and after that sent to the station of the succeeding stage. Since descramble patterns d1 and d2 are set so that both d1 and d2 can have the same number of '1' in the same parity interval, regardless of the coincidence/noncoincidence between a scramble pattern (s) of the signal a+s sent from the transmission side and the descramble pattern d1, a descramble circuit 5 outputs a signal (b) having the same parity number as that of data (a). Consequently, accurate interval parity counting can be executed only by equipping the station 1 with one descrambling circuit 5.
COPYRIGHT: (C)1990,JPO&Japio
JP63333735A 1988-12-29 1988-12-29 Parity error detection system Pending JPH02180443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63333735A JPH02180443A (en) 1988-12-29 1988-12-29 Parity error detection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63333735A JPH02180443A (en) 1988-12-29 1988-12-29 Parity error detection system

Publications (1)

Publication Number Publication Date
JPH02180443A true JPH02180443A (en) 1990-07-13

Family

ID=18269368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63333735A Pending JPH02180443A (en) 1988-12-29 1988-12-29 Parity error detection system

Country Status (1)

Country Link
JP (1) JPH02180443A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006525565A (en) * 2003-05-02 2006-11-09 ピルツ ゲーエムベーハー アンド コー.カーゲー Method and apparatus for controlling safety-critical processes

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006525565A (en) * 2003-05-02 2006-11-09 ピルツ ゲーエムベーハー アンド コー.カーゲー Method and apparatus for controlling safety-critical processes
US7715932B2 (en) 2003-05-02 2010-05-11 Pilz Gmbh & Co. Method and apparatus for controlling a safety-critical process
JP4691490B2 (en) * 2003-05-02 2011-06-01 ピルツ ゲーエムベーハー アンド コー.カーゲー Method and apparatus for controlling safety-critical processes

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