JPH02177621A - Transmission/reception circuit - Google Patents

Abstract

PURPOSE:To attain reception even when one side of a balanced type transmission line is opened by connecting an impedance converting means, which lowers an impedance in a side near the transmission line of a capacitor when the transmission line is turned to an open state, to the input side of the capacitor. CONSTITUTION:The impedance converting means is composed of a switching circuit 5, abnormal voltage detection circuit 7, switching circuit 6 and abnormal voltage detection circuit 8. When one side of the transmission line is turned to the open state, the impedance in the transmission line side of the capacitor direct current component cut of a reception circuit 2 is lowered by the impedance converting means and the transmission line in the open state is turned to an almost short-circuit state. On the other hand, even when one side of the transmission line is short-circuited, the reception circuit 2 can execute the reception. Thus, the reception circuit 2 can execute the reception even when one side of the transmission line is turned to the open state.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a receiving circuit connected to a transmission circuit of a data transmission system that requires high reliability.

(Prior Art) In an electrical serial data communication system between multiple electronic units, failures in the transmission medium (hereinafter referred to as transmission lines), such as disconnection of the connector terminal of the transmission line or disconnection of the transmission line to the ground or power supply voltage, can occur. If a whiteout occurs, all units communicating via that transmission line will be unable to transmit to each other. Therefore, depending on the amount of data to be communicated, transmission may be possible even in such cases. It is necessary to design a highly reliable transmission system that achieves this.

Conventionally, there is a receiving circuit shown in FIG. 4 that is connected to a transmission path of a highly reliable transmission system and receives signals. The transmission lines A and B of the transmission system are twisted pair wires or similar balanced communication transmission lines, and as shown in FIG. 5, waveforms with opposite polarities are transmitted to the respective transmission lines A and B. These transmission lines A and B are connected to the power supply v via capacitors CI and C2 that cut the DC component of the receiving circuit 2.
Resistor R1 and diode DI connected between cc and ground
and a resistor R2.

When there is no signal input to the transmission lines A and B, the forward voltage of the diode DI of the receiving circuit 1 is ■r,
When a digital signal is input to the transmission lines A and B, the diode D1 becomes reverse biased, and the magnitude of the voltage at the input point J of the comparator 3 is reversed, as shown in FIG. A signal P appears. and,
For example, if transmission line A is shorted to ground on one side of the transmission line, the waveforms of transmission lines A and B will be as shown in Figure 7.
The voltage at the point on the transmission line A is fixed at a constant potential, but
The voltage at point J is reversed as shown in FIG. 8, and as a result, signal P appears at the output terminal of comparator 3, allowing transmission.

(Problem H to be Solved by the Invention) However, in the above-mentioned conventional receiving circuit, if one side of the transmission line is opened, for example, if the part indicated by the symbol S of the transmission line A in FIG. Unlike in the case of a short circuit, the impedance at point K is high.As a result, when a signal is input, the forward voltage of diode DI decreases and the diode D1 turns off, but as shown in Figure 9, the impedance at point K is high. is not fixed at that potential and is pulled by the resistor R2, causing the potential to drop.As a result, the diode D
The voltages at the five points on both ends of I do not cross, and no signal appears at the output terminal of the comparator 3, making it impossible to receive it. Therefore, depending on the quality and quantity of data to be communicated, it is necessary to design a highly reliable transmission system that allows transmission even in the above-mentioned cases.

The present invention has been made in view of the above points, and an object of the present invention is to provide a transmission/reception circuit that can receive signals even when one side of a balanced transmission line such as a twisted pair wire becomes an oven.

(Means for Solving the Problems) In order to achieve the above object, according to the present invention, a capacitor for cutting a DC component is provided on the input side of a transmission circuit of an electrical serial data communication system using a balanced transmission line. In a transmission receiving circuit that connects a receiving circuit that can receive signals even if one side of the transmission line is short-circuited to ground, the capacitor is connected to the input side of the capacitor. The structure is such that impedance conversion means is connected to lower the impedance on the side closer to the transmission line.

(Function) When one side of the transmission line is in an oven state, the impedance conversion means lowers the impedance of the receiving circuit's DC component cant capacitor on the transmission line side, and the transmission line in the oven state is Put it into a roughly seated position.

On the other hand, the receiving circuit is capable of receiving signals even when one side of the transmission line is short-circuited, and therefore, the receiving circuit is capable of receiving signals even when one side of the transmission line is in an oven state.

(Example) An embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

Note that circuit elements that are the same as those in FIG. 4 are given the same reference numerals.

In FIG. 1, the base of the transistor Tri of the transmitting circuit 1 of the electronic unit is connected to the input terminal 1a through the resistor R9 and the inverter IN, the emitter is connected to the power supply Vcc, and the base of the transistor Tr2 is connected to the input terminal through the resistor RIO. At terminal 1a, the emitter is connected to ground.

Furthermore, the collectors of these transistors Tri are connected to the output terminal IC, and the collectors of the transistors Tr2 are connected to the output terminal 1.
connected to b.

One end of each of the transmission lines A and B of the transmission line 4 is connected to the output terminals 1c and 1b of the transmitting circuit 1, respectively, and the other end thereof is connected to the input terminals 2a and 2b of the receiving circuit 2. Transmission line A is grounded via bias resistor R7, and transmission line B is connected to power supply Vcc via bias resistor R8.

The receiving circuit 2 is capable of receiving signals even when one side of the transmission line is short-circuited, and compares and outputs the variation of the differential voltage between the transmission lines A and B from the time of no signal as the dark value of the voltage, and outputs the digital signal P. It is equipped with a comparator 3 that converts and outputs the
One input terminal (-) of the comparator 3 is connected to the input terminal 2a via a DC component cut capacitor C1 and a resistor R3, and the other input terminal (+) is connected to a DC component cut capacitor C2 and a resistor R4. It is connected to the input terminal 2b via the input terminal 2b. A voltage divider circuit consisting of a resistor R1, a diode D1, and a resistor R2 is connected between the power supply Vcc and the ground, and one input terminal (-) of the comparator 3 is connected to the resistor R1.
The other input terminal (
+) is connected to the connection point K between the diode D1 and the resistor R2.

The connection point a between the capacitor CI and the resistor R3 is connected to the voltage 11iVcc via the switch circuit 5, and the connection point a between the capacitor C2 and the resistor R
The connection point with 4 is connected to ground via a switch circuit 6. Further, the input side of the resistor R3 is connected to the t source Vcc via the abnormal voltage detection circuit 7, and is also connected to the ground via the resistor R5, and the input end of the resistor R4 is connected to the ground via the abnormal voltage detection circuit 8. It is also connected to the power supply Vcc via a resistor R6.

The switch circuit 5.6 is used to short-circuit connection points a and b to a fixed voltage AC or DC, and the abnormal voltage detection circuit 7.8 detects when the voltage of the transmission lines A and B exceeds a predetermined voltage. When this happens, it is detected and the switch circuit 5.6 is closed. These switch circuits 5 and abnormal voltage detection circuits 7 and switch circuits 6 and abnormal voltage detection circuits 8
These constitute impedance conversion means.

The action will be explained below.

Typically, transmission lines A, B have a relatively low bias resistance R7,
R8 has a voltage close to the ground and power supply Vcc, respectively, and in such a case, the abnormal voltage detection circuit 7.8 does not operate, and the relatively high resistances R5 and R6 and the relatively low resistance R3
, R4 to the receiving circuit 2. Therefore,
The fifth circuit operates in the same manner as the receiving circuit 2 shown in FIG.
When a digital signal as shown in the figure is input to the transmission lines A and B, a digital signal P as shown in FIG. 6 is outputted from the comparator 3 of the receiving circuit 2.

Here, for example, if the point S of the transmission line A becomes open, the potential at the 0 point rises to near the power supply voltage Vce due to the resistor R6. As a result, the abnormal voltage detection circuit 8 is activated and the switch circuit 6 is closed. This results in
The subsequent operation of the receiving circuit 2 is similar to that when one side of the transmission line is short-circuited to the ground (FIGS. 7 and 8) as already explained in FIG. 4, and the receiving operation becomes possible. Transmission line B
The operation when the side is in the oven is also possible because the only difference is the polarity of the circuit.

FIG. 2 shows specific circuits 10 and 11 of the switch circuit 5 and the abnormal voltage detection circuit 7, and the switch circuit 6 and the abnormal voltage detection circuit 8 in the receiving circuit 2 shown in FIG.

In the circuit 10, the emitter of transistor Tr3 is connected to the voltage Vcc, and the collector is connected to the capacitor C.
3 to the capacitor C2 side of the resistor R3, and is connected to the ground via the resistor R11. A resistor R1 is connected between the input terminal 2a side of the resistor R3 and the power supply ■cc.
A voltage dividing circuit formed by resistors R12 and R13 is connected, and a connection point between these resistors R12 and R13 is connected to a transistor T.
It is connected to the base of transistor Tr3 and also to the collector of transistor Tr3 via capacitor C4. A switch circuit 5 is constituted by a transistor Tr3, capacitors C3 and C4, and a resistor RIQ, and a resistor R1
2 and R13 constitute an abnormal voltage detection circuit 7.

Similarly, in the circuit 11, the emitter of the transistor Tr4 is connected to ground, and the collector is connected to the capacitor C2 side of the resistor R4 via the capacitor C5, and to the power supply Vcc via the resistor R14. Resistance R
Resistors R15 and R are connected between the input terminal 2b side of 4 and the ground.
A voltage dividing circuit formed by the resistors R15 and R16 is connected to the transistor Tr4, and the connection point between the resistors R15 and R16 is connected to the base of the transistor Tr4 and to the collector via the capacitor C6. And transistor Tr4,
A switch circuit 6 is configured by capacitors C5 and C6 and a resistor R14, and an abnormal voltage detection circuit 8 is configured by resistors R15 and R16.

When the transmission line A is normally connected, the voltage of the transmission line A is low, and therefore the base current flows between the resistors R15 and R.
Transistor Tr4, which is given by the voltage division with 16, is off. Next, if the point S of transmission line A becomes open, 1ifiVc is applied through resistor R6.
A current flows from c to the base of the transistor Tr4, and the current S
Pig transistor Tr4 is turned on. As a result, the collector side (input side) of the transistor Tri of the capacitor C2
is shorted to ground, and the connection point is shorted to ground in an alternating current manner through capacitor C5.

On the other hand, when the voltage returns to normal from an abnormal value, capacitor C6 has the effect of keeping the connection point in an AC-like short state for a certain period of time, so that the transmission line A is intermittently in an oven state for a short period of time. Even when the normal state and normal state are repeated, the connection point is always kept in a short-circuit state to enable the receiving circuit 2 to receive data.

Furthermore, in FIG. 9, transmission lines A and B are connected to a conventional high-fidelity receiving circuit 2 via an emitter follower circuit that lowers impedance. In the figure, the base of the transistor Tr5 is connected to the input terminal 2a, the collector to the power supply Vcc, and the emitter to the ground via a resistor R17.One input terminal (-) of the comparator 3 is connected to the emitter via a capacitor C1. Connected. The base of the transistor Tr6 is connected to the input terminal 2b, the emitter is connected to the power supply Vcc via the resistor R18, the collector is connected to the ground, and the emitter is connected to the other input terminal (+) of the comparator 3 via the capacitor C2.

Normally, the emitter follower circuit transmits the transmitted waveform as it is, so the receiving circuit 2 operates as before. For example, if the transmission line A is exposed to the symbol S, the transistor Tr4 will be turned off, but the resistors 16 and 16 will be turned off.
Since the connection point M has a low impedance due to R17, the subsequent operation is the same as when one side of the transmission line is shorted to ground, and the receiving circuit 2 is enabled to receive data.

Note that the resistors R17 and R18 do not necessarily have to be resistors, and it is also possible to connect a constant current source, etc. In this way,
Even if one side of the transmission line is short-circuited to ground, it can receive data.It has a capacitor that cuts the DC component in front of the receiving circuit (input side), so even if one of the input terminals is open, the impedance will be low. By installing such an impedance conversion circuit, it is possible to realize a receiving circuit that can receive data even if the transmission line becomes an oven.

(Effects of the Invention) As explained above, according to the present invention, a capacitor for cutting a DC component is connected to the input side of a transmission circuit of an electrical serial data communication system using a balanced transmission line, and In a transmission receiving circuit that connects a receiving circuit that can receive signals even if one side of the transmission line is short-circuited to ground, the input end of the capacitor is connected to the side of the capacitor that is close to the transmission line when the transmission line is in an oven state. By connecting an impedance conversion means that lowers the impedance of the transmission line, even if one side of the transmission line of a balanced transmission line is open in many transmission systems, including transmission in automobiles, reception will not be impossible, and high This has the effect of making it possible to configure a transmission system with reliability.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the transmission/reception circuit according to the present invention, FIG. 2 is a specific circuit diagram of the switch circuit and abnormal voltage detection circuit of FIG. 1, and FIG. 3 is a transmission/reception circuit of the present invention. A circuit diagram showing another embodiment of the circuit, FIG. 4 is a conventional transmission/reception circuit diagram, FIGS. 5 and 6 are waveform diagrams of the transmission/reception circuit in FIG. 4 during normal operation, and FIGS. 7 and 8 9 and 9 are waveform diagrams when the transmission/reception circuit shown in FIG. 4 is abnormal. 1... Transmission circuit, 2... Receiving circuit, 3... Comparator, 4... Transmission line, 5.6... Switch circuit,
7.8...Abnormal voltage detection circuit.

Claims (1)

[Claims] A capacitor for cutting DC components is connected to the input side of the transmission circuit of an electrical serial data communication system using a balanced transmission line, and a reception circuit that can receive data even if one side of the transmission line is shorted to ground is provided. In the transmission/reception circuit to be connected, impedance conversion means is connected to the input side of the capacitor to lower the impedance of the capacitor on the side closer to the transmission line when the transmission line is in an open state. Transmission and reception circuit.