JPH02177103A - Writing circuit - Google Patents

Writing circuit

Info

Publication number
JPH02177103A
JPH02177103A JP33300288A JP33300288A JPH02177103A JP H02177103 A JPH02177103 A JP H02177103A JP 33300288 A JP33300288 A JP 33300288A JP 33300288 A JP33300288 A JP 33300288A JP H02177103 A JPH02177103 A JP H02177103A
Authority
JP
Japan
Prior art keywords
write
circuit
head coil
write signal
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33300288A
Other languages
Japanese (ja)
Other versions
JP2621969B2 (en
Inventor
Hideo Arai
荒井 英夫
Hideaki Hayashi
秀昭 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Gunma Ltd
Original Assignee
NEC Gunma Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Gunma Ltd filed Critical NEC Gunma Ltd
Priority to JP33300288A priority Critical patent/JP2621969B2/en
Publication of JPH02177103A publication Critical patent/JPH02177103A/en
Application granted granted Critical
Publication of JP2621969B2 publication Critical patent/JP2621969B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To give an appropriate damping characteristic irrespective of a variation of a write signal period by providing a variable resistance element which is connected in parallel to a fixed resistance element connected in series between both ends of a head coil and varies its resistance value in accordance with an output of a control circuit. CONSTITUTION:A head coil 1 is provided with a center tap, and provided on a magnetic head for executing write and read-out to and from a magnetic medium, and between both its ends, a damping resistance consisting of fixed resistances 2a, 2b connected in series is connected. To both ends of one fixed resistance 2b, a drain 3a and a source 3b of a field effect element (FET) 3 are connected in parallel, and also, a gate 3c of the FET 3 is connected to a control circuit 9. In this state, by using a variable resistance element consisting of this FET, etc., its resistance value is controlled in accordance with a period of a write signal. In such a way, by varying a damping resistance value of the head coil in accordance with a period of a write signal, an appropriate damping characteristic can be given.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、フロッピィディスク装置等における書き込み
回路に係り、特にダンピング特性を制御可能な書き込み
回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a write circuit in a floppy disk device or the like, and particularly to a write circuit whose damping characteristics can be controlled.

〔従来の技術〕[Conventional technology]

従来、フロッピィディスク装置等における磁気媒体に対
する書き込み回路においては、そのダンピング特性を制
御する手段として、書き込み用磁気ヘッドのコイルに並
列に固定抵抗を装備し、これによって書き込み回路に対
してダンピングを与えるようにしている。
Conventionally, in write circuits for magnetic media in floppy disk drives, etc., as a means of controlling the damping characteristics, a fixed resistor is installed in parallel with the coil of the write magnetic head, and this is used to apply damping to the write circuit. I have to.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

この種の書き込み回路におけるダンピング特性は、書き
込み信号周期によって変化するものであり、従って書き
込み信号周期に応じて最適なダンピング特性を与えるよ
うなダンピング特性制御回路が設けられる。
The damping characteristic in this type of write circuit changes depending on the write signal period, and therefore a damping characteristic control circuit is provided to provide an optimal damping characteristic depending on the write signal period.

しかしながら、上述した従来の書き込み回路におけるダ
ンピング特性は、磁気ヘッドのコイルのインダクタンス
分とこれに並列に接続された固定抵抗とによって定めら
れ、固定されたものとなっている。このため、書き込み
信号周期が変動してもダンピング特性を変化することが
できない。
However, the damping characteristics in the conventional write circuit described above are fixed and determined by the inductance of the coil of the magnetic head and a fixed resistor connected in parallel thereto. Therefore, even if the write signal cycle changes, the damping characteristics cannot be changed.

すなわち、書き込み回路における書き込み信号の周期に
よっては、磁気ヘッドコイルへの書き込み電流の立ち上
がり時間が長すぎたり、または減衰振動時間が長すぎた
りして、磁気媒体への正しい書き込みを行うことができ
ないという不都合があった。
In other words, depending on the period of the write signal in the write circuit, the rise time of the write current to the magnetic head coil may be too long, or the damping oscillation time may be too long, making it impossible to write correctly to the magnetic medium. There was an inconvenience.

(発明の目的〕 本発明は、かかる従来例の有する不都合を改善し、特に
、磁気ヘッドコイルに並列に接続される抵抗値を書き込
み信号周期に応じて変化させることによって、書き込み
信号周期の変化に拘わらず適切なダンピング特性を与え
ることができる書き込み回路を提供することを、その目
的とする。
(Object of the Invention) The present invention improves the disadvantages of the conventional example, and in particular, changes the resistance value connected in parallel to the magnetic head coil according to the write signal period, thereby responding to changes in the write signal period. The object is to provide a write circuit that can provide appropriate damping characteristics regardless of the situation.

〔課題を解決するための手段) 本発明の書き込み回路においては、ヘッドコイルを有す
る磁気ヘッドを介して磁気媒体に書き込みを行う書き込
み回路において、該ヘッドコイルの両端間に直列に接続
された固定抵抗素子と、書き込み信号を時定数回路を経
て積分した信号を一定閾値によって識別して出力を発生
する制御回路と、前記一方の固定抵抗素子に並列に接続
され前記制御回路の出力に応じてその抵抗値を変化する
可変抵抗素子とを有するという構成を採っているこれに
よって前述した目的を達成しようとするものである。
[Means for Solving the Problems] In the write circuit of the present invention, a fixed resistor connected in series between both ends of the head coil is provided in the write circuit that writes on a magnetic medium via a magnetic head having a head coil. a control circuit that generates an output by identifying a signal obtained by integrating the write signal through a time constant circuit using a fixed threshold value; and a control circuit that is connected in parallel to one of the fixed resistance elements and whose resistance depends on the output of the control circuit. This is intended to achieve the above-mentioned object by adopting a configuration including a variable resistance element whose value changes.

(発明の実施例) 以下、本発明の一実施例を第1図ないし第2図に基づい
て説明する。
(Embodiment of the Invention) Hereinafter, an embodiment of the present invention will be described based on FIGS. 1 and 2.

この第1図において、ヘッドコイル1は、センタタップ
付きのものであって、磁気媒体に対する書き込み1読み
出しを行う磁気ヘッドに設けられ、その両端間に直列に
接続された固定抵抗2a、2bからなるダンピング抵抗
を接続されているとともに、一方の固定抵抗2bの両端
に並列に電界効果素子(以下FETという)3のドレイ
ン3aとソース3bとを接続されている。またFET3
のゲート3cは制御回路9に接続されている。
In FIG. 1, a head coil 1 is equipped with a center tap, is provided on a magnetic head that performs writing and reading on and from a magnetic medium, and is composed of fixed resistors 2a and 2b connected in series between both ends of the head coil 1. A damping resistor is connected thereto, and a drain 3a and source 3b of a field effect element (hereinafter referred to as FET) 3 are connected in parallel to both ends of one fixed resistor 2b. Also FET3
The gate 3c of is connected to the control circuit 9.

また、ヘッドコイルlの両端は、それぞれトランジスタ
4.5のコレクタに接続され、トランジスタ4.5のエ
ミッタは定電流回路6を経て接地されている。ヘッドコ
イル1の両端は、リード回路7に接続されている。トラ
ンジスタ4,5のベースはフリップフロップ回路8に接
続され、フリップフロップ回路8の入力は書き込み信号
Aに接続されている。制御回路9の入力も書き込み信号
Aに接続されている。
Further, both ends of the head coil l are connected to the collector of a transistor 4.5, and the emitter of the transistor 4.5 is grounded via a constant current circuit 6. Both ends of the head coil 1 are connected to a lead circuit 7. The bases of the transistors 4 and 5 are connected to a flip-flop circuit 8, and the input of the flip-flop circuit 8 is connected to the write signal A. The input of the control circuit 9 is also connected to the write signal A.

第2図は、第1図の回路における各部信号を示すタイム
チャートであって、第1図の回路における書き込み信号
A、FET3に対するゲート駆動信号B、ヘッドコイル
1に対する駆動信号C,D及び制御回路9における制御
信号波形Eを示している。
FIG. 2 is a time chart showing signals of various parts in the circuit of FIG. 1, including a write signal A in the circuit of FIG. 1, a gate drive signal B for FET 3, drive signals C and D for head coil 1, and a control circuit. 9 shows the control signal waveform E at 9.

以下各図に基づいて本発明の書き込み回路の動作を説明
する。
The operation of the write circuit of the present invention will be explained below based on each figure.

読み出し時には、ヘッドコイルlの両端における読み出
し電圧はリード回路7を経て増幅されることによって読
み出し信号出力を発生する。
During reading, the read voltage across the head coil l is amplified via the read circuit 7 to generate a read signal output.

書き込み時には、第2図に示す書き込み信号Aが入力さ
れると、フリップフロップ回路8はこれを分周して互い
に逆位相からなる駆動信号C,Dを発生し、駆動トラン
ジスタ4,5は駆動信号C8Dに応じてヘッドコイルl
に対し、センタタップから互いに逆方向に定電流を流す
ことによって、磁気媒体に対して書き込みが行われる。
During writing, when the write signal A shown in FIG. 2 is input, the flip-flop circuit 8 divides the frequency of this signal to generate drive signals C and D having opposite phases to each other, and the drive transistors 4 and 5 output the drive signal. Head coil l according to C8D
On the other hand, writing is performed on the magnetic medium by flowing constant currents in opposite directions from the center tap.

書き込み信号Aは制御回路9にも入力されるが、制御回
路9は内部に時定数回路を有し、書き込み信号Aを積分
して波形Eを有する制御信号を発生し、これを一定の基
準電圧E0によってスライスすることによって、ゲート
駆動信号Bを発生する。
The write signal A is also input to the control circuit 9, and the control circuit 9 has an internal time constant circuit, integrates the write signal A to generate a control signal having a waveform E, and converts this signal to a constant reference voltage. Gate drive signal B is generated by slicing by E0.

FET3は、ゲート駆動信号Bに応じてオンまたはオフ
となることによって、可変抵抗素子として動作する。
The FET 3 operates as a variable resistance element by being turned on or off according to the gate drive signal B.

FET3は固定抵抗2bに並列に接続されているので、
ヘッドコイル1の両端の抵抗値は駆動信号Bのオン、オ
フに応じて、最小は固定抵抗2aの値から最大は固定抵
抗2aと2bの和の値まで変化する。
Since FET3 is connected in parallel to fixed resistor 2b,
The resistance value at both ends of the head coil 1 varies depending on whether the drive signal B is turned on or off, from a minimum value of the fixed resistance 2a to a maximum value of the sum of the fixed resistances 2a and 2b.

PE73がオンになるのは、制御回路9における時定数
回路の作用によって、書き込み信号Aの周期が短いとき
だけである。書き込み信号Aの周期が長いときは、FE
T3はオフとなる。
The PE 73 is turned on only when the cycle of the write signal A is short due to the action of the time constant circuit in the control circuit 9. When the cycle of write signal A is long, FE
T3 is turned off.

従って、ヘッドコイル1に対するダンピング抵抗値は、
書き込み信号Aの周期の長短に従って大または小となり
、書き込み信号Aの周期に応じてそれぞれ適切な値に変
化することになる。
Therefore, the damping resistance value for head coil 1 is
It becomes large or small depending on the length of the cycle of the write signal A, and changes to an appropriate value depending on the cycle of the write signal A.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によると、FET等からな
る可変抵抗素子を用い、その抵抗値を書き込み信号の周
期に応じて制御することによって、ヘッドコイルのダン
ピング抵抗値を書き込み信号の周期に応じて変化させる
ようにしたので、ヘッドコイルのダンピング特性を実用
上の書き込み周期の全域にわたってほぼ適切な値に制御
して、常に正しく書き込みを行わせることができるとい
う従来にない優れた書き込み回路を提供することができ
る。
As explained above, according to the present invention, the damping resistance value of the head coil is adjusted according to the cycle of the write signal by using a variable resistance element such as a FET and controlling the resistance value according to the cycle of the write signal. As a result, the damping characteristics of the head coil can be controlled to an approximately appropriate value over the entire practical writing cycle, and writing can always be performed correctly, providing an unprecedented and excellent writing circuit. can do.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の構成を示すブロック図、第
2図は第1図の回路における各部信号を示すタイムチャ
ートである。 l・・・・・・ヘッドコイル、2a、2b・・・・・・
固定抵抗素子、3・・・・・・電界効果素子(FET)
、4.5・・・・・・トランジスタ、6・・・・・・定
電流回路、7・・・・・・リード回路、8・・・・・・
フリップフロップ回路、9・・・・・・制御回路。 特許出願人  群馬日本電気株式会社
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a time chart showing signals of various parts in the circuit of FIG. l...Head coil, 2a, 2b...
Fixed resistance element, 3... Field effect element (FET)
, 4.5...Transistor, 6... Constant current circuit, 7... Lead circuit, 8...
Flip-flop circuit, 9... Control circuit. Patent applicant Gunma NEC Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] (1)、ヘッドコイルを有する磁気ヘッドを介して磁気
媒体に書き込みを行う書き込み回路において、 該ヘッドコイルの両端間に直列に接続された固定抵抗素
子と、書き込み信号を時定数回路を経て積分した信号を
一定閾値によって識別して出力を発生する制御回路と、
前記一方の固定抵抗素子に並列に接続され前記制御回路
の出力に応じてその抵抗値を変化する可変抵抗素子とを
具備したことを特徴とする書き込み回路。
(1) In a write circuit that writes to a magnetic medium through a magnetic head having a head coil, a fixed resistance element is connected in series between both ends of the head coil, and a write signal is integrated through a time constant circuit. a control circuit that identifies a signal using a certain threshold value and generates an output;
A write circuit comprising: a variable resistance element that is connected in parallel to the one fixed resistance element and changes its resistance value in accordance with the output of the control circuit.
JP33300288A 1988-12-28 1988-12-28 Write circuit Expired - Fee Related JP2621969B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33300288A JP2621969B2 (en) 1988-12-28 1988-12-28 Write circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33300288A JP2621969B2 (en) 1988-12-28 1988-12-28 Write circuit

Publications (2)

Publication Number Publication Date
JPH02177103A true JPH02177103A (en) 1990-07-10
JP2621969B2 JP2621969B2 (en) 1997-06-18

Family

ID=18261190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33300288A Expired - Fee Related JP2621969B2 (en) 1988-12-28 1988-12-28 Write circuit

Country Status (1)

Country Link
JP (1) JP2621969B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0316005A (en) * 1989-03-17 1991-01-24 Mitsubishi Electric Corp Magnetic disk device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0316005A (en) * 1989-03-17 1991-01-24 Mitsubishi Electric Corp Magnetic disk device

Also Published As

Publication number Publication date
JP2621969B2 (en) 1997-06-18

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