JPH02155378A - Drive method for solid-state image pickup element - Google Patents

Abstract

PURPOSE:To attain complete charge sweepout without using a high substrate voltage by applying a pulse switching a substrate voltage normally to a substrate at the same time of the leading of the light shield aluminum electrode application pulse or before the leading, and applying electronic shutter operation, CONSTITUTION:A voltage phiPS (light shield aluminum electrode voltage) as shown in figure (b) and a voltage phiSUB(substrate voltage) as shown in figure (c) are generated from a vertical drive pulse (hereinafter referred to as VD). The high level of the voltage phiPS is set to a voltage able to store the electric charge in a PD (photodiode) sufficiently such as +8V, the low level is set to a voltage decreasing the stored charge quantity such as -8V and it is fed to a PS (light shield aluminum) electrode. On the other hand, the voltage phiSUB forms a pulse switching a Vsub (high substrate voltage) in the horizontal blanking period including the leading of the voltage phiPS. In this case the leading period of the voltage phiSUB is selected at the same time of the leading period of the voltage phiPS or before the leading period, that is the start of storage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an imaging method using a solid-state imaging device, and particularly to an electronic shutter driving method for an interline transfer type 〇〇D imaging device.

[Conventional technology]

Conventional interline transfer method CD image pickup device performs photoelectric conversion using a photodiode, and the accumulated charge is read out every vertical blanking period, so in the case of NTSC, for example, it has an accumulation time of 1/60 seconds. Therefore 17
Because images are taken using the amount of charge accumulated over a 60-second period, the screen often gets blurred when taking pictures of fast-moving objects.

In order to improve this drawback, an electronic shutter operation that shortens the storage time has recently been proposed and is being put into practical use.

For example, as shown in Video α August 1987 issue P145-148 published by Shashin Kogyo Publishing Co., Ltd., an interline type CC with a drain 4 installed at the top as shown in Figure 10 is generally used.
Using a D image sensor, two photodiode (hereinafter referred to as PD) readout pulses 8 are provided during the vertical blanking period as shown in FIG. The generated charge is swept out to the drain side. The charge accumulated during this time is the second PD
Output on read. This period t1 becomes the shutter time. In this case, unnecessary charge reading, high-speed sweeping, and signal charge reading must be performed within the vertical blanking 10, and the shutter time can only be fixed at 171,000 seconds. As an improved version of this, by providing an accumulation section 12 as shown in Fig. 12, the shutter time can be reduced from 17,250 seconds to 171,000 seconds.
There is a method of drawing out unnecessary charge from the board side using a vertical overflow drain as shown in October 1987 issue F60-64, but in this case, the high board voltage (
(hereinafter referred to as Vsub), and in order to completely reduce the PD accumulated charge to zero with such a voltage, it is necessary to increase the control dependence of the PD maximum accumulated charge amount on Vsub. This means an increase in capacitance, and the influence of variations in capacitance due to uneven substrate concentration becomes larger, resulting in uneven saturation.

[Problem to be solved by the invention]

In the electronic shutter according to the conventional imaging method described above, when trying to widen the variable range, the number of memory stages is required correspondingly, which inevitably increases the chip area of the image sensor. Furthermore, as the number of memory stages increases, data must be transferred at a faster time, which increases the frequency and reduces the maximum transfer charge amount of the vertical register.

In addition, in the method using a vertical overflow drain, V
SUB must be set to high voltage.

In order to completely reduce the FD accumulated charge to zero at such a voltage, it is necessary to increase the control dependence of the PD maximum accumulated charge amount on Vsub, which means an increase in the PD capacitance. However, there is a drawback that the influence of variations in capacitance due to variations in substrate concentration, etc. increases, resulting in the occurrence of saturation variations.

[Means to solve the problem]

The imaging method for a solid-state image sensor of the present invention includes at least a readout pulse, sets the voltage applied to the light-shielded aluminum electrode for a desired accumulation time to a voltage that allows the required amount of charge to be accumulated in the photodiode, and applies the voltage to the light-shielded aluminum electrode for a period other than the accumulation time. The applied voltage is lower than the above-mentioned voltage, and a pulse is applied to the light-shielding aluminum electrode during the horizontal or vertical blanking period when the voltage is switched, and at the same time, the substrate voltage is made lower than normal during the horizontal blanking period of the low-voltage period. The electronic shutter operation is realized by switching to a high voltage and applying a pulse to the substrate to switch the substrate voltage to normal at the same time as or before the rise of the pulse applied to the light-shielding aluminum electrode.

In other words, electronic shutters used in conventional imaging methods require storage units, and when trying to extend the shutter time,
Because the charge is transferred in such a short time, the frequency of the high-speed transfer section increases and the amount of transferred charge decreases.
The present invention does not require an accumulation section and does not require high-speed transfer pulses, so the amount of transferred charge does not decrease even if the shutter time is extended. Also, high substrate voltage is not required.

〔Example〕

Next, the present invention will be explained in more detail with reference to the drawings. - First, the present invention will be explained in detail. Since the N-type photodiode shown in Figure 3 is used in a fully depleted state, the potential of the light-shielding aluminum (hereinafter referred to as PS) that blocks light other than the PD is unstable if it is in a floating state. Either it was grounded or a constant voltage (DC) was applied as shown in Figure 3.

According to experiments, the relationship between the voltage applied to the PS electrode (hereinafter referred to as VP9) and the COD output voltage is as shown in Figure 5, and the COD
The output voltage is highly dependent on Vp3. When VF6 is increased, the COD output increases in proportion to it, and conversely, when Vps is decreased, the COD output voltage also decreases. This phenomenon will be explained using FIG. 4. Currently, the aperture ratio of the PD is narrow and the light-shielding aluminum is thick, so the electric lines of force 7 act on the entire surface of the PD from the side of the aluminum, so it is isometrically equivalent to the light-shielding aluminum covering the PD, and the accumulated charge It is believed that the amount is hunted by VPS. On the other hand, as shown in Figure 6, at Vp3, Vs
The control characteristics of ub also change.

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 9 shows its timing chart. φPS shown in FIG. 9(b) and φSUB shown in FIG. 9(c) are generated from the vertical drive pulse (hereinafter referred to as VD). At this time, φPS is as shown in Figure 7 (
As shown in a), the switching from the low level to the high level is always performed within the horizontal blanking period 9 so that switching noise does not appear on the screen. Similarly, the switching from the high level to the low level covers the read pulse shown in FIG. 9(a), and is performed within the vertical blanking period 10 or within the horizontal blanking period thereafter. The high level of φPS is P
In the present invention, a voltage that allows sufficient charge to be stored in D is set to +8V, and a low level voltage is set to a voltage that reduces the amount of accumulated charge, which is -8V in the present invention, and is applied to the PS electrode. On the other hand, φS
UB generates a pulse to switch Vsub during horizontal blanking including the rise of φPS as shown in FIG. 7(b).

At this time, the falling edge of φSUB should be made at the same time as or before the rising edge of φPS, that is, the start of accumulation, in order to prevent the accumulation time and D range from decreasing. The low level of φSUB is set to the normally used voltage, which is IOV in the present invention, and the high level is set to 20V, which is a voltage capable of drawing all the accumulated charge when φPS is low level to the substrate, and is applied to the substrate. In such a case, the period t2 from the fall of φSUB to the readout pulse is actually the accumulation time, and the shutter time t
Performs a 2 second electronic shutter operation.

FIG. 2 is a block diagram of another embodiment of the invention. 1st
In the figure, a pulse is created to switch V s u b within the horizontal blanking including the rising edge of φPS, whereas in the circuit of FIG. During horizontal blanking immediately before blanking, a pulse is generated to switch Vsub in the same way. In this case, since charge is accumulated even during the time t3 from when charge is drawn to the substrate by φSUB until φPS rises, adding it to the shutter time has no effect.

〔Effect of the invention〕

As explained above, according to the driving method according to the present invention, the voltage applied to the light-shielding aluminum electrode is set to a voltage that can accumulate a necessary amount of charge in the PD for a desired accumulation period, including at least a readout pulse, and for a period other than the accumulation time. The voltage applied to the light-shielding aluminum electrode is made lower than the above voltage, and a pulse is applied to the light-shielding aluminum electrode in which the voltage switching time is during the horizontal or vertical blanking period, and the substrate voltage is set to normal within the horizontal blanking period of the low voltage period. Electronic shutter operation is performed by switching to a higher voltage and applying a pulse to the substrate that switches the substrate voltage to normal at the same time as or before the rise of the pulse applied to the light-shielding aluminum electrode, so it requires memory like the conventional variable type. I don't. Therefore, the chip is smaller than that of a conventional variable CCD image sensor. On the other hand, since unnecessary charge readout pulses, sweep pulses, and high-speed transfer pulses are not required, the vertical transfer pulse can remain as it is when it is normal, which simplifies the process. In addition, there is no reduction in the amount of transferred charge due to high-speed transfer, and the shutter time can be realized from 1/60 seconds to much shorter than the conventional 171,000 seconds.

By controlling PS and SUB simultaneously in this way, it is possible to completely sweep out the charge without using a high substrate voltage. Furthermore, P
Since it is not necessary to increase the capacitance of D, there is an effect that saturation unevenness does not occur.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an electronic shutter drive circuit according to one embodiment of the present invention, Fig. 2 is a block diagram of another embodiment of the present invention, and Fig. 3 shows an example of use of conventional PS and SUB. figure,
Fig. 4 is a diagram explaining the influence of PS, Fig. 5 is a graph showing the VPS dependence of CCD output, and Fig. 6 is a graph showing the VPS dependence of CCD output.
Graph showing ub dependence, FIG. 7 is a timing chart of an electronic shutter according to an embodiment of the present invention, FIG. 8 is a timing chart of another embodiment of the present invention, and FIG. 9 is a timing chart of an embodiment of the present invention. timing chart (1 vertical period),
Fig. 10 is a schematic plan view showing the configuration of an interline type CCD image sensor, Fig. 11 is a timing chart of a conventional electronic shutter, and Fig. 12 is a schematic plan view showing the configuration of a CCV image sensor with a variable shutter function. It is. 1...Photodiode (PD), 2...
...Vertical register ff-CCD), 3...
Horizontal register (H-COD), 4...Drain, 5...Vertical transfer pulse electrode, 6...
・Photoshield electrode (PS), 7... Lines of electric force, 8... Signal charge readout pulse, 9...
... Horizontal blanking period, 10 ... Vertical blanking period, 11 ... Imaging section, 12 ...
...Storage section, 13...Memory 14...
...highway transfer pulse. Agent: Patent Attorney Shinya Uchihara

Claims (1)

[Claims] In a CCD type solid-state imaging device having a PN junction photodiode, a light-shielding electrode that shields the rest from light, and a vertical overflow drain, the voltage applied to the light-shielding electrode includes at least a readout pulse and is applied to the light-shielding electrode for a desired accumulation time. is set to a voltage that allows the required amount of charge to be stored in the photodiode, the voltage applied to the light-shielding electrode is set to a lower voltage than the voltage for a period other than the accumulation time, and the pulse whose voltage switching time is the horizontal or vertical blanking period is light-shielded. applying it to the electrode, and switching the substrate voltage to a higher voltage than usual within the horizontal blanking period of the low voltage period,
A method for driving a solid-state image sensor, characterized in that a pulse for switching the substrate voltage to normal is applied to the substrate at the same time as or before the rise of the pulse applied to the light-shielding electrode.