JPH02143553A - Semiconductor device - Google Patents

Abstract

PURPOSE:To disperse charging and discharge currents to reduce significantly noise due to power potential fluctuation and to contrive the improvement of the sensitivity of a sense amplifier, an address buffer and the like, a speedup and the like and the improvement of the efficiency of each part by a method wherein power supply terminals and power supply conductors are respectively and separately provided to a plurality of circuit blocks rand respectively supply a power supply independently of one another. CONSTITUTION:A device is formed into a constitution having an address buffer circuit 1, decoder circuits 2 and 3 and four memory blocks 41 to 44 constituting a memory cell array 4, which are formed on one substrate, respectively have a prescribed function and are split, an input/output circuit 5, power supply terminals TS1 to TS7, which respectively supply a power supply to each circuit block independently of one another and are located on the sides of earth potential (VSS1 to VSS7), power supply terminals TC1 to TC7 on the sides of power potentials (VCC1 to VCC7) and power supply conductors, by which these terminals TS1 to TS7 and TC1 to TC7 and each circuit block are respectively connected to one another. In such a way, the terminals TS1 to TS7 and TC1 to TC7 and the power supply conductors are separated from one another in every circuit block and supply a power supply independent of one another. Thereby, charging and discharge currents in each circuit block are divided, and noise due to power potential fluctuation is reduced significantly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a large capacity semiconductor memory section in one package.

[Conventional technology]

In recent years, semiconductor devices have become so large that one chip can include one conventional system. Among these, semiconductor memory devices have memory capacities of 1M bits (1,048,576 words x 1 bit), 4M bits (4,194,304 words x 1 bit), and 16M bits (16,777,216 words x 1 bit). It has been touted that the amount of time has increased, and the operating speed is also about to increase to 100 ns, 80 ns, and 60 ns.

With this increase in scale, current consumption during operation is also increasing.

For example, a standard 1M bit DRAM has 2,048 bit line sense amplifier circuits, and all bit lines are charged and discharged in one operation cycle, so one bit When operating at a power supply voltage of 5V with a line capacitance of 0.5pF, and operating at a high speed of about 20ns using the 1/2V cc precharge method, the current is averaged in a square wave and discharged and charged. Ru.

If this is used as a triangular wave for discharging and charging, the rate of current change will increase. Therefore, it is relative to the power supply line on the ground potential side or the power supply line on the power supply potential side.

Note that these main power sources are configured to be supplied through one system.

[Problem to be solved by the invention]

The conventional semiconductor devices mentioned above are increasing in size and operating speed, but because the main power is supplied from one system, the current consumption increases and the rate of current change increases. However, there are disadvantages in that power supply potential fluctuation noise occurs, which limits the performance of each part, such as the sensitivity and speed of the sense amplifier.

That is, the power supply system (ground potential side and power supply potential side power supply line) has an inductance of 1 including the lead frame and the wire connecting the pellet and the lead frame.
It is 0 to 15 nH, and if you include the inductance in the wiring of the socket part, which is essential for electrical measurements, it is 20 to 15 nH.
A power supply potential fluctuation noise of 25 nH or 512 to 640 (mV) is generated.

It is clear that this power supply potential fluctuation noise has an adverse effect on various parts.

In addition, power supply potential fluctuation noise is caused not only when charging and discharging the bit line due to the increase in scale and speed, but also during address buffer operation, which operates all at once to latch the address input, and due to the latching of the output of a multi-bit configuration. This is also becoming a problem when the output buffer operates in a single step.

Address buffers or output buffers are circuit elements that require delicate margin design and are also parts that directly affect access time, so countermeasures against self-noise are the Achilles' heel of a semiconductor memory or semiconductor device.

[Means to solve the problem]

A semiconductor device of the present invention includes a plurality of circuit blocks formed on one substrate and each having a predetermined function, power supply lines that independently supply power to at least specific circuit blocks of these circuit blocks, and It has a power supply terminal connected to each power supply line.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In this embodiment, an address buffer circuit 1. The ground potential (VSSI to Vs
s7) side power supply terminals T5□ to Ts7 and the power supply potential (
Vcct to VCC7) side power supply terminals Tc1 to Tc and these power supply terminals Tsl to T57, T
The configuration includes power supply lines connecting c1 to T67 and each circuit block, respectively.

In this way, each circuit block has power supply terminals T51~
T5. ．． By separating Tc, to To7 and the power supply line and supplying power independently, charging and discharging currents of each circuit block are distributed, and power supply potential fluctuation noise caused by this charging and discharging current can be significantly reduced.

Note that how to divide a circuit block is determined by the magnitude of the charging/discharging current, the timing of charging/discharging, etc. If the charging/discharging current is small, multiple circuit blocks can be divided, such as decoder circuits 2 and 3. The power supply terminals and power supply lines may be integrated into one circuit block, or if charging and discharging current is performed in a time-sharing manner, these may be integrated to unnecessarily increase the number of power supply terminals and power supply lines. Shouldn't. Also, when charging and discharging are performed at different timings, for example, the power supply terminal and power supply line on the power potential side may be integrated, but the power supply terminal and power supply line on the ground potential side may be separated. can.

〔Effect of the invention〕

As explained above, the present invention provides separate power supply terminals and power supply lines for a plurality of circuit blocks,
By configuring the power supplies to be supplied independently, the charging and discharging currents are dispersed, and power supply potential fluctuation noise can be significantly reduced. This can improve the sensitivity and speed of sense amplifiers, address buffers, etc. This has the effect of improving the performance of each part.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention.

Claims (1)

[Claims] A plurality of circuit blocks formed on one substrate and each having a predetermined function, power supply lines that independently supply power to at least specific circuit blocks of these circuit blocks, and connections to each of these power supply lines. A semiconductor device characterized by having a power supply terminal.