JPH02130867A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPH02130867A
JPH02130867A JP28468188A JP28468188A JPH02130867A JP H02130867 A JPH02130867 A JP H02130867A JP 28468188 A JP28468188 A JP 28468188A JP 28468188 A JP28468188 A JP 28468188A JP H02130867 A JPH02130867 A JP H02130867A
Authority
JP
Japan
Prior art keywords
operated
voltage
circuit
operating
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28468188A
Other languages
Japanese (ja)
Inventor
Toshio Tatai
Hideaki Yokouchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP28468188A priority Critical patent/JPH02130867A/en
Publication of JPH02130867A publication Critical patent/JPH02130867A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce total operating current consumption and to increase the lifetime of a battery by operating a circuit system with a low voltage with small current consumption at the time of low speed operation.
CONSTITUTION: When an electric calculator function is operated, high speed oscillation means 6 of 455kHz is operated, and a load circuit 7 is operated with a high speed clock. In this case, a high voltage is supplied from a high voltage source 9 for generating a voltage for operating the circuit 7 with the high speed clock to the circuit 7 through selecting means 10. In this instance, since a clocking function is operated, low speed oscillation means 5 of 32.768Hz is operated, and the maximum oscillation frequency of this case becomes 455kHz. If only the clock function is operated and the calculator function is not operated, only the means 5 is operated, a low output voltage 81 of a low voltage source 8 for generating a lowest limit voltage is switched to be supplied to the operating voltage 101 of the circuit 7 through the means 10.
COPYRIGHT: (C)1990,JPO&Japio
JP28468188A 1988-11-10 1988-11-10 Integrated circuit Pending JPH02130867A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28468188A JPH02130867A (en) 1988-11-10 1988-11-10 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28468188A JPH02130867A (en) 1988-11-10 1988-11-10 Integrated circuit

Publications (1)

Publication Number Publication Date
JPH02130867A true JPH02130867A (en) 1990-05-18

Family

ID=17681603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28468188A Pending JPH02130867A (en) 1988-11-10 1988-11-10 Integrated circuit

Country Status (1)

Country Link
JP (1) JPH02130867A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5525937A (en) * 1992-12-28 1996-06-11 Sony Corporation Frequency conversion circuit with UHF/VHF common PLL buffer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5525937A (en) * 1992-12-28 1996-06-11 Sony Corporation Frequency conversion circuit with UHF/VHF common PLL buffer

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