JPH02125656A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the data from leaking out by a method wherein the transfer gates transmitting the data stored in a ROM to outer terminals are controlled by signals and a pass word. CONSTITUTION:8 bit data stored in a ROM 11 are transmitted to an inner data bus 12 and transfer gates 13. When a correct pass word is inputted to an input terminal 17 in the case of a testing time, the logic circuit 16 outputs '1' coincident with '1' of the input T of an AND gate 15 so that '1' may be outputted to turn the transfer gates 13 ON allowing the data stored in the ROM 11 to be outputted to an outer terminals 14. Through these procedures, the said data can be prevented from leaking out.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit (hereinafter simply referred to as an integrated circuit) having a built-in ROM, and particularly to a control method when outputting the contents of the ROM to an external terminal.

[Conventional technology]

Conventionally, integrated circuits with a built-in ROM use R to check whether the data stored in the ROM is correct during testing.
The circuit configuration was such that the data stored in the OM was directly output to the outside.

Figure 2 shows a conventional integrated circuit with a built-in ROM.
FIG. 2 is a logic circuit diagram of a bit output ROM peripheral section.

In FIG. 2, during normal use, the signal T is "0", so the transfer gate 23 is in the OFF state, and the ROM 21
The data stored in is output only to the internal data bus 22 and not to the external terminal 24.

During testing, since the signal T is "In", the transfer gate 23 is in the ON state, and the data stored in the ROM 21 is output to the internal data bus 22 and the external terminal 24, and the data output to the outside is the same data stored in the ROM 21. It simply checked whether the data was correct or not.

[Problem to be solved by the invention]

The conventional integrated circuit with a built-in ROM described above has a circuit configuration that outputs the data itself stored in the ROM to the outside during a test to check whether the data stored in the ROM is correct. The disadvantage is that the data stored in the device is easily readable and the data is leaked to the outside.

SUMMARY OF THE INVENTION An object of the present invention is to provide an integrated circuit which overcomes these drawbacks and makes it impossible to read data stored in a ROM from the outside.

[Means to solve the problem]

The integrated circuit of the present invention is an integrated circuit consisting of an N (N is an integer of 2 or more) bit output ROM and a transfer gate that outputs the output of the ROM to N external terminals. The transfer gate has means for turning on the transfer gate only when a specific value (hereinafter referred to as a password) is input to input terminals (integer number).

〔Example〕 Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which 8-bit output RO
It is a logic circuit diagram incorporating M.

The 8-bit data stored in ROM II is transmitted to internal data bus 12 and transfer gate 13.

Transfer Gate 13)! Controlled by AND gate 15, ON when AND gate I5 output is 'l'
state and transmits data to the external terminal 14. AND
Game) 15 has signal T and logic circuit 16 both 111 ++
Outputs “1” when . The logic circuit 16 has an input terminal 17
“I 11” is displayed only if the correct password is entered in
Output.

The circuit operation during normal use will be described below.

During normal use, since the signal T is "0", the output of the AND gate 15 becomes B, regardless of the output of the logic circuit 16, and the transfer gate 13 is turned off, so that the data stored in ROM II is output only to the internal data bus 12 as before. and is not output to the external terminal 14.

Next, we will discuss the circuit operation during testing. Input terminal 17
If the correct password is input, the output of the logic circuit 16 becomes "1" and the inputs of the AND gate 15 become "i"
n, so "1" is output, and transfer gate 1
3 is in the ON state, and the data stored in the ROM 11 is output to the internal data bus 12 and the external terminal 14. If a wrong password or no password is input to the input terminal 17, the output of the logic circuit 16 becomes "0", the output of the AND gate 15 becomes "0", and the transfer gate 13 is turned off. Next door ROM
The data stored in II is output only to internal data bus 12 and not to external terminal 14. Therefore, even during testing, the data stored in the ROMII will not be outputted to the outside unless a correct password is input to the input terminal 17, making it impossible to read the data from the outside and preventing the data from leaking to the outside.

〔Effect of the invention〕

As explained above, the present invention controls the transfer gate that transmits the data stored in the ROM to the external terminal using the signal T and the password. Since it is not output to the outside, it is impossible to read this data from the outside and prevents the data from leaking to the outside.
This has the effect of protecting data stored in OM.

[Brief explanation of drawings]

Figure 1 shows an 8-bit output ROM that is an embodiment of the present invention.
FIG. FIG. 2 is a logic circuit diagram of an example of a peripheral portion of a conventional 8-bit output ROM. 11.21...ROM, 12.22...Self...
Internal data bus, 13.23...Transfer gate, 14.24...External terminal, 15.
...AND gate, 16 ... logic circuit,
17... Input terminal for password. Agent Patent Attorney Oto Uchihara

Claims (1)

[Claims] N (N is an integer of 2 or more) beat output ROM and the RO
In a semiconductor integrated circuit consisting of a transfer gate that outputs M outputs to N external terminals, a certain value (hereinafter referred to as a password) is input to M (M is an integer greater than or equal to 1) input terminals during testing. A semiconductor integrated circuit characterized in that the transfer gate is turned on only when an input is received, and the contents of the ROM are output from the N external terminals.