JPH02119150A - Method for joining metallic lead foil - Google Patents
Method for joining metallic lead foilInfo
- Publication number
- JPH02119150A JPH02119150A JP25073689A JP25073689A JPH02119150A JP H02119150 A JPH02119150 A JP H02119150A JP 25073689 A JP25073689 A JP 25073689A JP 25073689 A JP25073689 A JP 25073689A JP H02119150 A JPH02119150 A JP H02119150A
- Authority
- JP
- Japan
- Prior art keywords
- metal lead
- foil
- solder
- lead foil
- liquid crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011888 foil Substances 0.000 title claims abstract description 68
- 238000000034 method Methods 0.000 title claims description 14
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 title abstract 4
- 229910000679 solder Inorganic materials 0.000 claims abstract description 44
- 239000002184 metal Substances 0.000 claims description 62
- 229910052751 metal Inorganic materials 0.000 claims description 62
- 238000007747 plating Methods 0.000 claims description 28
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 26
- 239000011347 resin Substances 0.000 abstract description 10
- 229920005989 resin Polymers 0.000 abstract description 10
- 238000005476 soldering Methods 0.000 abstract description 5
- 230000004907 flux Effects 0.000 abstract description 2
- 238000004382 potting Methods 0.000 abstract 2
- 238000010030 laminating Methods 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 239000004945 silicone rubber Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920003055 poly(ester-imide) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
- H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は１例えばキャリアフィルム等に設けられた金
属リード箔の内側端および外側端に、それぞれＩＣチッ
プおよび電子部品や基板の接続端子に半田付けする場合
における金属リード箔の接［従来の技術］
ＩＣチップを樹脂フィルム（キャリアフィルム）の−面
に固着されている複数の金属リード箔にポンディングす
る方法は、 ＴＡＢ （Ｔａｐｅ Ａｕｔｏ鵬ａｔｅｄ
Ｂｏｎｄｉｎｇ）方式として知られている。[Detailed Description of the Invention] [Industrial Application Field] This invention provides the following features: 1. For example, solder is applied to the inner and outer ends of a metal lead foil provided on a carrier film, etc., to connection terminals of IC chips, electronic components, and substrates, respectively. Bonding of metal lead foils when bonding [Prior art] A method of bonding an IC chip to a plurality of metal lead foils fixed to the negative side of a resin film (carrier film) is TAB (Tape Auto bonded).
This is known as the bonding method.
このようなＴＡＢ方式によって形成された、ＩＣチップ
を有するキャリアフィルムは、小型電子計ｒｌ１１１や
液晶テレビジョン装置等において液晶表示パネルとプリ
ント配線基板を電気的に接続する場合に用いられている
。A carrier film having an IC chip formed by such a TAB method is used to electrically connect a liquid crystal display panel and a printed wiring board in a small electronic meter RL111, a liquid crystal television set, and the like.
この場合の接合方法として、従来、樹脂フィルム上の各
金属リード箔に−様な厚さの半田メッキを設けて、各内
側端にＩＣチップを、また各外側端に液晶表示パネルや
プリント配！ｉＬ基板の接続端子を接合していた。Conventionally, as a joining method in this case, each metal lead foil on a resin film is coated with solder plating of varying thickness, and an IC chip is placed on each inner edge, and a liquid crystal display panel or printed circuit board is placed on each outer edge. The connection terminals of the iL board were bonded.
【発明が解決しようとする問題点］
しかして、上述したような構造においては１組立時や完
成後の外部からの負荷のために、液晶表示パネルやプリ
ント配線基板の接続端子に半田付けされる各金属り・−
ド箔の外側端側は、ＩＣチップの電極に半田付けされる
内側端側よりも強い接合強度が必要とされる。[Problems to be Solved by the Invention] However, in the structure described above, due to external loads during assembly and after completion, the connection terminals of the liquid crystal display panel and printed wiring board must be soldered. Each metal -
The outer end of the foil requires stronger bonding strength than the inner end, which is soldered to the electrode of the IC chip.
しかしながら、従来の接合方法は、半田メッキを金属リ
ード箔に−様な厚さに設けて接合する方法であるから、
内側端側の接合強度が満足されるような半田メッキ厚に
すると、外側端側の接合強度が不足し、逆に、外側端側
の接合強度が十分になる半田メッキ厚にすると、内側端
側端においてメッキ量が流出し、ＩＣチップの電極間が
短絡するという問題があった。However, the conventional bonding method involves applying solder plating to metal lead foil to a certain thickness.
If the solder plating thickness is set so that the bonding strength on the inner edge side is satisfied, the bonding strength on the outer edge side will be insufficient. Conversely, if the solder plating thickness is set so that the bonding strength on the outer edge side is sufficient, the bonding strength on the inner edge side will be insufficient. There was a problem in that the amount of plating leaked out at the end, causing a short circuit between the electrodes of the IC chip.
この発明は、上述の実情に鑑みてなされたもので、その
目的とするところは、金属リード箔の内側端および外側
端のいずれに対しても適切な半田付けを可能とする金属
リード箔の接合方法を提供することにある。This invention has been made in view of the above-mentioned circumstances, and its purpose is to join metal lead foils to enable appropriate soldering to both the inner and outer ends of the metal lead foils. The purpose is to provide a method.
［問題点を解決するための手段Ｊ
この発明は上記問題を解決するため、各金属リード箔に
設けられる半田メッキの厚さを、内側端側よりも外側端
側で厚くしたものである。[Means for Solving the Problems J] In order to solve the above problems, the present invention is such that the thickness of the solder plating provided on each metal lead foil is made thicker on the outer end side than on the inner end side.
［作 用］
この方法によれば、各金属リード箔の内側端側には適切
な厚さの半ｉｎメッキを設けてＩＣチップの電極に好ま
しい条件で接合できるし、また、各金属リード箔の外側
端側には、内側端側よりも厚く半田メッキを設けて、電
子部品や基板の接続端子に十分な接合強度で接合するこ
とができる。[Function] According to this method, half-inch plating with an appropriate thickness can be provided on the inner end side of each metal lead foil, and it can be bonded to the electrode of an IC chip under favorable conditions. The outer end side is provided with a thicker solder plating than the inner end side, so that it can be bonded to the connection terminal of an electronic component or a board with sufficient bonding strength.
［実施例１
以下、第１図から第８図を参照して、この発明の一実施
例を説明する。[Embodiment 1] Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 8.
第１図は卓上型電子計算機等の液晶表示パネルとプリン
ト配線基板とをＴＡＢ方式のＩＣユニットで接続した状
態を示す、この図において、ｌはＩＣユニット、２は液
晶表示パネル、３はプリント配線基板であり、ＩＣユニ
ーｙ）１は液晶表示パネル２とプリント配線基板３とに
跨って複数個（この実施例では３個）配置され、液晶表
示パネル２とプリント配線基板３とを電気的に接続して
いる。これにより、ＩＣユニットｌはプリント配線基板
３からの信号に基づいて液晶表示パネル２を駆動し、こ
の液晶表示パネル２で所定の情報を電気光学的に表示す
る。Figure 1 shows a state in which a liquid crystal display panel of a desktop computer, etc. and a printed wiring board are connected by a TAB type IC unit. In this figure, l is an IC unit, 2 is a liquid crystal display panel, and 3 is a printed wiring board. A plurality of (three in this embodiment) IC units 1 are arranged across the liquid crystal display panel 2 and the printed wiring board 3, and electrically connect the liquid crystal display panel 2 and the printed wiring board 3. Connected. Thereby, the IC unit 1 drives the liquid crystal display panel 2 based on the signal from the printed wiring board 3, and electro-optically displays predetermined information on the liquid crystal display panel 2.
このようなＩＣユニットｌは第１図および第２図に示す
ように、キャリアフィルム（樹脂フィルム）４にＩＣチ
ップ５の外形よりも大きな開口部６を形成するとともに
、キャリアフィルム４の上ｍｌに多数の金属リード箔（
ＩＣチップリード）７・・・をパターン形成し、この金
属リード箔７・・・の前記開口部６内へ突出する内側端
７ａ・・・にＩＣチップ５をＩ Ｌ Ｂ （Ｉｎｎｅｒ
Ｌｅａｄ Ｂｏｎｄｉｎｇ）によりボンディングして
なるものであり、金属リード箔７・・・の外側端７ｂ・
・・が液晶表示パネル２およびプリント配線基板３にＯ
Ｌ Ｂ （Ｏｕｔｅｒ Ｌｅａｄ Ｂｏｎｄ′ｉｎｇ）
により接合される。これにてＩＣユニット１は液晶表示
パネル２とプリント配線基板３とを電気的に接続する。As shown in FIGS. 1 and 2, such an IC unit 1 has an opening 6 formed in the carrier film (resin film) 4 that is larger than the outer shape of the IC chip 5, and an opening 6 formed in the upper ml of the carrier film 4. A large number of metal lead foils (
IC chip leads) 7... are patterned, and the IC chips 5 are attached to the inner ends 7a of the metal lead foils 7 that protrude into the opening 6.
The outer end 7b of the metal lead foil 7...
... is connected to the liquid crystal display panel 2 and printed wiring board 3.
L B (Outer Lead Bonding)
joined by. In this way, the IC unit 1 electrically connects the liquid crystal display panel 2 and the printed wiring board 3.
この場合、キャリアフィルム４はポリエステル、ポリイ
ミド等の高分子材料よりなる５０〜２００ ＩＬｍの厚
みをもった可撓絶縁性のフィルムである。また、金属リ
ード箔７・・・はキャリアフィルム４の上面に金属箔（
例えば厚さ３５ｐｍの電解銅箔）を接着剤でラミネート
し、このラミネートされた金属箔をフォトエツチングに
よりパターン形成される。In this case, the carrier film 4 is a flexible insulating film made of a polymeric material such as polyester or polyimide and having a thickness of 50 to 200 ILm. Further, the metal lead foil 7... is a metal foil (
For example, a 35 pm thick electrolytic copper foil is laminated with an adhesive, and the laminated metal foil is patterned by photo-etching.
このように金属リード箔７・・・の内側端７ａ・・・に
ポンディングされるＩＣチップ５は、第３図に示すよう
にシリコンよりなる半導体ウェハ５ａのに面にシリコン
酸化ｒｔＪ５ｂが形成され、このシリコン酸化ＷＪ５ｂ
の上面にゲート等の内部電極（図示せず）およびこの内
部電極を外周部へ導くアルミニウムの配線パターン５Ｃ
が形成され、この配線パターン５Ｃに電極（金バンプ）
５ｄが形成され、この電極５ｄを除く配線パターン５Ｃ
の上面にシリコン−化ｍ（絶縁ｇｉ）５ｅを形成した構
成となっている。そして、このＩＣチップ５はその電極
５ｄに金属リード箔７・・・の内側端７ａ・・・が半田
メッキ７Ｃを介してポンディングされ、この状態で第２
図に示すように、ＩＣチップ５の電極５ｄを有する側が
ボッティングされたレジン８にて被ｍされている。この
場合、半田メッキ７Ｃは錫（Ｓｎ）と鉛（Ｐｂ）との混
合物（Ｓ ｎ ： Ｐｂ＝８ ：２）で、金属リード箔
７の全表面に施されている。As shown in FIG. 3, the IC chip 5 bonded to the inner end 7a of the metal lead foil 7 has silicon oxide rtJ5b formed on the surface of the semiconductor wafer 5a made of silicon. , this silicon oxide WJ5b
Internal electrodes such as gates (not shown) on the top surface and aluminum wiring pattern 5C that leads these internal electrodes to the outer periphery.
is formed, and an electrode (gold bump) is formed on this wiring pattern 5C.
5d is formed, and a wiring pattern 5C excluding this electrode 5d
It has a structure in which a silicon oxide m (insulating gi) 5e is formed on the upper surface of the . Then, the inner ends 7a of the metal lead foils 7 are bonded to the electrodes 5d of the IC chip 5 through the solder plating 7C, and in this state, the second
As shown in the figure, the side of the IC chip 5 having the electrodes 5d is covered with a potted resin 8. In this case, the solder plating 7C is a mixture of tin (Sn) and lead (Pb) (Sn:Pb=8:2), and is applied to the entire surface of the metal lead foil 7.
一方、上記キャリアフィルム４の両端側には金属リード
箔７・・・の外側端７ｂ・・・の長手方向に直交して開
口巾が１〜２ｍｍとされた開口部４ａ。On the other hand, on both end sides of the carrier film 4, there are openings 4a having an opening width of 1 to 2 mm and extending perpendicularly to the longitudinal direction of the outer ends 7b of the metal lead foils 7.
４ａが側縁に沿って形成されており、上記各金属リード
箔７・・・はこの開口部４ａ、４ａの上面を外側端７ｂ
・・・が橋架する状態でキャリアフィルム４の上面に設
けられている。そして、このような金属リード箔７・・
・の外側端７ｂ・・・のうち、液晶表示パネル２側の外
側端７ｂ・・・は第２図に示すように、開口部４ａに対
向する中央部分７ｂ＋が開口部４ａ内に没入して液晶表
示パネル２の接続り−ド２ａに半田メッキ７Ｃを介して
熱圧着にて接合され、この没入した中央部分７ｂ＋ の
両端側に傾斜部分７ｂ２．７ｂ３が開口部４ａの上端縁
に向けて創めに立ち上り、これにより三角状の半田溜り
９．９が形成され、この半田溜り９，９により接続リー
ド２ａに強固に接着される。そして、金属リード箔７・
・・の外側端７ｂ・・・は第２図に示すように、液晶表
示パネル２の接続リード２ａに接合された状態でシリコ
ンゴム１１にて被覆される。4a is formed along the side edge, and each of the metal lead foils 7...
... are provided on the upper surface of the carrier film 4 in a bridging state. And such metal lead foil 7...
As shown in FIG. 2, among the outer ends 7b... of the outer ends 7b... on the liquid crystal display panel 2 side, the central portion 7b+ facing the opening 4a is recessed into the opening 4a. It is bonded to the connection cord 2a of the liquid crystal display panel 2 by thermocompression bonding via solder plating 7C, and sloped portions 7b2 and 7b3 are formed on both ends of the recessed central portion 7b+ toward the upper edge of the opening 4a. As a result, triangular solder pools 9,9 are formed, and these solder pools 9,9 firmly adhere to the connection leads 2a. And metal lead foil 7.
As shown in FIG. 2, the outer ends 7b of... are covered with silicone rubber 11 while being joined to the connection leads 2a of the liquid crystal display panel 2.
ところで、上記金属リード箔７に施される半田メッキ７
ｃは内側端７ａと外側端７ｂとではその層厚を異にして
いる。すなわち、外側端７ｂ−ｒ：は半田量が多すぎる
と隣りの金属リード箔７にショートするので、この点か
らは少ない量であることが好ましいが、反面強固な接着
強度を有していなければならない、しかし、外側端７ｂ
の接合構造において、半田メッキ７ｃから溶けた半田は
中央部分７ｂ＋のみならず傾斜部分７ｂ２．７ｂ３の立
ち上り部にも流れ込んで半田溜り９゜９となるので十分
な接着力が確保される。このような配慮のため、実施例
としては、外側端７ｂの半【１］メッキ７ｂの層厚は０
．８〜２．０ｇｍとされている。一方、内側ｆｉ７ａに
ＩＣチップ５をポンディングするとき、内側端７ａにＩ
Ｃチップ５の′直棒５ｄを４００℃／ １〜０．５ ｓ
ｅ Ｃ（７）熱を与えて熱圧着するが、このときに金
−錫共晶の接着強度が最大となるように、その半田メッ
キ７Ｃの層厚は０．２〜０．６ルｍに設定されている。By the way, the solder plating 7 applied to the metal lead foil 7
c has a different layer thickness between the inner end 7a and the outer end 7b. That is, if the outer end 7b-r: has too much solder, it will short-circuit to the adjacent metal lead foil 7, so from this point of view it is preferable that the amount is small, but on the other hand, if it does not have strong adhesive strength, However, the outer edge 7b
In this joining structure, the solder melted from the solder plating 7c flows not only into the central portion 7b+ but also into the rising portions of the inclined portions 7b2, 7b3, forming a solder pool 9°9, thereby ensuring sufficient adhesive strength. For this reason, in the embodiment, the layer thickness of the half [1] plating 7b on the outer end 7b is 0.
．． It is said to be 8 to 2.0 gm. On the other hand, when bonding the IC chip 5 to the inner fi 7a, the I
C-chip 5's straight rod 5d at 400℃/1~0.5 s
e C (7) Apply heat to bond by thermocompression. At this time, the layer thickness of the solder plating 7C is set to 0.2 to 0.6 lm to maximize the adhesive strength of the gold-tin eutectic. It is set.
また、上述のようにして金属リード箔７の外側端７ｂが
半［］Ｊメッキ７ｃから溶けた半田によって接合される
液晶表示パネル２の接続リード２ａは、第４図に示すよ
うに、液晶表示パネル２の端部に等間隔で多数配列形成
されており、その構成は第６図に示すように、液晶表示
パネル２の上面に形成された厚さｔ ｏｏｏλ程度の酸
化シリコン層２ａ＋ と、この上面に形成された３５
０λ程度のＩ Ｔ Ｏ（Ｉｎｄｉｕｍ Ｔｉｎ ０ｗ１
ｄｅ）層２ａ２ と、この上面に形成された２０００λ
程度のＮｉ層（無電解メッキ）２ａ３と、この上面に形
成された５００λ程度のＡｕ層（無電解メッキ）２ａ４
とを積層した構成となっている。Further, as shown in FIG. 4, the connection leads 2a of the liquid crystal display panel 2, to which the outer ends 7b of the metal lead foils 7 are joined by the solder melted from the semi-J plating 7c, are connected to the outer ends 7b of the metal lead foils 7, as shown in FIG. A large number of silicon oxide layers 2a+ are formed at equal intervals on the edge of the panel 2, and as shown in FIG. 35 formed on the top surface
ITO (Indium Tin 0w1) of about 0λ
de) layer 2a2 and 2000λ formed on this upper surface
Ni layer (electroless plating) 2a3 with a thickness of about 500λ and an Au layer (electroless plating) 2a4 with a thickness of about 500λ formed on the top surface.
It has a laminated structure.
そして、」−記金属リード箔７の外側端７ｂと、これが
接合される接続リード２ａはｍ５図に示すような関係に
ある。すなわち、各金属リード箔７のピッチＰ＝１５０
ｇｍ、金属リード箔７の巾ＷＬ＝６０〜８０μｍ、各接
続リード２ａの間隔５＝３０μｍ、接続リード２ａの巾
ＷＧ＝１２０４ｍとされている。従って、ＷＧ）ＷＬで
あるから、金属リード箔７の巾方向（ピッチ方向）の両
側辺部にも半田メッキ７ｃが流れ出して三角状の半【Ｕ
溜り１０．１０が得られ、これによって巾方向からのピ
ーリング強度が高められている。また、ＷＧ＞ＷＬであ
るから、熱圧着によって溶けた半田メッキ７Ｃの半田は
接続リード２ａ上を広がり、これによって隣りの金属リ
ード箔７とのショートが防止される。このためには金属
リード箔７の巾ＷＬはＷＧの０．５〜０．８倍で、接続
り−ド２ａの巾方向の両側部にＷＧの０．２５〜０．１
倍のクリアランスを３９けることが望ましい。The outer end 7b of the metal lead foil 7 and the connection lead 2a to which it is joined are in a relationship as shown in figure m5. That is, the pitch P of each metal lead foil 7 is 150.
gm, the width WL of the metal lead foil 7 = 60 to 80 μm, the interval 5 between each connection lead 2a = 30 μm, and the width WG of the connection lead 2a = 1204 m. Therefore, since it is WG)WL, the solder plating 7c also flows out on both sides of the metal lead foil 7 in the width direction (pitch direction), forming a triangular half [U
A depth of 10.10 was obtained, thereby increasing the peeling strength in the width direction. Further, since WG>WL, the solder of the solder plating 7C melted by thermocompression spreads over the connection lead 2a, thereby preventing short circuit with the adjacent metal lead foil 7. For this purpose, the width WL of the metal lead foil 7 is 0.5 to 0.8 times WG, and the width WL of the metal lead foil 7 is 0.25 to 0.1 times the width of WG.
It is desirable to have 39 times the clearance.
次に、かかる構成にあるＩＣユニツ）１の製造方法につ
いて述べる。Next, a method for manufacturing the IC unit 1 having such a configuration will be described.
まず、第１工程において開口部６．４ａが形成されたキ
ャリアフィルム４に金属箔をラミネートし、これをフォ
トエツチングにより所定の金属リード箔７・・・をパタ
ーン形成する０次の第２工程において金属リード箔７の
全面に内側端７ａｌ１ｇの層厚０．２〜０．８ｐｍの半
田メッキ７Ｃを施す０次の第３工程において金属リード
箔７の内側端７ａにＩＣチップ５をボンディングする０
次の第４工程においてＩＣチップ５の電極５ｄを有する
面にレジン８をポツティング塗布する０次の第５工程に
おいてレジン８を乾燥（１５０℃７３Ｈ程度）する０次
の第６エ程において金属リード箔７に外側端７ｂ側の層
厚０．２〜２．０ＪＬｍとなるように再度半田メッキ７
Ｃを施す、このように半田メッキ７Ｃを第６エ程におい
て外側端７ｂの層厚にするのは、第５工程のレジン８の
乾燥中において第２工程で施した半田メッキ７Ｃの錫が
金属リード箔７の銅と共晶を起して第２工程での半田メ
ッキ７Ｃの層厚がｏ、ｔ 〜０．２ μｍ８ＪｆＫ減少
してしまうためである。そして１次の第７エ程において
半田フラックスを金属リード箔７の外側端７ｂにポツテ
ィング塗布する。First, a metal foil is laminated on the carrier film 4 in which the opening 6.4a was formed in the first step, and in a zero-order second step, a predetermined metal lead foil 7 is patterned by photo-etching. In the third step, solder plating 7C with a layer thickness of 0.2 to 0.8 pm is applied to the inner end 7al1g on the entire surface of the metal lead foil 7.The IC chip 5 is bonded to the inner end 7a of the metal lead foil 7.
In the next fourth step, the resin 8 is potted and applied to the surface of the IC chip 5 having the electrodes 5d.In the fifth step of the zeroth step, the resin 8 is dried (about 150°C and 73 hours).In the sixth step of the zeroth step, the metal lead Solder plating 7 is applied to the foil 7 again so that the layer thickness on the outer edge 7b side is 0.2 to 2.0 JLm.
The reason why the solder plating 7C is applied to the layer thickness of the outer edge 7b in the sixth step is because the tin of the solder plating 7C applied in the second step becomes metal while the resin 8 is drying in the fifth step. This is because eutectic formation occurs with the copper of the lead foil 7, and the layer thickness of the solder plating 7C in the second step decreases by o,t~0.2 μm8JfK. Then, in the first seventh step, solder flux is potted onto the outer end 7b of the metal lead foil 7.
次に、上記の如くして製造されたＩＣユニットｌの金属
リード箔７を液晶表示パネル２の接続リード２ａに接合
する方法について述べる。Next, a method for joining the metal lead foil 7 of the IC unit 1 manufactured as described above to the connection lead 2a of the liquid crystal display panel 2 will be described.
第７図に示すように、テーブル２０上に載置されている
液晶表示パネル２の各接続リード２ａ上に各金属リード
箔７の外側端７ｂが重なるようにＩＣユニツ）１を搬送
して、これをテーブル２０の側部近傍に配置されている
バキュームヘッド２１にて吸着固定する。この場合、金
属リード箔７の先端部はキャリアフィルム４に固定され
ているので各金属リード箔７は所定の間隔に保持される
。この後、テーブル２０の上方に配置されている熱圧着
ヘッド２２を降下させて、第８ｖＩＪに示すように金属
リード箔７の開口部４ａに対向する外側端７ｂの中央部
分７ｂｌ を液晶表示パネル２の接続リード２ａに接合
する。この熱圧着ヘッド２２によって行なわれる熱圧着
は、まず、８圧着ヘッド２２が外側端７ｂの中央部分７
ｂ＋を加圧して、キャリアフィルム４の開口部４ａ内に
没入させ、この没入した中央部分７ｂ、を接続リード２
ａに圧接させ、その両側に傾斜部分７ｂ２．７ｂ３の立
ち上り部を形成する。この場合、金属リード箔７の全面
には半田メッキ７Ｃが施されているので、半田メッキ７
Ｃが熱圧着ヘッド２２の加熱により溶け、この溶けた半
田が外側端７ｂの中央部分７ｂ＋ と液晶表示パネル２
の＃ＣＭリード２ａとの間から流れ出し、中央部分７ｂ
＋の両側に形成される傾斜部分７ｂ２．７ｂ３の立ち上
り部に流れ込み、この立ち上り部に流れ込んだ半田は外
側端７ｂの上面が熱圧着ヘッド２２によって加熱される
ことによって傾斜部分７ｂ２．７ｂ３に上昇して三角状
の半田溜り９，９となる。従って、中央部分７ｂ＋と傾
斜部７ｂ２，７ｂｚの立ち上り部に流れ込んで半田溜り
９，９となった半田によって金属リード箔７の外側端７
ｂは接続リード２ａに強固に接着される。また、熱圧着
ヘッド２２によって加熱されて溶けた半田メッキ７Ｃの
半田は第５図に示すように巾方向にあっては接続リード
２ａ上を広がって金属リード箔７の両側部において三角
状の半田溜り１０．１０となる。従って、金属リード箔
７は巾方向の剥れもなく接続リード２ａに対して強固に
接着される。このようにして金属リード箔７が接続リー
ド２ａに接合された後その接合部がシリコンゴム１１に
て被覆される。As shown in FIG. 7, the IC unit 1 is transported so that the outer end 7b of each metal lead foil 7 overlaps each connection lead 2a of the liquid crystal display panel 2 placed on the table 20. This is suctioned and fixed by a vacuum head 21 arranged near the side of the table 20. In this case, since the tips of the metal lead foils 7 are fixed to the carrier film 4, the metal lead foils 7 are held at predetermined intervals. Thereafter, the thermocompression bonding head 22 disposed above the table 20 is lowered to attach the central portion 7bl of the outer end 7b facing the opening 4a of the metal lead foil 7 to the liquid crystal display panel 2, as shown in No. 8vIJ. It is joined to the connection lead 2a of. In the thermocompression bonding performed by this thermocompression bonding head 22, first, the 8 compression bonding heads 22
b+ is pressurized so that it immerses into the opening 4a of the carrier film 4, and this immersed central portion 7b is connected to the connection lead 2.
a, and the rising portions of the inclined portions 7b2 and 7b3 are formed on both sides thereof. In this case, the solder plating 7C is applied to the entire surface of the metal lead foil 7, so the solder plating 7C is applied to the entire surface of the metal lead foil 7.
C is melted by the heat of the thermocompression bonding head 22, and this melted solder is bonded to the center portion 7b+ of the outer end 7b and the liquid crystal display panel 2.
It flows out from between the #CM lead 2a and the central part 7b.
The solder flowing into the rising portions of the sloped portions 7b2, 7b3 formed on both sides of + is heated by the thermocompression bonding head 22, so that the solder rises to the sloped portions 7b2, 7b3. This results in triangular solder pools 9,9. Therefore, the outer end 7 of the metal lead foil 7 is caused by the solder flowing into the central portion 7b+ and the rising portions of the inclined portions 7b2, 7bz and forming solder pools 9, 9.
b is firmly adhered to the connection lead 2a. Further, the solder of the solder plating 7C that is heated and melted by the thermocompression bonding head 22 spreads over the connection lead 2a in the width direction, forming triangular solder on both sides of the metal lead foil 7, as shown in FIG. The accumulation becomes 10.10. Therefore, the metal lead foil 7 is firmly adhered to the connection lead 2a without peeling in the width direction. After the metal lead foil 7 is bonded to the connection lead 2a in this manner, the bonded portion is covered with silicone rubber 11.
なお、上記熱圧着ヘッド２２は、キャリアフィルム４の
開口部４ａの開口巾（１〜２ｍｍ）の５０〜８０％の１
０を有し、２００〜４００℃の加熱温度と３０〜３６０
ｇ／ｍｍ２の加圧力で１〜５ｓｅｃ間処理することによ
り金属リード箔７を接続リード２ａに接合する。The thermocompression bonding head 22 has a width of 50 to 80% of the opening width (1 to 2 mm) of the opening 4a of the carrier film 4.
0, heating temperature of 200-400℃ and 30-360℃
The metal lead foil 7 is joined to the connection lead 2a by applying a pressure of g/mm2 for 1 to 5 seconds.
［発明の効果］
以上説明したように、この発明の金属リード箔の接合方
法によれば、各金属リード箔の内側端側は適切な厚さの
半田ノー２キを設けてＩＣチップの゛電極に好ましい条
件で接合できるし、また、各金属リード箔の外側端側は
内側端側よりも厚く設けた半田メッキによって、電子部
品や基板の接続端子に十分な接合強度をもたせて接合で
き、生産の能率および信頼性を飛躍的に向上することが
できるものである。[Effects of the Invention] As explained above, according to the method for joining metal lead foils of the present invention, two solder holes of appropriate thickness are provided on the inner end side of each metal lead foil to connect the electrodes of the IC chip. In addition, the outer end of each metal lead foil is plated with solder thicker than the inner end, so it can be bonded with sufficient bonding strength to the connection terminals of electronic components and circuit boards, making production easier. The efficiency and reliability of the system can be dramatically improved.
図面はそれぞれこの発明の一実施例を示し、第１図はキ
ャリアフィルムに形成された金属リード箔によって電気
的に接続された液晶表示パネルとプリント回路基板を示
した斜視図、第２図は第１図の■−■線断面図、第３図
はＩＣユニットのＩＣチップポンディング部を示した拡
大断面図、第４図は第１図の■−■線断面図、第５図は
ＩＣユニットと液晶表示パネルとの接続部を示した拡大
断面図、第６図は液晶表示パネルの接続リードを示した
断面図、第７図はこの発明の接合方法で用いた装匠を示
した断面図、第８図は液晶表示パネルの接続リードを示
した断面図である。
ム（樹脂フィルム）、４ａ・・・・・・開口部、５・・
・・・・ＩＣチップ、５ｄ・・・・・・電極、７・・・
・・・金属リード箔、７ａ・・・・・・内側端、７ｂ・
・・・・・外側端、７ｔｚ・・・・・・中央部分、７ｂ
２，７ｂ３・・・・・・傾斜部分、７ｃ・・・・・・半
田メッキ、２２・旧・・熱圧着ヘッド。Each of the drawings shows an embodiment of the present invention, and FIG. 1 is a perspective view showing a liquid crystal display panel and a printed circuit board electrically connected by a metal lead foil formed on a carrier film, and FIG. 1. Figure 3 is an enlarged sectional view showing the IC chip bonding part of the IC unit. Figure 4 is a sectional view taken along the line ■-■ in Figure 1. Figure 5 is the IC unit. FIG. 6 is an enlarged cross-sectional view showing a connecting portion between a liquid crystal display panel and a liquid crystal display panel, FIG. 6 is a cross-sectional view showing connection leads of a liquid crystal display panel, and FIG. 7 is a cross-sectional view showing a decoration used in the bonding method of the present invention. , FIG. 8 is a sectional view showing connection leads of a liquid crystal display panel. (resin film), 4a...opening, 5...
...IC chip, 5d...electrode, 7...
...Metal lead foil, 7a...Inner end, 7b.
...Outside edge, 7tz...Central part, 7b
2, 7b3... Slanted part, 7c... Solder plating, 22 Old... Thermocompression bonding head.
Claims (1)
ＩＣチップの電極に、各外側端を電子部品または基板の
接続端子に接合する金属リード箔の接合方法において、
それぞれの金属リード箔に設けられる半田メッキの厚さ
を、内側端側よりも外側端側に厚く形成したことを特徴
とする金属リード箔の接合方法。In a method for joining metal lead foils, each inner end of a plurality of solder-plated metal lead foils is joined to an electrode of an IC chip, and each outer end is joined to a connecting terminal of an electronic component or a board,
A method for joining metal lead foils, characterized in that the thickness of the solder plating provided on each metal lead foil is made thicker on the outer end side than on the inner end side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1250736A JP2623860B2 (en) | 1989-09-28 | 1989-09-28 | Carrier film joining method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1250736A JP2623860B2 (en) | 1989-09-28 | 1989-09-28 | Carrier film joining method |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62292151A Division JPH01135093A (en) | 1987-11-20 | 1987-11-20 | Method of joining ic chip lead |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02119150A true JPH02119150A (en) | 1990-05-07 |
| JP2623860B2 JP2623860B2 (en) | 1997-06-25 |
Family
ID=17212276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1250736A Expired - Lifetime JP2623860B2 (en) | 1989-09-28 | 1989-09-28 | Carrier film joining method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2623860B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5212576A (en) * | 1990-12-18 | 1993-05-18 | Mitsubishi Denki Kabushiki Kaisha | Insulating material with coefficient linear expansion matching that of one substrate over connection between two conductive patterns |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54111763A (en) * | 1978-02-22 | 1979-09-01 | Hitachi Ltd | Carrier tape for tape carrier |
| JPS56148856A (en) * | 1980-04-21 | 1981-11-18 | Hitachi Ltd | Film carrier |
| JPS572536A (en) * | 1980-06-06 | 1982-01-07 | Seiko Epson Corp | Semiconductor device |
| JPS572537A (en) * | 1980-06-06 | 1982-01-07 | Seiko Epson Corp | Semiconductor device |
| JPS5977483A (en) * | 1982-10-26 | 1984-05-02 | セイコーインスツルメンツ株式会社 | Liquid crystal display |
| JPS62196840A (en) * | 1986-02-24 | 1987-08-31 | Oki Electric Ind Co Ltd | Film carrier tape |
| JPS62249435A (en) * | 1986-04-23 | 1987-10-30 | Hitachi Ltd | Seniconductor device |
-
1989
- 1989-09-28 JP JP1250736A patent/JP2623860B2/en not_active Expired - Lifetime
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54111763A (en) * | 1978-02-22 | 1979-09-01 | Hitachi Ltd | Carrier tape for tape carrier |
| JPS56148856A (en) * | 1980-04-21 | 1981-11-18 | Hitachi Ltd | Film carrier |
| JPS572536A (en) * | 1980-06-06 | 1982-01-07 | Seiko Epson Corp | Semiconductor device |
| JPS572537A (en) * | 1980-06-06 | 1982-01-07 | Seiko Epson Corp | Semiconductor device |
| JPS5977483A (en) * | 1982-10-26 | 1984-05-02 | セイコーインスツルメンツ株式会社 | Liquid crystal display |
| JPS62196840A (en) * | 1986-02-24 | 1987-08-31 | Oki Electric Ind Co Ltd | Film carrier tape |
| JPS62249435A (en) * | 1986-04-23 | 1987-10-30 | Hitachi Ltd | Seniconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5212576A (en) * | 1990-12-18 | 1993-05-18 | Mitsubishi Denki Kabushiki Kaisha | Insulating material with coefficient linear expansion matching that of one substrate over connection between two conductive patterns |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2623860B2 (en) | 1997-06-25 |
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