JPH02114560A - Manufacturing method of semiconductor resistor - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a diffused resistor formed in a semiconductor by an ion implantation method or a diffusion method.

[Conventional technology]

FIG. 3 shows a conventional method for manufacturing a diffused resistor.

FIG. 3(a) is a schematic plan view. A P vacant region 3 is formed in an N type region 2 in an isolation region 1 separated by a field oxide film, and highly concentrated P+ regions 4 are formed at both ends of the P vacant region 3. and a contact region 5 in the P+ region 4.
is formed to form a P-type diffused resistor. At this time, 6 in the figure becomes the resistance length.

3(b) to 3(d) are schematic process sectional views taken along the line aa' in FIG. 3(a). Silicon N-type region 10
After forming a field oxide film 11 and an oxide film 12 inside, boron ions are implanted using the patterned photoresist 13 as a mask to form a P-type head region 14.
(corresponding to 3 in Figure 3(a)) [Figure 3(b)
]. Next, remove the photoresist) 13 and remove the aluminum 1.
After depositing aluminum 15 on the entire surface, the aluminum 15 is patterned by wet etching using the patterned photoresist 16 as a mask [FIG. 3(C)].

Next, after removing the photoresist 16, high concentration boron ions are implanted into the P+ region 18 (corresponding to 4 in FIG. 3(a)).
form. Thereafter, an insulating film 19 is deposited, a contact region is formed, an electrode 20 is formed, and a P-type diffused resistor is formed [FIG. 3(d)].

[Problem to be solved by the invention]

In forming the P-type diffused resistor described above, a method is often used in which the P vacant region 14 is formed simultaneously with the base region of the NPN bipolar transistor, and the P+ region 18 is formed simultaneously with the graft base region of the NPN bipolar transistor. Formation of the P+ region of the base diffused resistor formed in this manner requires boron ion implantation at a dose of about 5×IO15 cm', and an aluminum 15 mask is required.

The patterning of the aluminum 15 is performed by wet etching to avoid damage caused by etching. As a result, the P+ region 18 tends to expand due to overetching of the aluminum, resulting in a deviation from the mask design value by the amount of the region 17.

The resistance length 6 is in the P+ region 4-4' as shown in FIG. 3(a).
Since the deviation of the region 17 has the disadvantage of shortening the resistance length and making the resistance value smaller than the designed value, the shorter the resistance length, the greater the effect.

[Means to solve the problem]

The method for manufacturing a semiconductor resistor of the present invention includes the steps of forming a region of a second conductivity type on a semiconductor of a first conductivity type, and covering a region to become a resistor with polycrystalline silicon and a mask material. and forming high concentration regions of the second conductivity type at both ends by ion implantation or diffusion.

〔Example〕

FIG. 1 shows an embodiment of the present invention.

FIG. 1(a) is a schematic plan view of a diffused resistor.

A P-type region 3 exists in an N-type region 2 separated by a field oxide film, and polycrystalline silicon 7 is provided near both ends of the P-type region 3 so as to intersect with the P-type region 3. Then, the P+ region 4 is placed so that it partially overlaps with the polycrystalline silicon 7.
is provided, and a contact region 5 is present in the P+ region 4.

FIGS. 1(b) to 1(d) are schematic process cross-sectional views taken along the line bb' in FIG. 1(a). p (phosphorus) concentration 10'6 ~
After a field oxide film 11 of approximately 0.8 μm is formed in the N-type head region lO of 1017 an-' by a selective oxidation method using a silicon nitride film, an oxide film 12 of 30 to 70 mm is formed by a thermal oxidation method. Next, using the patterned photoresist as a mask, the acceleration voltage is 10~70KV and the dose is I.
Boron ions of X 10'''' to IX 10'' cm-3 are implanted to form a P vacant region 14 (corresponding to 3 in FIG. 1(a)) [FIG. 1(b)].

Next, after removing the photoresist, apply approximately 0.4 to 0.5μ over the entire surface.
m polycrystalline silicon 21 is deposited. And Figure 1 (
Polycrystalline silicon other than region 7 in a) is removed by dry etching. Next, approximately 1.2 μm of aluminum 15 was deposited on the entire surface and then patterned into a photoresist) 16.
Patterning of aluminum 15 is performed by wet etching with phosphoric acid using a mask as shown in Fig. 1 (C
)]. Next, after removing the photoresist 16, the acceleration voltage 30
P+ region 18 (4 in FIG. 1(a)) was
). At this time, polycrystalline silicon 21 and aluminum 15 serve as masks for ion implantation.

Next, after forming an insulating film 19 with a thickness of approximately 0.8 μm over the entire surface, an opening is made for a contact region, for example, PtSi/TiW/Aβ.
An electrode 20 consisting of a structure is formed [FIG. 1(d)].

2 is a schematic plan view and process sectional view of Example 2 of the present invention. This example is a method for manufacturing a P-type diffused resistor that is formed through the same steps as the previous example, but the difference is that there is one pattern each of polycrystalline silicon 21 and aluminum 15, and the structure is simple. This method has the advantage that a highly accurate diffused resistor can be formed. Resistance length is polycrystalline silicon 2
The ion implantation region for forming the P+ region 18 is determined by the length of the polycrystalline silicon 21 and the field oxide film 11.
Defined by

〔Effect of the invention〕

As explained above, the present invention uses polycrystalline silicon, which can be etched with high precision, as part of the mask, and forms high concentration regions at both ends of the resistor by ion implantation or diffusion, thereby forming a highly precise semiconductor resistor. It is possible to do so.

In particular, when a base diffused resistor is embedded in a BiCMO8 integrated circuit that has a process of forming gate polycrystalline silicon after base formation ion implantation, a region that will become a resistor is formed by base ion implantation, and a transistor gate oxide film is formed by base ion implantation. is used for the insulating film, and 0MO is used for the polycrystalline silicon.
8) By using transistor gate polycrystalline silicon and forming a high concentration region by graft-based ion implantation, the above effects can be obtained without adding any special manufacturing process. Furthermore, since dry etching of polycrystalline silicon provides a practically sufficient selectivity for the photoresist and the gate oxide film under the polycrystalline silicon, damage caused by etching can be avoided.

The formal plan view and FIGS. 3(b) to 3(d) are process sectional views of the conventional embodiment.

1...Separation region, 2,10...N type region, 3゜14...P type region, 4,18...
...P+ region, 5...Contact region, 6...
...Resistance length, 7,21...Polycrystalline silicon, 11...Field oxide film, 12...
・Oxide film, 13.16...Photoresist, 1
5... Aluminum, 1.9... Insulating film, 20... Electrode.

Agent: Patent Attorney Susumu Uchihara

[Brief explanation of drawings]

FIG. 1(a) is a schematic plan view of one embodiment of the present invention.
Figures (b) to (d) are process sectional views of one embodiment of the present invention, and Figure 2 (a) is a schematic plan view of another embodiment of the present invention.
Figures (b) to (d) are process sectional views of other embodiments of the present invention,
FIG. 3(a) is a replica of the conventional embodiment.

Claims (1)

[Claims] In a method for manufacturing a semiconductor resistor in which a region of a second conductivity type formed on a semiconductor of a first conductivity type by an ion implantation method or a diffusion method is used as a resistor, the region to be a resistor is formed of polycrystalline silicon and a mask material. A method of manufacturing a semiconductor resistor, comprising the step of coating the resistor and forming high concentration regions of a second conductivity type at both ends of the resistor by ion implantation or diffusion.