JPH0153554B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital recording and reproducing method for recording and reproducing a television video signal encoded into a digital signal.

In this type of digital recording and reproduction, code errors such as random errors due to equipment noise and burst errors in which errors are concentrated in one place occur due to recording dropouts due to scratches on the magnetic tape, etc., occur. In order to obtain good image quality even with such code errors, code errors are corrected using an error correction code having a chain structure as shown in FIG. In this case, random errors and short burst errors are corrected using a correction code called an inner code block, which is composed of subblocks Bi ₁ , Bi ₂ , ...Bim, and Pi in the horizontal direction as shown by arrow 1 in the figure. Vertically sub-block B ₁ j,
A correction code called an outer code block consisting of B ₂ j, . . . Bnj and Pj' corrects long burst errors that cannot be corrected with the inner code. here,
P ₁ to _{P o} are inner code parities, and P ₁ ′ to P _n ′ are outer code parities. Note that this chain structure is usually composed of one field unit.

The codes of the chain structure in FIG. 1 are, for example, from left to right in the first row (B ₁₁ , B ₁₂ , ..., B _1n , P ₁ ) and from left to right in the second row (B ₂₁ , B ₂₂ ,…, B _2n , P ₂ ), followed by the nth row and the n+1th row (P ₁ ′, P ₂ ′,…, P _n ′)
The data are sequentially read out and recorded in tracks A, B, and C in FIG. 2 in this order. If one track has a recording capacity for one field, and the chain code in Figure 1 is made up of codes for one field, then one chain code in Figure 1 is equivalent to the one in Figure 2. It will be recorded on one track.

Of course, depending on the amount of data in one track and one chain code, multiple chain codes may be recorded on one track, or the code for one field may be divided and recorded on multiple tracks. There may be cases. However, since the gist of the present invention can be applied without depending on the amount of data, for the sake of simplicity, FIGS. 1 and 2 show an example in which a track and one chain code constitute one field.

Incidentally, in digital recording and reproduction, in addition to the so-called normal mode reproduction in which reproduction is performed at a speed equivalent to the recording speed, a reproduction function in a so-called high-speed mode, ie, picture search, is also required in which reproduction is performed at a speed faster than the recording speed. However, in high-speed mode playback, in the case of a chain structure in which each field is a unit, for example, as shown in Figure 2, the track recorded on the magnetic tape is scanned as shown by the broken arrow D in the normal mode. On the other hand, in the high-speed mode, scanning is performed as shown by the solid arrow E, so that in addition to the predetermined field of the target track, information on different fields such as , etc. is included. Therefore, if the same error correction operation as in the normal mode is performed in the high speed mode, there is a problem in that erroneous corrections occur.

FIG. 2 is a diagram in which one track consists of one field, and the field numbers correspond to the track numbers. Therefore, although this number is explained as a field identification code in the main text, it may be easier to understand if it is called a track identification code as it corresponds to the diagram.

An object of the present invention is to provide a structure and a decoding method for an error correction code having a chain structure that does not perform error correction even in normal mode and high speed mode.

FIG. 3 shows the configuration of a subblock correction code using a chain structure according to the present invention. Each subblock 3 (Bij, Pi, Pi') has, for example, at the beginning a block synchronization code 4 indicating a subblock division,
and an address identification code indicating the position of the subblock (for example, i, j) and a field identification code (NTSC) indicating the field to which the subblock belongs.
method), one color image is composed of two frames, so for example, field identification is a type)
A synchronization code 6 having a value of 5 is provided.

For convenience of explanation, both inner code and outer code corrections are performed when there is an error in one subblock within one block, that is, one erasure correction, and the detection of the position of the code error is necessary for this purpose. To do this, an error detection code is added to the subblock.

Next, the principle of the present invention will be explained. In the present invention, when a chain structure consisting of one field is reproduced in high-speed mode, if subblocks of different types of fields exist, no correction is performed using the outer code, and only a correction operation using the inner code is performed. Furthermore, even when one inner code includes subblocks of different types of fields, the correction operation is stopped, that is, correction is disabled. Therefore, the correction operation using the inner code is performed only when all of the inner codes correspond to corresponding subblocks of the same field. These correction operations can be controlled by identifying the synchronization code 6 shown in FIG. 3 above.

Note that uncorrectable errors are often corrected by replacing them with highly correlated signals, but in high-speed mode, the inner code of the chain structure has sub-blocks of different fields, so errors that cannot be corrected become uncorrectable. In some cases, it is better not to modify something that has become outdated. The reason for this is that in high-speed mode, after a certain point, even the inner code cannot be corrected, and when corrections are made, the same signal is always corrected, so the picture search function no longer works. It is.

In the above explanation, the chain-shaped code block shown in Fig. 1 is composed of one field worth of video information, and this one code block is made to correspond to one track on the magnetic tape as shown in Fig. 2. We have described an example of recording data. Therefore, the fact that the inner code and the outer code contain codes of different fields corresponds to the fact that they contain codes reproduced from different tracks.

Examples of the present invention will be described below. Fourth
The figure shows a first embodiment of the present invention, and in this embodiment, one error detection code 7 is added to each sub-block 3, as shown in C of the figure. Note that 6 is a synchronization code, and 8 is information data.

In FIG. 1B, an error detection circuit 11 detects the presence or absence of a code error in each subblock using an error detection code added to each subblock. Next, the synchronization code identification circuit 12 identifies the block identification code and field identification code indicating the position of each subblock. Then, the inner code control circuit 13, outer code control circuit 14, and correction circuit 15 are controlled using the identified synchronization code. This control is performed so that the inner code control circuit 13 can perform a correction operation only for corresponding subblocks of the same field in one code, and the outer code control circuit 14 can perform a correction operation only when the entire subblocks are the same. In addition, the correction circuit 15 performs the correction operation only when all subblocks included in the inner code are corresponding subblocks of the same field. Note that 16 is an inner code correction circuit, and 17 is an outer code correction circuit. Therefore, in high-speed mode reproduction, the code sequence shown in Figure 4a (the shaded area is No. 1 fluid,
When the mesh portion is No. 2 field), the correction using the inner code and the correction using the outer code operate as shown in the figure. That is, the inner code results in a circle mark (correction mode is entered and correction is performed) and an x mark (correction is not performed and the error is displayed as is), and no correction is performed using the outer code.

Next, since the inner code is subjected to one erasure correction, the position of the code error is known, and correction is possible only when only one of the subblocks included in the inner code is erroneous. Therefore, the inner code control circuit 13 determines whether or not code errors can be corrected based on the position and number of code errors, and the inner code correction circuit 16 corrects the code errors only when a correction operation is possible by identifying the synchronization code described above. Make corrections. On the other hand, the outer code correction circuit 17 sends the position of the code error that cannot be corrected to the outer code control circuit 14 only when correction using the inner code is impossible, and uses this to send the position of the code error that cannot be corrected to the inner code control circuit 13. Corrections are made by similar operations.

Therefore, in this embodiment, by identifying the synchronization code including the block number and field number, it is possible to eliminate erroneous correction operations in both the normal mode and the high speed mode.

Here, the reason why the above operation is effective will be explained below.

In FIG. 4a, it is assumed that the data of all subblocks are correctly reproduced. but,
Since the inner code in the third row contains codes of different tracks, the content of the reproduced code is different from the recorded inner code. As a result, this inner code is determined to be incorrect. Similarly, since all the outer codes in the figure include codes of different tracks, these outer codes are determined to be erroneous. In this way, when codes of different tracks coexist within the same code, error detection or correction operations based on this are completely unreliable, and if correction is continued as is,
Malfunctions actually increase the number of errors. In other words, not making corrections generally results in fewer errors.

Note that since the outer code contains more subblocks than the inner code, there is a high probability that subblocks of different tracks will be included at the same time, and when these are included, the range of influence of erroneous correction is wide. Therefore, the effect of prohibiting correction of the outer code is greater than the effect of prohibiting correction of the inner code. Further, if correction of codes including subblocks of different tracks is prohibited, the result is substantially the same as correcting only the inner code and not correcting the outer code.

On the other hand, in the high-speed mode, even if some random errors remain, it is often desirable for the picture search function to perform some error correction for burst errors. An embodiment suitable for this purpose is shown in FIG. In this embodiment, as shown in FIG. 3C, the sub-block 3 having the synchronization code 6 is subdivided into mini-sub-blocks 9, and an error detection code 10 is added to each mini-sub-block.

Here, in the correction using the inner code, for a code error within one subblock, the corresponding subblock is corrected. On the other hand, if there are code errors in a plurality of sub-blocks, the sum of the numbers of code errors in mini sub-blocks within the sub-blocks is compared, and the sub-block with the largest sum is treated as the sub-block with the code error and correction is performed.

For example, in an inner code consisting of six subblocks 3 #1 to #6 shown on the left side of FIG.
Suppose that there is a sign error in . On the other hand, the total number of code errors among the mini subblocks 9 included in the subblock is 5 in subblock #3,
In sub-block #5, there are two. That is, it is considered that a burst error has occurred in subblock #3. Therefore, in this case, a burst error is corrected by performing a correction operation assuming that subblock #3 has a code error. As a result of the correction, as shown on the right, errors occur in the mini-subblocks in columns c and g of subblock #3 as shown by the marks, but errors are corrected in the remaining mini-subblocks as shown by ◎. Most of the burst errors will be corrected. Furthermore, sub-block #5 c
In the mini-subblocks in columns and g, the errors are left as is, as indicated by the crosses.

In this way, in this embodiment, the subblock is further subdivided into mini subblocks, and the error correction operation is performed on the subblock for which the total number of mini subblocks containing code errors is the largest, thereby providing higher correction capability. It becomes possible.

The configuration for this purpose is as shown in FIG.
2, an inner code control circuit 23 and an outer code control circuit 24. Of these, the components other than the inner code control circuit 23 operate in the same manner as in the embodiment shown in FIG. 4b, and therefore their explanation will be omitted. That is, in this embodiment, the inner code control circuit 23 calculates the sum of the mini-subblocks having code errors included in the subblock, and performs control such that the subblock with the largest sum is treated as the subblock with the code error and correction is performed. Let's do it.

Next, by performing error correction control on the subdivided mini-subblocks, it becomes possible to perform error correction that further reduces the influence of error correction.
This embodiment is shown in FIG. In this embodiment, similarly to the embodiment shown in FIG. 5, the sub-block 3 having the synchronization code 6 is subdivided into mini-sub-blocks 9 as shown in FIG. 6-c, and an error detection code 10 is added to each mini-sub-block. The fifth
A mini-subblock with the same configuration as in Figure c is used. In the case of inner code correction, if there is one code error in a mini subblock in the same subblock among the subblocks included in the inner code, the mini subblock containing that error is corrected. On the other hand, if there are code errors in multiple mini subblocks in the same subblock, the total number of mini subblocks with code errors is compared for the subblocks to which the mini subblock belongs, and this sum is included in the largest subblock. Correct the mini subblock.

For example, as shown on the left side of FIG. 6b, #1 to
Assume that in the inner code #6 consisting of six subblocks, there is a code error in the mini subblock marked with an x out of mini subblocks 9. In this case, the mini-subblocks of columns b, d, e, f, and g all have one code error, so they are corrected. In column C, code errors exist in two mini-subblocks, but the number of mini-subblocks with code errors is greater in subblock #3 than in #5. Therefore, a correction operation is performed on subblock #3.

Therefore, in this case, some erroneous corrections of mini-subblocks occur. That is, in sub-block #3 shown on the right side, an erroneous correction (mark) occurs in a bit at a position corresponding to a bit with a code error. In this case, the bits in the mini-subblock in column c of sub-block #3 have errors as shown by the arrow drawn upwards and the cross marks, but most of the bits are ◎ as shown in the upper right corner. The code is corrected, and only the portion where a random code error occurs in the #5 subblock is erroneously corrected as indicated by the mark. However, the mini-subblock in column c of subblock #5 remains in error (marked with an x), and all others are corrected (marked with a ◎).

On the other hand, in the embodiment shown in FIG. 5, since there are two code errors in subblocks #3 and #5, subblock #3, which has a large number of code errors within the subblock, is corrected. 3g
An error correction occurred in the mini-subblock of the column, but there is no error correction here in this embodiment. That is, in this embodiment, by subdividing the error correction control into mini-subblocks, it is possible to provide higher correction capability.

The configuration in this case is as shown in FIG.
9. This is performed by the inner code control circuit 30 and the outer code control circuit 31. Of these, the components other than the inner code control circuit 30 operate in the same manner as in each of the previously described embodiments, so the details thereof will be omitted. That is, in this embodiment, the inner code control circuit 30 corrects the corresponding mini-subblock when there is one code error in the mini-subblock, and corrects the corresponding mini-subblock when there are multiple code errors. A control operation is performed to correct the subblock with the largest number of code errors.

As described above, according to the present invention, it is possible to perform a good error correction operation even during high-speed mode reproduction, and the effects obtained thereby are extremely large.

In other words, if the inner code or outer code contains a code reproduced from a different track, by prohibiting the correction operation of that code,
Malfunctions in correction operations can be prevented.

It goes without saying that the present invention is also applicable to a slow mode in which data is reproduced at a slower speed than recording, or a still mode.

Furthermore, although the present invention has been described only with respect to a chain-like code structure, a code structure consisting only of inner codes,
Alternatively, it is naturally applicable to any code structure, such as a code structure consisting only of outer codes.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing an error correction code with a chain structure, FIG. 2 is an explanatory diagram showing normal mode and high speed mode when reading tracks on a magnetic tape, and FIG. 3 is a sub-block with a chain structure. FIG. 4A is an explanatory diagram showing the configuration of a correction code. FIG. FIG. 5c is an explanatory diagram showing the configuration of sub-block symbols, FIG. 5a is a configuration diagram of another embodiment of the reproduction system,
Figure b is an explanatory diagram showing a state in which error correction has been applied to an inner code consisting of six subblocks subdivided into mini subblocks, and Figure c is a configuration diagram showing an embodiment in which the subblocks are subdivided into mini subblocks.
Fig. 6a is a block diagram of an embodiment of the reproduction system when error correction is performed on a mini-subblock, Fig. 6b is an explanatory diagram showing a state in which the subblock is corrected by this, and Fig. 6c shows the configuration of the mini-subblock. FIG. 3...Sub block, 4...Block synchronization code, 5...Field identification code, 6...Synchronization code, 7...Error detection code, 8...Information data, 9
...Mini subblock, 10...Error detection code,
11, 18, 25...Error detection circuit, 12, 1
9, 26...Synchronization code identification circuit, 13, 23,
30... Inner code control circuit, 14, 24, 31...
Outer code control circuit, 15, 22, 29... Correction circuit, 16, 20, 27... Inner code correction circuit, 1
7, 21, 28... Outer code correction circuit.

Claims (1)

[Scope of Claims] 1. In an apparatus for recording and reproducing video information encoded in a digital signal, a step of generating a sub-block including an error correction code, a step of adding a synchronization code and an identification code to the sub-block; It includes a step of configuring a multi-stage code such as an inner code and an outer code using sub-blocks, and a step of identifying the above-mentioned identification code, and when playing back at a speed different from that at the time of recording, the inner code in the multi-stage code is 1. A digital signal recording and reproducing method characterized in that error correction is carried out using the outer code, and control is performed to prohibit error correction using outer codes. 2. The digital signal according to claim 1, wherein the code for which error correction is prohibited is a code determined by the identification step to include codes reproduced from different tracks within the same code. Recording and playback methods.