JPH0136735B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse signal control circuit, and more particularly to a pulse signal control circuit that obtains an amplified pulse data signal containing high-frequency pulses corresponding to input data in a gas discharge display device or the like.

Conventionally, as a pulse signal control circuit for an external electrode type gas discharge display device, a circuit as shown in FIG. 1 has been known.The operating principle thereof will be explained with reference to the drawings, and the drawbacks thereof will be described.

FIG. 1 is a circuit diagram showing a conventional system, and FIG. 3 is a waveform diagram. In FIG. 1, a high resistance 2 is connected between the base and collector of a first transistor 1, and a first diode 3 is connected between the base and emitter with a polarity opposite to that of the diode characteristic between the base and emitter. are connected. A resistor 5 is connected between the base and emitter of the second transistor 4, and the collector is connected to the first transistor through a second diode 6.
is connected to the base of transistor 1, and further connected to the base of transistor 1.
The emitter of transistor 4 is grounded. A preamplified high-frequency pulse a shown in FIG. 3 is input to the collector of the first transistor 1,
When input data b is applied to the base of the second transistor 4, a pulse data signal c corresponding to the input data b is obtained from the emitter of the first transistor 1. When the polarity of the input data b is positive, the second transistor 4 is turned on, and the base potential of the first transistor 1 becomes approximately the emitter potential of the second transistor 4, so it is turned off and its emitter is turned on. It is almost fixed to the emitter potential of transistor 4. Next, when the polarity of the input data b is negative, the second transistor 4 is turned off.
At this time, a current due to the high-frequency pulse a flows through the base of the first transistor 1 through the collector-base capacitance or the high resistance 2, and the transistor becomes in an operating state, and the high-frequency pulse a is output to its emitter.

If the polarity is positive, the high-frequency pulse a passes through the collector of the first transistor 1, and if the polarity is negative, it passes through the collector, base, and first diode 3 of the first transistor 1, and then passes through the first transistor 1. It is output to the emitter of transistor 1.

In this way, the pulse data signal c corresponding to the input data b is obtained by the circuit configuration and signal input method described above. In FIG. 1, when the polarity of the input data b is negative, the high frequency pulse a Since the second transistor 4 is turned on, a positive current is required through the high resistance 2, and the current I _p as seen from
As the number of circuits increases, the rise characteristics of the high-frequency pulse a deteriorate, and the power loss on the high-frequency pulse input side increases. Furthermore, if this circuit is made into a monolithic chip, there is a drawback that the high resistance increases the chip area.

SUMMARY OF THE INVENTION An object of the present invention is to provide a new pulse signal control circuit that eliminates the high resistance in order to eliminate the above-mentioned drawbacks.

According to the present invention, the first diode is connected between the emitter and the base of the first transistor with a polarity opposite to the diode characteristic between the emitter and the base, and the first diode is connected between the collector and the emitter of the second transistor. A clamp diode was connected to the polarity such that the emitter side was positive, a first resistor was connected between the emitter and the base, the emitter was connected to a fixed potential, and the collector was connected to the base of the first transistor. In the circuit, a first high-frequency pulse is applied to the collector of the first transistor, and a second high-frequency pulse having an opposite phase to the first high-frequency pulse is applied to the emitter via a capacitor.
A pulse signal control circuit characterized by a configuration in which input data is inputted to each base of the second transistor is obtained.

Next, the present invention will be explained in detail with reference to the waveform diagrams of FIG. 2 and FIG. 3 showing one embodiment of the present invention. In one embodiment of the invention shown in FIG.
Elements common to those in FIG. 1 are labeled with the same numbers as in FIG.
A clamp diode 8 is connected between the emitters with a polarity such that the emitter side is positive, and a first high-frequency pulse a is input to the emitter of the first transistor 4 via a capacitor 7 to the collector of the first transistor 4. A second high-frequency pulse d having an opposite phase is input.

Now, when the polarity of the input data b is positive, the second transistor 4 is turned on, and the emitter of the first transistor 1 is almost fixed to the emitter potential of the second transistor 4 based on the same operating principle as described above. be done. Next, when the polarity of the input data b is negative, the second transistor 4 is turned off. At this time, the current caused by the second high-frequency pulse d having the opposite phase to the first high-frequency pulse a through the capacitor 7 is passed from the base of the first transistor 1 to the collector by the clamp diode 8 and the first diode 3. , and charges are accumulated between the base and collector of the first transistor 1. Next, when the current caused by the first high-frequency pulse a flows through the collector-base capacitance of the first transistor 1 to the base of the first transistor 1, it is accumulated between the base and collector of the first transistor 1. The accumulated charge is reverse biased and flows to the emitter, accelerating the current through the collector-base capacitance, resulting in an operating state. Therefore, even if the high resistance is omitted, the same output C' as described above can be obtained.

As described above, according to the pulse signal control circuit of the present invention, since a high resistance is omitted, power loss on the high frequency pulse input side can be significantly reduced, and a circuit that can be easily fabricated into a monolithic chip is provided.

Note that in Figure 2, NPN type transistors are used for the first and second transistors, but even if these are configured as PNP type transistors, the polarities of the first diode and clamp diode are simply reversely connected. Of course, exactly the same effect can be obtained.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram for obtaining a conventional amplified pulse data signal, Fig. 2 is a circuit diagram showing an embodiment of the present invention, and Fig. 3 is a waveform diagram for explaining Figs. 1 and 2. are shown respectively. DESCRIPTION OF SYMBOLS 1... First transistor, 2... First resistor, 3... First diode, 4... Second transistor, 5... Second resistor, 6... Second diode, 7... ...Capacitor, 8...Clamp diode.

Claims (1)

[Claims] 1 A first diode is connected between the emitter and base of the first transistor with a polarity that is opposite to the diode characteristic between the emitter and base, and a first diode is connected between the collector and the emitter of the second transistor with a polarity such that the emitter side is positive. A clamp diode is connected to the circuit, a first resistor is connected between the emitter and the base, the emitter is kept at a fixed potential, and the collector is connected to the base of the first transistor.
A pulse signal characterized by a configuration in which a high-frequency pulse is input to the emitter, a second high-frequency pulse having an opposite phase to the first high-frequency pulse is input to the emitter via a capacitor, and input data is input to the base of the second transistor. control circuit.