JPH0136118B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a testing device for active matrix substrates used in display devices such as liquid crystal displays.

As shown in FIG. 1, an active matrix substrate has transistors and capacitors for charge storage arranged in a matrix. line input
X ₁ -Xi are wired to the gates of the transistors to select rows of the matrix. Lines Y ₁ to Yj, which serve as data inputs, store data as charges in storage capacitors via transistors for selected rows. The electrodes E ₁₁₁ to Eij of this capacitor serve as drive electrodes of the display device, and drive the display medium on these electrodes. The operation of this matrix is to first set the data to be put into E ₁₁ - Eij in Y ₁ - Yj, turn on the transistors Tr ₁₁ - Tr ₁ j by line X ₁ , and turn on the capacitors C ₁₁ - C ₁ j.
stores the signal as an electric charge. This signal is a binary signal corresponding to "0" and "1" in the case of graphics, and it is a binary value corresponding to "0" and "1" in the case of an image signal such as a television.
It is a continuous value towards . Furthermore, E ₂₁ ~ E ₂ j
Prepare data to be set in Y ₁ to Yj, turn on transistors Tr ₂₁ to Tr ₂ j by gate line X ₂ , and store signals in C ₂₁ to C ₂ j. similarly
When a signal is input to the rows Ei ₁ to Eij indicated by Xj,
Return to X ₁ and repeat this action, cyclically refreshing in sequence.

FIG. 2 shows a cross-sectional view of a device that creates this active matrix on a Si wafer and also drives a liquid crystal display. First, stopper the Si wafer 4.
Diffusion layers of the P ⁺ region 6 and the N ⁺ region 5 which will become the source and drain of the transistor are formed, and a gate electrode 10 and a capacitor electrode 9 (using polysilicon) are formed on the gate film 8. The parts other than the gate film are covered with a field film 7. On top of this, attach the PSG film 11 and make a contact hole to connect the column line Y ₁ ~
Al wiring 13 becomes Yj and drive electrode E ₁₁ - becomes Eij
Al electrode 12 is formed. Thereafter, a glass plate 1 provided with a Nesa film 2 serving as a common electrode is sandwiched and then liquid crystal 3 is sealed. In this device, if the potential difference between the drive electrode 12 and the common electrode 2 is greater than or equal to a predetermined potential difference, the liquid crystal is lit, and if it is less than that, the liquid crystal is not lit. Gray scale is also possible depending on the potential. As a result, a matrix display of i rows by j columns of dots is completed, with this drive electrode as one dot.

Naturally, it is better for the active matrix substrate used here to have fewer defects; if there is a defect, the dot or line will always appear on the display device as lit or non-lit, and the device will be defective. For example storage capacitor C ₁₁ ~Cij
A leak (due to a defect in the insulating film 8, etc.) or a transistor leak (due to a defective diffusion junction) will cause a pixel defect, and a leak from a transistor connected to the line Y ₁ -Yj will cause a line defect. , leakage from lines X ₁ to Xi also appears on the display panel as defects in the horizontal lines. Therefore, before making a panel, it is necessary to check whether there is a defect or not, and if so, to determine whether the board is defective or not, and to discard the board or remove or correct the defect to make it a good product. However, in the past, for the line (i+j)
It was possible to measure leakage or disconnection by probing the pads that serve as signal inputs, but there are (i x j) dot elements, so probing each drive electrode to detect leakage or disconnection Checking takes a huge amount of effort. For example, in the case of a TV image, i = 200, j = 200, and the number of elements is 40,000, making it almost impossible to measure them and having to sort out good and defective products after actually making the panel, which is extremely inefficient. Also, the yield was extremely low. Even if you take measurements, the permissible value is a minute current of 1 uA to 100 pA, making the measured values unstable and unreliable.

Therefore, an object of the present invention is to measure the presence or absence of defects and addresses of all defects from lines to elements in a short time before making a panel display device.
It is an object of the present invention to provide a method that can remove removable defects using a laser or the like to produce good quality products, and also separate them from those that cannot be removed.

The present invention is characterized by using a dynamic method to check for leakage of charges accumulated in capacitors for both lines and elements, whereas conventionally all leakage etc. for lines have been measured using direct current. If there is a leak, the charge stored in the capacitor will disappear after a certain period of time, and if there is no leak, the charge will be retained.By taking advantage of this fact, we can detect the change in the amount of charge at a certain period. The presence or absence of element defects and their addresses can be determined.

FIG. 3 shows an example of an active matrix board test system of the present invention. Matrix 5
3 is exactly the same as in FIG. The shift register 37 for controlling the signals of the X line receives a clock signal 44 from the computer 35, a data signal 45 for selecting only one of X ₁ to Xi, signals 42 and 43 for resetting and setting all internal parts, and It is controlled by a signal 55 which resets all outputs only. Output Gx ₁ ~ Gxi, ₁ ~ is line X ₁ ~
This is a switch that selects Xi between GND potential and _VDD potential. The ammeter 56 measures the current flowing into each line from _VDD and outputs it as a digital signal 54. The shift register 33 outputs a signal for selecting the Y line and is controlled by the computer 35 in exactly the same way as the shift register 37. The common signal line driver 34 outputs "0" or "1" and drives the common signal line 38 by opening and closing the switch Sy. The comparator 31 compares the potential of the common signal line with a comparison level Vc set by the D/A converter 32. The transistors Ty ₁ -Tyj serve as switches for connecting or disconnecting the Y line and the common signal line according to the outputs Cy ₁ -Gyj of the shift register.

Flowcharts of test operations in this system are shown in FIGS. 4, 5, and 7.

Figure 4 is an example of measuring leakage on the X line. First, reset the shift register, and _then
Tx′i is made conductive and X ₁ to Xi are set to GND potential.
After that, the shift circuit sequentially turns on Tx ₁ to Txi, sets X ₁ to Xi to V _DD potential one by one, checks the leakage using the ammeter 56, records any leakage, and records it later when removing defects. Use address.

FIG. 5 is a flowchart for measuring leakage of the Y line. First, the X-side shift register 37 is reset, all of X ₁ to Xi are set to GND potential, and all transistors are turned off so that no elements are included. After that, set the shift register 33,
Turn on all Ty ₁ to Tyi by Gy ₁ to Gyj, set the driver to “1” potential (V _DD potential), and switch Sy
is opened, and the capacitors Cy ₁ to Cyj parasitic on the Y line are simultaneously charged to a potential of "1" and the electrolyte is accumulated. Immediately after that, the shift register 33 is reset, Ty ₁ to Tyj are turned OFF, and the process waits in this state for a certain period of time. After that, set the common signal line driver 34 to “0”
Turn on the switch Sy to the potential, discharge the charge in the capacitor C _IN , and immediately close Sy to make the common line 38 high impedance. After that, the shift register 33 is operated, and first the Gy signal is used to operate the shift register 33.
Turn on Ty ₁ and divide the charge accumulated in Cy ₁ with C _IN . FIG. 6 shows this operation. Common signal line 3
When the potential Vo of 8 is selected by Gy ₁ , C _IN is charged by the charge of Cy ₁ . If the charge of Cy ₁ is not lost, the value will be determined by a predetermined capacitance ratio, and Vc will be set slightly below this value to latch the comparison result using the strobe pulse STB during the strobe period. If there is a leak in the line
The charge on Cy ₁ has been lost and the potential on Vo will not exceed Vc, which can be determined from the output of the comparator 31. If there is a defect here, the address is also recorded and this operation is repeated sequentially up to Yj.

FIG. 7 is a flowchart for measuring elements.
First, set the output of the driver 34 to “1” and turn on the switch.
Turn on Sy. Next, the shift register 33 is set and Ty ₁ to Tyj are turned ON. After this, the shift register 37 selects i from the first row by X ₁ to Xi.
The transistors are sequentially turned on row by row up to the row, and charges are accumulated in the capacitors C ₁₁ to Cij. This X ₁ ~
The cycle selected by Xi is set around 1/i of the refresh cycle of the matrix. Next, reset the two shift registers and set the driver to "0". First, set the shift register 33, turn on all Ty ₁ to Tyj, discharge the charges in Cy ₁ to Cyj and C _IN , and then close Sy. into a high impedance state.
Next, reset the shift register 33 and set Ty ₁ to
After turning off Tyi, first select X ₁ using the shift register 37, turn on Tr ₁ ~ Trij, and change to Y ₁ ~ Yj.
Read out the charge of C ₁₁ 〜〜Cij. Thereafter, the shift register 33 is scanned to sequentially turn on Ty ₁ to Tyj one by one, and the charges of Cy ₁ to Cyj are read out to C _IN .
FIG. 8 shows this state. When one of X ₁ to Xj is selected, the charge of the element moves to Y ₁ to Yj according to the capacitance ratio. Then Gy ₁
When Tr ₁ ~Tyj is turned on by ~Gyj, this charge further moves to C _IN . As a result, the potential of the common line 38 will eventually become Vc ₁ and Vc ₂ if no charge is dissipated.
It's between. FIG. 9 shows a specific example of this circuit, in which two comparator levels Vc ₁ and Vc ₂ are created by the D/A converter 60, and each comparator 61,
62 and input to latches 63 and 64. If there is a leak in the element, Vo will be Vc ₁
not exceed. Moreover, if there is a leak between the element and the X ₁ to Xi lines, when X ₁ to Xi become "1", it will be reversely charged and Vo will exceed Vc ₂ . In this way, the defect status and address of the element are recorded. Also, if there is a break in the X line or Y line, the element. Through testing, defects appear in a linear pattern and can be determined.

C ₁₁ ~Cij in Figure 3 is approximately 1 ~ 10 pF, Cy ₁ ~
Cyi is approximately 10 to 50 pF, C _IN is approximately 10 pF to 100 pF, V _DD =
Assuming 10V, the level to be determined only needs to have a resolution of 5wV at most, and this is possible.

The present invention uses charge leakage over a certain period of time as a test parameter for an active matrix. According to this method, even a minute leakage of several hundred pA can be easily measured by replacing it with a time constant. Elements that were previously impossible can be measured reliably. In addition, although the simplest test flow is shown here as an example, crosstalk tests and reverse leak tests (defects caused by charging) can also be implemented by combining these. Moreover, the system shown in FIG. 3 is of course only one example, and the same function can be realized by other circuits.

In the method of the present invention, the test can be completed within about 1 second when the refresh cycle of one matrix board is 30 msec. This is the result of another test. All defect conditions and addresses are recorded, and defective portions are automatically or manually removed (for example, by cutting the Al wiring). As a result, matrix substrates can be quickly sorted into good and defective ones, and even substrates with defects can be repaired, resulting in better assembly efficiency and significantly improved yields.

As described above, the present invention provides row-direction data signal selection means that has the number of output terminals corresponding to the number of rows of a matrix display device and selects one voltage from binary voltages for each row and outputs it to each output terminal; A measuring means for measuring the amount of current in each row while the one voltage is applied to each row output terminal, a plurality of switch groups connected to the digit signal line of the matrix display device, and a plurality of switch groups connected to the plurality of switch groups. A common signal line connected in common, a common signal line driver that supplies charge to the common signal line via a switch, a capacitance storage means provided on the common signal line, and a potential and a predetermined potential of the capacitance storage means. The common signal line driver supplies charge to the parasitic capacitance of each column signal line of the matrix display device, and the switch group sequentially operates the digits. The signal line and the common signal line are electrically connected to divide and supply the charge accumulated in the parasitic capacitance to the capacitance storage means, and the comparison means is generated by the charge accumulated in the capacitance storage means. Since the potential is compared with the predetermined potential and the comparison result is output, it is possible to reliably analyze and detect some defects in the column signal and digit signal lines. Therefore, it is possible to check for defects in the panel substrate at the manufacturing process stage before it can be assembled and displayed as a panel of a matrix display device.

Furthermore, the matrix display device includes a plurality of switching elements arranged in a matrix and a plurality of capacitors connected to the switching elements, and the common signal line driver connects all of the capacitors via the switching elements. After supplying the charge, the row direction data signal selection means conducts the switching elements for one row, and the switch group conducts the digit signal line and the common signal line to reduce the parasitic capacitance. The electric charge stored in the capacitance storage means is divided and supplied to the capacitance storage means, and the comparison means compares a potential generated by the electric charge stored in the capacitance storage means with the predetermined potential and outputs a comparison result. Therefore, it is possible to easily and automatically detect a defect in each pixel in a matrix display or a defect in each switching element, which was previously impossible.

[Brief explanation of drawings]

FIG. 1 shows a circuit of an active matrix substrate, and FIG. 2 shows a cross-sectional view of a liquid crystal display panel. FIG. 3 shows an example of the configuration of a matrix board test system according to the present invention. or,
4, 5, and 7 show examples of test flows using the system of FIG. 3. FIGS. 6 and 8 illustrate the operation of the charge readout system of the present invention. FIG. 9 shows the configuration of a comparison circuit for determining the operation of FIG. 8. 1... Glass, 2... Nesa film, 3... Liquid crystal, 4
...Si wafer, 9,10 ...polycrystalline silicon, 8
...Gate film, 7,11...Field film, 1
2, 13...Al, 33, 37...Shift register.

Claims (1)

[Scope of Claims] 1. Row direction data signal selection means having the number of output terminals corresponding to the number of rows of the matrix display device and selecting one voltage from binary voltages for each row and outputting it to each output terminal; A measuring means for measuring the amount of current in each row while the one voltage is applied to each row output terminal, a plurality of switch groups connected to the digit signal line of the matrix display device, and a plurality of switch groups connected to the plurality of switch groups. A common signal line connected in common, a common signal line driver that supplies charge to the common signal line via a switch, a capacitance storage means provided on the common signal line, and a potential and a predetermined potential of the capacitance storage means. The common signal line driver supplies charge to the parasitic capacitance of each column signal line of the matrix display device, and the switch group sequentially operates the digits. The signal line and the common signal line are electrically connected to divide and supply the charge accumulated in the parasitic capacitance to the capacitance storage means, and the comparison means is generated by the charge accumulated in the capacitance storage means. A test device for a matrix display device, characterized in that it compares a potential with the predetermined potential and outputs a comparison result. 2 Row direction data signal selection means having the number of output terminals corresponding to the number of rows of the matrix display device and selecting one voltage from binary voltages for each row and outputting it to each output terminal; A measuring means for measuring the amount of current in each row while being applied to the output terminal, a plurality of switch groups connected to the digit signal line of the matrix display device, and a plurality of switch groups connected in common to the plurality of switch groups. A common signal line, a common signal line driver configured to supply charge to the common signal line via a switch, a capacitance storage means provided on the common signal line, and a comparison between the potential of the capacitance storage means and a predetermined potential. , a comparison means for outputting a comparison result, the matrix display device includes a plurality of switching elements arranged in a matrix, and a plurality of capacitors connected to the switching elements, and the common signal line driver includes: , supplies charges to all of the capacitors via the switching elements, and after supplying the charges, the row direction data signal selection means conducts the switching elements for one row, and the switch group connects the digit signal line and the common The electric charge stored in the parasitic capacitance is dividedly supplied to the capacitance storage means by electrically connecting the communication signal line, and the comparison means compares the potential generated by the electric charge stored in the capacitance storage means with the predetermined potential. 1. A test device for a matrix display device, characterized in that the test device compares and outputs the comparison results.