JPH01315162A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH01315162A
JPH01315162A JP63291520A JP29152088A JPH01315162A JP H01315162 A JPH01315162 A JP H01315162A JP 63291520 A JP63291520 A JP 63291520A JP 29152088 A JP29152088 A JP 29152088A JP H01315162 A JPH01315162 A JP H01315162A
Authority
JP
Japan
Prior art keywords
groove
isolation region
device isolation
wells
leak
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63291520A
Other languages
Japanese (ja)
Other versions
JPH0583182B2 (en
Inventor
Isamu Minamimomose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7022188 external-priority
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP29152088A priority Critical patent/JPH0583182B2/ja
Priority to KR1019890003481A priority patent/KR940003218B1/en
Priority to US07/327,234 priority patent/US4923821A/en
Priority to EP89109220A priority patent/EP0399066B1/en
Publication of JPH01315162A publication Critical patent/JPH01315162A/en
Priority to US07/517,580 priority patent/US5206535A/en
Publication of JPH0583182B2 publication Critical patent/JPH0583182B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a transistor where a threshold value of a parasitic MOS transistor in a device isolation region has a sufficient capacity and especially a leak between wells is hard to cause by combining a thermal diffusion operation of the wells with a rounding treatment of edges at the upper part of a groove in the device isolation region.
CONSTITUTION: A groove is formed in a silicon substrate 101 by an anisotropic etching operation by making use of a photoresist 116a as a mask; ions of impurities of a first conductivity type and a second conductivity type are implanted into arbitrary positions on the substrate 101 by making use of individual resists 116b, 116c as masks. Then, the silicon substrate 101 is oxidized, e.g., at 1150°C; a thermal oxide film 121a is formed; a rounding oxidation treatment to remove edges of the groove to be used as a device isolation region is executed; a CVD oxide film 122 as an insulating film whose film thickness is thicker than a depth of the groove is formed. By this setup, a threshold value of a parasitic MOS transistor in the device isolation region can have a sufficient capacity; especially, it is possible to restrain a leak between wells from being caused.
COPYRIGHT: (C)1989,JPO&Japio
JP29152088A 1988-03-24 1988-11-18 Expired - Lifetime JPH0583182B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP29152088A JPH0583182B2 (en) 1988-03-24 1988-11-18
KR1019890003481A KR940003218B1 (en) 1988-03-24 1989-03-21 Forming trench in semiconductor substate with rounded corners
US07/327,234 US4923821A (en) 1988-03-24 1989-03-22 Forming trench in semiconductor substrate with rounded corners
EP89109220A EP0399066B1 (en) 1988-03-24 1989-05-23 Method of manufacturing a semiconductor device comprising an isolation region and a well region
US07/517,580 US5206535A (en) 1988-03-24 1990-05-01 Semiconductor device structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7022188 1988-03-24
JP29152088A JPH0583182B2 (en) 1988-03-24 1988-11-18

Publications (2)

Publication Number Publication Date
JPH01315162A true JPH01315162A (en) 1989-12-20
JPH0583182B2 JPH0583182B2 (en) 1993-11-25

Family

ID=26411391

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29152088A Expired - Lifetime JPH0583182B2 (en) 1988-03-24 1988-11-18

Country Status (1)

Country Link
JP (1) JPH0583182B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002043534A (en) * 2000-07-28 2002-02-08 Nec Corp Semiconductor device and manufacturing method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4869396B2 (en) 2009-12-07 2012-02-08 株式会社東芝 Electroforming master and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002043534A (en) * 2000-07-28 2002-02-08 Nec Corp Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPH0583182B2 (en) 1993-11-25

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