JPH01302456A - Data transfer control system using channel control block - Google Patents

Abstract

PURPOSE:To make data transfer faster when data between a main memory and an input/output device are transferred with dividing them by executing a processing to replace a next channel command word with a channel control block even when the data transfer under an execution is not completed. CONSTITUTION:A request from a CPU 10 in a data transfer system is received by a microprocessor 31, and a channel command word CCW 1 is fetched from the area of a main memory 20 designated by the request. The CCW 1 fetched by the processor 31 is decoded, and the respective types of transfer parameters necessary for the data transfer at the section of a device 20 designated by the CCW 1 are set at a hardware transfer mechanism. Next, the CCW fetched by the processor 31 is replaced with a channel control block CCWB 1 in a decodable format by means of a magnetic disk controller 50, and it is stored in one of CCB memory areas CCBA1 or CCBA2 secured in a RAM 33.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) This invention provides a channel command word retrieved from a main storage device to a channel in response to a request from a CPU, to a controller that controls an input/output device. The present invention relates to a data transfer control method in which a controller converts data into a decodable channel control block and transfers data between channels and input/output devices by a controller in accordance with the channel control block.

(Prior Art) Generally, data transfer between a main storage device and a disk drive is performed in accordance with the procedure shown in FIG. 3 when a CPU issues a request (start subchannel command) to a channel. First, when a channel receives a request from the CPU, it collects the information necessary for data transfer (read/write transfer type, transfer size, addresses indicating the transfer source and transfer destination, etc.) from the main storage area indicated by the request. The channel command word CCW in which the channel command word CCW is written is fetched and decoded, and a setup operation for data transfer with the main storage device specified by this channel command word CCW is performed. The channel also converts (replaces) the fetched channel command word CCW into a channel control block CCB in a format that can be read by the disk controller.
Then, an operation is performed to store it in a channel control block storage area (hereinafter referred to as CCB storage area) CCBA within the channel. This operation is performed by microprogram processing.

When the channel stores the channel control block CCB in the CCB storage area CCBA, the channel notifies the disk controller of this fact. This causes the disk controller to
A channel control block CCB is fetched from the CCB storage area CCBA of the channel, and the block CCB is decoded. The disk controller then issues a request to the channel to transfer data, and upon receiving an acknowledgment from the channel,
The channel specified by the fetched block CCB,
Transfer data between disk drives.

In parallel with this data transfer, data transfer between the channel and the main memory is performed by a hardware transfer mechanism within the channel. When the disk controller finishes the above data transfer, it stores a channel control block CCB in the CCB storage area CCBA of the same channel in order to notify the channel of the status of the transfer result (transfer result status).
(ie, CCB rewrite processing that sets a transfer result status indicating whether or not the executed data transfer has ended normally in a predetermined field of the CCB and notifies it to the channel). The above is the procedure for one data transfer. Here, a series of operations consisting of CCB fetch, data transfer, and CCB rewrite in the disk controller is called CNT transfer (controller transfer).

Now, if the main memory exceeds the maximum transfer size of the channel,
If it is necessary to transfer data between disk drives, this data transfer must be performed several times. In this case, CCWI is used to divide the necessary data transfer.
, CCW2.

Several channel command words such as CCW3, . . . are generated in the main memory, and data transfer is performed according to the procedure shown in FIG. First, the first main memory.

Data transfer between disk drives is performed in the same procedure as in FIG. 3. The next second transfer is the first transfer (CN
Waiting for the completion of the CC transfer by the controller
Waiting until the B rewrite is completed and the CCB storage area CCBA is released, the channel replaces the second channel command word CCW2 with the corresponding channel control block CCB2 and stores the CCB storage area CCBA as shown in FIG. This is done after storing the . The third transfer is also similar to the second transfer. As is clear, the channel's microprogram processing routine uses CCW for the second and subsequent transfers.
After CF etching, the controller stores the CCB storage area CCBA.
It remains in an idle loop state until the CCB rewrite to is completed. Therefore, replacement with CCB is delayed, causing a delay in data transfer.

(Problem to be Solved by the Invention) As mentioned above, conventionally, when data transfer exceeding the maximum transfer size of a channel is performed by dividing it according to several channel command words, the microprogram routine of the channel during data transfer The problem is that the process of replacing the next channel command word with a channel control block cannot proceed until the data transfer of the corresponding controller is completed and the CCB rewrite is completed, and therefore high-speed data transfer cannot be performed.

Therefore, the present invention aims to solve the problem of making it possible to replace the next channel command word with a channel control block even if the data transfer in progress is not completed, thereby increasing the speed of data transfer. shall be.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides two channel control block storage areas for alternately storing channel control blocks converted from channel command words fetched from a main memory to a channel. At the same time, the controller that controls the input/output device fetches the channel control block from the channel and transfers data between the channel and input/output device specified by the block, and when the data transfer is completed, The present invention is characterized in that data transfer means is provided for performing the rewrite process while alternately switching between the two channel control block storage areas.

(Operation) According to the above configuration, even during data transfer according to a channel control block stored in one of the two channel control block storage areas, the next data fetched from the main storage to the channel for the next data transfer is can be converted into a corresponding channel control block by microprogram processing and stored in the other of the two channel control block storage areas. Therefore, when the controller finishes the data transfer being executed and rewrites the channel control block in the channel control block storage area of one of the above, it immediately fetches the next channel control block from the other channel control block storage area. Then, the next data transfer can be performed.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of an information processing system to which the present invention is applied. In the figure, IO is a CPU that controls the entire system.

20 is a main memory, and 30 is a channel for transferring data to and from the main memory 20 in response to a request (start subchannel command) from CPU10. Channel 30 is
It has a microprocessor 31 that controls the entire channel 30, a ROM 32 in which control programs for the microprocessor 31, etc. are stored, and a RAM 33. This RAM 18 has two CCs for storing channel control blocks replaced from channel command words by the microprogram processing of the microprocessor 31.
B (channel control block) storage area CCBAI, C
CBA2 is secured. Note that the hardware, hardware transfer mechanism, etc. that transfer data to and from the main storage device 20 are omitted.

40 is an input/output device, for example a magnetic disk drive, 50
is a magnetic disk controller that controls the magnetic disk drive 40. The magnetic disk controller 50 is
The CCB storage areas CCBAI and CCBA2 are alternately switched, and the channel 30 . It is configured to transfer data between magnetic disk drives 40. CCWI to CCW4 are channel command words generated in the main storage device 20. These channel command words CCWI to CCW4 are stored in the main memory 20. The main storage device 20. which has information necessary for data transfer between the magnetic disk drives 40, and which exceeds the maximum transfer size of the channel 30 in this example. It is generated in order to divide and execute data transfer between magnetic disk drives 40.

Next, the operation of the configuration shown in FIG. 1 will be explained using the channel command words CCWI to
Main memory 20. according to CCW4. Taking as an example a case where continuous data transfer is performed between magnetic disk drives 40,
This will be explained with reference to the timing chart in FIG.

First, a request (start subchannel command) is issued from the CPU 10 to the channel 30. When the microprocessor 31 of the channel 30 receives the request from the CPU10, it fetches the channel command word CCWI from the area of the main storage device 20 specified by the request, as shown in FIG. The microprocessor 31 of the channel 30 then decodes the channel command word ccwi fetched from the main memory 20, and determines various transfer parameters (not shown) necessary for data transfer to and from the main memory 20 specified by the CCWI. Set to hardware transfer mechanism. Next, the microprocessor 31 sends the fetched channel command word CCWI to the magnetic disk controller 50.
Channel control block CC in a format that can be read by
Two CCs replaced with BI and secured in RAM38
B storage area CCBAI.

A process of storing the data in, for example, CCBAI of CCBA2 is performed (see FIG. 2).

When the microprocessor 31 of the channel 30 finishes storing the channel control block in the CCB storage area CCBAI, it notifies the magnetic disk controller 50 of this fact. As a result, the magnetic disk controller 50
CCB storage area CCBA in RAM 33 of channel 30
Channel control block CCBI is fetched from I and decoded, and based on the decoding result, channel control block CCBI is fetched from I and decoded.
Channel 30 specified by BI. magnetic disk drive 4
Data is transferred between 0 and 0, and after the transfer is completed, the channel control block CC is stored in the CCB storage area CCBAI of channel 30.
Rewrite BI and transfer result status to channel 30
Perform CNT transfer to notify. In parallel with the above data transfer, the main storage 20. Data transfer between channels 30 is performed by a hardware transfer mechanism within channel 30, and ultimately ends up in main memory 20. The first data transfer between the magnetic disk drives 40 will be performed.

Now, the second transfer is performed in the following steps.

First, when the microprocessor 31 of the channel 30 is replaced with the channel control block CCBI, the CPU
The next channel command word CCW2 requested by l0 is fetched from main memory 20 during the first data transfer as shown in FIG. The microprocessor 31 is C
When CW2 is fetched, the first data transfer (CNT
CCW2 is replaced with the corresponding channel control block CCB2 without waiting for the end of the transfer), and the previously used CCB
Microprogram processing is performed to store in a storage area different from the storage area CCBAI, that is, the CCB storage area CCBA2 (see FIG. 2). When the microprocessor 31 of the channel 30 finishes storing the channel control block in the CCB storage area CCBA2, it notifies the magnetic disk controller 50 of this fact.

As a result, the magnetic disk controller 50 switches the CCB storage area after completing the first data transfer described above, and this time fetches the channel control block CCB2 from the CCB storage area CCBA2, and as shown in FIG.
Perform the second data transfer (CNT transfer).

After replacing the channel command word CCW2 with the channel control block CCB2 as described above, the microprocessor 31 of the channel 30 further stores the next channel command word CCW3 in the main memory 20 in response to a request from the CPUIG.
fetch from And the microprocessor 31
As shown in Figure 2, the first data transfer is completed and the CC
If the B storage area CCBAI is released, the fetched CCW3 is immediately replaced with the corresponding channel control block CCB5 and stored in the CCB storage area CCBAI, and the magnetic disk controller 50 is notified of this.

As a result, the magnetic disk controller 50 switches the CCB storage area again after completing the second data transfer described above, and this time, as in the case of the first data transfer, the magnetic disk controller 50 switches the CCB storage area again.
B storage area CCB A 1. The channel control block CCB5 is fetched from CCB5, and the third data transfer (CNT transfer) is performed as shown in FIG. Data transfer is performed using the same procedure from the fourth time onwards.

The above description has been made regarding the case where data transfer control using channel control blocks is performed for a magnetic disk device, but the present invention is similarly applicable to cases where input/output devices other than magnetic disk devices are targeted.

[Effects of the Invention] As detailed above, according to the present invention, the next channel command word can be sent even if the data transfer in progress is not completed (that is, even if the controller controlling the input/output device is busy). Since the process of replacing the block with a channel control block can be performed, the speed of data transfer can be increased when data transfer between the main storage device and the input/output device is performed in several steps.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an embodiment of the present invention, FIG. 2 is a timing chart for explaining the operation, and FIG.
The figure is a timing chart showing the basic procedure for one data transfer, and FIG. 4 is a timing chart showing the conventional procedure when data transfer is performed in multiple steps. 10... CPU, 20... Main storage device, 30...
Channel, 31...Microprocessor, 40...
Magnetic disk drive, 50...Magnetic disk controller, CCW1 to CCW4...Channel command word, CCBAI. CCBA2...CCB (channel control block) storage area. Applicant's agent Patent attorney Takehiko Suzue Figure 3 Figure 4

Claims (1)

[Scope of Claims] A channel command word retrieved from the main memory in response to a request from a CPU is converted into a channel control block in a format that can be read by a controller that controls an input/output device, and the above-mentioned In an information processing system equipped with a channel for transferring data to and from a main storage device, two channels for alternately storing the channel control blocks converted from the channel command words in the channel
At the same time, the controller extracts the channel control block from the channel control block storage area and transfers data between the channel specified by the block and the input/output device, and A data transfer means is provided that executes an operation of rewriting the same block at the end of the transfer while alternately switching between the two channel control block storage areas, and one of the two channel control block storage areas is released. Even if the next channel command word is previously retrieved from the main memory, the same command word is converted into the corresponding channel control block and stored in the other of the two channel control block storage areas. A data transfer control method using channel control blocks characterized by: