JPH01298961A - Inverter device - Google Patents

Abstract

PURPOSE:To reduce size, weight and noise by inserting PWM semiconductor switches each having high speed switching characteristic in a DC power source and an inverter circuit. CONSTITUTION:An inverter device is composed of semiconductor switches Q1-Q4, etc., an AC voltage between points (a) and (b) is used as a sine wave voltage having a small distortion through the reactor L and the capacitor C of an AC filter, and applied to a load Load. In this case, an anti-parallel circuit of a PWM semiconductor switch Q5 and a diode D5 is added to the inverter device. The diode D5 feeds back the reactive power of the reactor L, the capacitor C of the AC filter and the load Load to a DC power source E. Thus, the switch Q5 is intermittently interrupted by a controller to apply a DC PWM voltage to the inverter circuit, and switches the switches Q1-Q4 of the inverter circuit during a period in which the switch Q5 is OFF. As a result, the switching can be conducted in a state that the voltage is zero.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to the configuration of an inverter device that converts DC power to AC power.

(Prior art and problems to be solved by the invention) OA-F
Commercial power outages due to the spread of AI devices.

There is a growing need for highly reliable power sources in case of momentary power outages, and there is a growing momentum to introduce so-called uninterruptible power supplies (hereinafter referred to as tJPs).

The situation has changed so that UPSs are now being installed in offices, and recently there has been a strong demand for UPSs to be smaller and lighter, as well as to suppress the noise generated by the equipment.

As a technology that satisfies these demands, there is a so-called high-frequency switching technology that increases the switching frequency. By the way, looking at the technology of semiconductor switches used for switching, the ones currently used for UPS are mainly bipolar transistors and power MO3FETs.

Bipolar transistors have a large U of more than 100 ν^
It is the most popular and is also used in PSs, but unfortunately the switching speed is slow and the switching frequency can only be increased by about 5kllz at most. This is constrained by the fact that the power loss associated with switching is greater than the power loss during energization, and the thermal limit of use is reached.

On the other hand, power MO3FETs are also used for switching at frequencies of 20 kHz or higher due to their low switching loss, but due to the small current carrying capacity of the elements, they are only used in UPSs of up to a few kVA, and are not suitable for large-capacity UPSs. It is economically unreasonable to apply it to

Therefore, with the current technology, it is not economical to apply a switching frequency of 20 kHz or higher, which is an inaudible frequency band, to a large-capacity UPS, and as a result, it is difficult to reduce noise and reduce the size and weight of the equipment. The effects cannot be fully demonstrated.

The basic configuration of a UPS is a rectifier that converts AC input into DC, a battery, and an inverter that converts DC power back into AC power. Among these, inverter devices are dominant.

Next, conventional examples and problems with inverter devices that are targeted for reduction in size, weight, and noise suppression will be explained using figures.

FIG. 5 shows a configuration example of a conventional inverter device.

A control device for controlling on/off of the semiconductor switches Q and Q4 is omitted. FIG. 6 shows an example of operating waveforms.

When the semiconductor switches Q,, Q, are turned on, the DC power supply E
voltage appears between points a and b. Next, when Qt and Qs are turned on, a polar voltage opposite to the previous one appears between points a and b. The AC voltage between 0 points a and b (solid line in Figure 6) acts as a reactor of the AC filter, and capacitor C The voltage of the capacitor C which is added to the voltage and attenuated the high frequency voltage, that is, the sine wave voltage with small distortion (broken line in FIG. 6) is applied to the load Load.

6(A) is a voltage waveform at point 0 a when the semiconductor switches 01 to 04 in FIG. 5 are turned on and off once per cycle.

b, that is, the output voltage of the inverter circuit, has a low-order voltage, for example, Since a large amount of voltage such as fifth-order harmonics is included, the inductance of the AC filter to attenuate these voltages and the constant of the capacitor C must be large, which is a bottleneck in making the device smaller and lighter. .

6CB) is the semiconductor switch Q+~0 in FIG.
4 is a waveform obtained when so-called pulse width modulation (PWM) control is performed, in which many switching operations are performed within an AC half-wave of the output voltage. PWM*I? ill makes it possible to eliminate low-order harmonic components from the output voltage of the inverter circuit, and it is possible to reduce the size and weight of the AC filter, the actuator L, and the capacitor C. The higher the switching frequency is, the higher harmonic voltages can be eliminated, the reactor becomes more effective, and the effect of reducing the size and weight of the capacitor C becomes higher. Also, the switching frequency is 20kHz.
If it is set higher than z, the noise generated from the reactor L, which is the largest source of noise, will no longer be audible, and the purpose of reducing noise can be achieved.

However, bipolar transistors are selected as semiconductor switches used in large capacity inverter circuits from an economical point of view. The switching speed of bipolar transistors is slow, and therefore the loss generated at each switching is large, so that they are not suitable for high frequency switching, and the upper limit of the switching frequency is at most 5 kHz. Therefore, the reactor of the AC filter and the capacitor C
The effect of reducing the size and weight of the device is not sufficient, and the noise cannot be suppressed.

(Object of the Invention) In order to solve the above-mentioned problems, the present invention uses a semiconductor switch with large switching loss, such as a bipolar transistor, in an inverter circuit, and high-frequency PWM @
An object of the present invention is to provide an inverter device that can perform J control.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides an inverter circuit configured with a plurality of semiconductor switches that converts a DC type 1IIX voltage into an AC PWM voltage, and an inverter circuit that converts a DC type 1IIX voltage into an AC PWM voltage. an AC filter that attenuates the harmonic voltage contained;
In an inverter device consisting of a control device that controls the operation of an inverter circuit, a PWM semiconductor switch is interposed between a DC power source and an inverter circuit, and the PWM semiconductor switch is turned on and off.
The DC PWM voltage is converted into an AC PWM voltage by turning on and off a plurality of semiconductor switches constituting the inverter circuit during the off period of the PWM semiconductor switch.
The gist of the present invention is an inverter device characterized by converting voltage into M voltage.

(Example) The present invention will be explained in detail below using figures.

Note that the embodiments are merely illustrative, and it goes without saying that various changes and improvements can be made without departing from the spirit of the present invention.

FIG. 1 is a configuration example of an inverter device of the present invention, and FIG. 2 is a diagram for explaining the principle of the control method of the present invention.

The configuration in Figure 1 is the conventional inverter device in Figure 5 with PWM.
An anti-parallel circuit of a semiconductor semiconductor switch and a color diode D is added. The diode O5 serves as a reactor for the AC filter, and is necessary to feed back the reactive power of the capacitor C and the load Load to the DC power supply. P.W.
If the M semiconductor switch QS has a built-in anti-parallel diode like a power MO3FET, the external diode D can be omitted.

When the signal shown in FIG. 2(i) from the control device Cont is applied to the PWM semiconductor switch color, the intermittent DC PWM voltage shown in FIG. 2(ii) is applied to the inverter circuit.

During the period when aS is off, the semiconductor switch ports of the inverter circuit, Q4, are switched. When the control signals shown in FIG. 2 (iii) and (iv) are applied to the semiconductor switches 01 to Q4, the PWM voltage shown in FIG. Figure 2 (V)).

This voltage in Fig. 2 (V) is the inverter circuit's AC 2itP.
The WM output voltage is applied to the reactor of the AC filter, and is applied to the circuit of capacitor C and load Load.

Semiconductor switches require some time for switching. Due to the voltage and current applied to the semiconductor switch during this switching transition period, (voltage) x (current)
This results in a loss equal to the integration of the switching time. This is switching loss, which is a major cause of temperature rise in semiconductor switchers during high-frequency switching.

A semiconductor switch Q, which constitutes the inverter circuit of FIG.
Q4 switches when the voltage is zero, so the switching loss is small and can be ignored. Therefore, even a bipolar transistor with a slow switching speed, for example, can withstand a switching operation of 20 kHz.

On the other hand, PWM semiconductor switches that switch voltage and current have high-speed switching characteristics, for example, use power MOSFETs.In this case, the switching time is short, so the switching loss is small and it can be used for high-frequency switching.

FIG. 3 is a diagram for explaining the first high frequency PWM control method of the present invention. Send signal (i) from the control bag Wcont to the PWM semiconductor switch, and (ii) DC PW
Obtain M voltage. Semiconductor switch of inverter circuit 0. ~
A signal from the control device Con t (iii
) to (vi), the voltage (vi) of the pulse train of one polarity is generated during the period when Q and 04 are on, and the voltage (vi) of the pulse train of the other polarity is generated during the period when Q8 and Q are on. Appears between points a and b. This is the inverter circuit output AC P
WM voltage. All of the semiconductor switches 01 to Q4 are switched during the PWM semiconductor switch color switching period, that is, during the period when the DC PWM voltage (voltage (ii)) is at zero level.

The semiconductor switches Q and 04 and Q and Q perform complementary on/off switching operations, respectively. Figure 3 (v
The dashed-dotted lines α and β in i) are the output current of the inverter circuit, that is, the combined current of the five capacitors C on the reactor of the AC filter and the load Load. α is the power factor 1. This is the case when β is the lagging power factor.

When the power factor is 1, the phases of the AC PWM voltage and current α match, so the semiconductor switch Q+ of the inverter circuit
The same signal (V) as Q4 is applied to Q4, and the semiconductor switch Q2
Even if we give the same signal (vi) as Q, we get (vi
It is possible to obtain the AC PWM voltage of i). on the other hand,
When the power factor is low, for example when it is a lagging power factor like β, there is a difference between the polarity of the AC PWM voltage and the phase of the current, and the period during which the polarity of the voltage and current are different ((vii
) period I~■ and period ■~■) come to exist.

In this case, semiconductor switches Q1 and Q! It is convenient to control the voltage waveform if the switching is complementary as shown in (iii) and (iv). This will be explained with reference to the circuit diagram of FIG. 1. During the period I to H, the current i flows in the direction shown in the figure, so if the semiconductor switch Q2 is left off, the PWM semiconductor switch remains and the semiconductor switches Q+ and Qa are switched off. Even during the period when the power supply E is
As a result, the voltage at point C, which should originally be kept at zero voltage, increases to the power supply voltage E. As a result, a PWM configured to eliminate low-order harmonic voltages
The pattern is distorted and the voltage that should be erased appears in the output.

Semiconductor switch Q during the period when the voltage should be kept at zero level
2 is turned on and current i is passed through the semiconductor switch Q2.2. If it is made to flow through the loop of the diode D4, the voltage difference between points a and b becomes zero, and the PWM pattern is maintained according to the signal from the control circuit Cont.

Similarly, it is important to turn on the semiconductor switch Q during periods ① to ② of the next half cycle to ensure a zero voltage period.

FIG. 4 is a diagram illustrating the second control method.

What differs from FIG. 3 is the pattern of the signals (ij) and (iv). As mentioned in the previous method, in order to ensure the zero level period of the PWM pattern when the power factor is low, the DC PWM 1 is connected to the semiconductor switch Q to which no pressure is applied.
Or, it is necessary to turn on Q. But in this case,
As long as the PWM semiconductor switch is turned off, the semiconductor switch Q remains on while the semiconductor switch Q2 is on.
It is not necessarily necessary to turn off , or to turn off semiconductor switch Q while semiconductor switch Q is on; all of the semiconductor switch ports ~Q4 may be in the on state. The important thing is P
During the period when the WM semiconductor switch is on, one of the semiconductor switch ports and 08 is off, and one of the semiconductor switches Q and 04 is off. FIG. 4 is an example in which Q and 03 are provided with a period in which they are simultaneously in the on state. Even when the power factor is low, the same effect as the control method shown in FIG. 3 can be obtained.

In both the control methods shown in Figs. 3 and 4, AC PWM voltage is generated by performing numerous switching operations during a half cycle of the inverter device output voltage, but the semiconductor switches Q1 to Q4 of the inverter circuit are operated during the period when the voltage is zero. Since the switching is performed by the switching elements, the occurrence of switching loss is negligibly small.

On the other hand, PWM semiconductor semiconductor switches use power MOSFETs with high-speed switching characteristics, so even if a DC PWM voltage is generated, the loss associated with switching is small. Therefore, it is possible to increase the switching frequency to 20kHz or more. As a reactor of the AC filter, the capacitor C can be made smaller and lighter, and noise can be emitted outside the audible frequency band, making it possible to substantially suppress noise.

(Effects of the Invention) As explained above, by inserting a PWM semiconductor switch with high-speed switching characteristics into the DC power supply and inverter circuit, a semiconductor switch with relatively slow switching speed can be replaced with the semiconductor switch of the inverter circuit that is used in many cases. Even if it is used as a reactor for an AC filter, it can generate high-frequency switching AC PWM voltage.

The capacitor C can be made smaller and lighter, and the noise of the device can also be kept low, making it possible to make the inverter device and its application, such as a UPS, smaller and lighter and with lower noise.

In addition, since the positive and negative polarity pulse train patterns of the AC PWM voltage are generated by one PWM semiconductor switch QS, the symmetry of the positive and reverse polarity voltages is maintained.
Problems such as biased magnetism in the transformer on the load side will not occur (this will increase reliability as a power source).

[Brief explanation of the drawing]

FIG. 1 is a configuration example of an inverter device that is an embodiment of the present invention, FIG. 2 is a diagram explaining the principle of the control method of the present invention, and FIG.
The figures are for explaining the first high-frequency PWM control method of the present invention, FIG. 4 is a diagram for explaining the second control method, FIG. 5 is a diagram showing the configuration of a conventional inverter device, and FIG. The figure is a diagram explaining the operation of a conventional inverter device. E・・・・・・DC power supply Q,, Q! +mouth 1. Q4...Semiconductor switch 0,...
・・・・・・PWM semiconductor switch DI+ Dt,
Ds, Da, Ds・Diode L・・・・・・・・・
AC filter paste Actor C... AC filter capacitor Load... Load Cont... Control device

Claims (1)

[Claims] An inverter circuit configured with a plurality of semiconductor switches that converts DC power supply voltage to AC PWM voltage, an AC filter that attenuates harmonic voltages included in the converted AC PWM voltage, and a control device that controls the operation of the inverter circuit. In an inverter device, a PWM semiconductor switch is interposed between a DC power supply and an inverter circuit, and the PWM semiconductor switch is turned on and off to convert it into a DC PWM voltage, and during the off period of the PWM semiconductor switch, An inverter device that converts the DC PWM voltage into an AC PWM voltage by turning on and off a plurality of semiconductor switches that constitute the inverter circuit.