JPH01245361A - Image processor - Google Patents

Abstract

PURPOSE:To easily execute image analysis in an off-line by providing the title image processor with a fixed disk device for storing image data and a program. CONSTITUTION:An object is picked up by a camera 1, outputted as an analog video signal and converted into image data by a camera interface 2. Binary image data are formed by a multiport binary memory part 6 and a vertical histogram is formed by using a port of a real time bus 18. When a start address and formation width stored in the memory part 6 are applied, a port of an image bus 20 in the memory part 6 is accessed and a horizontal histogram is formed. A rapid image processing processor 12 executes rapid image processing by using the binary data or the histogram data and saves an inputted image in the fixed disk device 8. Thereby, image analysis on the off-line can be easily executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that processes images captured by a camera at high speed.

[Conventional technology]

FIG. 2 is a diagram of a conventional image processing apparatus of this type. In FIG. 2, 111 is a camera that images a subject and outputs an analog video signal, (21 is a camera interface that creates digitized image data from the analog signal video output from this camera 11), and (31 is an image data (4) is a display interface that creates an image display signal from image data; (5) displays an image according to the image display signal output from this display interface (4). Display, (6) is a multi-port binary memory unit with multiple ports for binarizing and storing image data, and (7) is a horizontal histogram for creating vertical and horizontal histogram data of the image from the image data. can be created only from binary image data) Multi-port histogram memory with multiple ports for storing image data, binary image data.

a high-speed image processing processor that performs high-speed processing using each data of histogram data; 113 is a control processor that controls each of the above parts; +141 is an operation unit that transmits control contents to this control processor 0; α9 is an input signal from this operation unit α4; The operating unit interface αe converts control contents into control signals to the control processor σJ, and the operating unit interface αe converts the image data output from the camera interface (2) into the multi-port image memory (3) and the multi-port binary memory unit (6). ), cD is a display bus that transfers the image data output from the multi-port image memory (3) to the display interface (4), and Qll is a display bus that transfers the image data output from the multi-port image memory (31). A real-time bus α9 transfers data to the multi-port histogram memory unit (7), and α9 is used to transfer control data between the control processor 13 and each unit, and the high-speed image processing processor α
cD is a system bus for operating the multiport image memory +3), the multiport binary memory section (6), and the multiport histogram memory section (7), and cD is the system bus for operating the multiport image memory +13. (3) and the multi-port binary memory section (6).

This is an image bus for operating the multiport histogram memory section (7).

Next, the operation will be explained. In a conventional image processing device, a camera +11 images a subject, outputs it as an analog video signal, converts it into image data through a camera interface (2), and inputs it to the sensor bus αe port of a multiport image memory (3) via a sensor path ae. are doing.

When displaying this image on the display (5), this image data is taken into the display interface (4) via the display bus αη from the display bus α port of the multiport image memory (31) and converted into an image signal. After that, the image is sent to the display (5) and displayed.In addition, binary image data is created in the multi-port binary memory section (6) using the sensor bus (Ie) and is stored in the binary memory while being sent to the real-time bus 118. It is possible to create a vertical histogram via the real-time bus 118 using the transit port.As for the horizontal histogram, given the start address and creation width in the multi-port binary memory section (6) for creating the horizontal histogram, The image bus ■ port of the multi-port binary memory unit (6) is accessed at the bus ■ exit to create a horizontal histogram. Also, the high-speed image processing processor α2
It is possible to perform advanced image processing using binary data and histogram data.

[Problem to be solved by the invention]

The image processing apparatus configured as described above has the following problems.

(1) Images input to the multiport image memory disappear when the power is turned off, making offline analysis difficult.

(2) The program must be converted to ROM.

The present invention is equipped with a fixed disk device for storing image data and programs, and a floppy disk device for loading programs from the outside into the fixed disk device. To provide an image processing device that only requires loading a modified program from a disk to a fixed disk.

[Means to solve the problem]

An image processing apparatus according to the present invention includes a fixed disk device and a fixed disk device interface for storing image data and a program, and a floppy disk device and a floppy disk device interface for externally loading a program into the fixed disk device. Multi-boat image with boats, multi-boat binary.

and a sensor bus that transfers the image data output from each memory section of the multi-boat histogram and the camera interface to the multi-port image memory and multi-port binary memory section, and a sensor bus that transfers the image data output from the multi-boat image memory to the display interface. It is equipped with a display bus for transferring image data and a real-time bus for transferring image data output from the multi-port image memory to the multi-port histogram memory section.Furthermore, it is equipped with a camera that images a subject and outputs an analog video signal, and a camera that images the subject and outputs an analog video signal. a camera interface that creates digitized image data from analog signal video;
and a display interface that creates an image display signal from image data.

A display that displays an image according to an image display signal output from the display interface, and a high-speed image processing processor that performs high-speed processing using each data of 9-image data, binary image data, and histogram data;
The control processor includes a control processor that controls each of the above sections, and an operation section and an operation section interface that transmit control contents to the control processor.

[For production]

In this invention, a fixed disk device that can store one image data and a program, and a floppy disk device that loads the program from the outside to this fixed disk device are provided to facilitate off-line image analysis and also to facilitate when changing the program. This allows you to simply load the modified program onto a fixed disk rather than a floppy disk.

〔Example〕

FIG. 1 shows an embodiment of the present invention. In Figure 1,
(l) is a camera that images a subject and outputs an analog video signal; (21 is a camera interface that creates digitized image data from the analog signal video output from this camera + 11; (3) stores image data) Multi-boat image memo with multiple boats! J, 1
41 is a display interface that creates an image display signal from image data, (5) is a display that displays an image according to the image display signal output from this display interface (4), and (6) is a plurality of displays that binarize and store the image data. (7) is a multi-port binary memory unit with multiple ports for storing vertical and horizontal histogram data of an image from the image data (horizontal histograms can only be created from binary image data). Multi-port histogram memory with

(8) stores various data and programs (fixed≠
The disk device (9) is a fixed disk interface.

ao is a floppy disk device for loading the program onto the fixed disk, aD is a floppy disk device interface, and α is image data.

ri3, a high-speed image processing processor that performs high-speed processing using binary image data and histogram data;
is a control processor that controls each of the above parts, Q41 is an operation unit that transmits control contents to this control processor αJ, (I
s is a processor q3 that controls the control contents from this operation section ■.
an operating unit interface that converts control signals to ae
is a sensor bus that transfers the image data output from the camera interface (2) to the multi-port image memory (31) and the multi-port binary memory section (6), and αη is the sensor bus that transfers the image data output from the multi-port image memory (3). Display bus a transfers the image data output from the multi-port image memory (3) to the display in and Tough Ace (4), and the display bus a transfers the image data output from the multi-port image memory (3) to the multi-port histogram memory unit (
7), a real-time bus 09 transfers control data between the control processor a3 and each section, and the high-speed image processing processor Q3 transfers control data to the multi-port image memory (3) and the multi-port binary memory section (6);
), a system bus for operating the multi-port histogram memory unit (7), cln is the control processor (13 is the multi-port image memory (31) and the multi-port binary memory unit (6I, the multi-port histogram memory This is an image bus for operating the unit (7).

In the image processing device configured as described above, camera 1
11 captures an image of a subject and outputs it as an analog video signal, which is converted into image data by a camera interface (2) and inputted to a boat for a sensor bus αe of a multiport image memory (3) via a sensor bus a. If you want to display this image on 15 displays, transfer this image data to the display bus α of the multiport image memory (3).
The image is sent from the power boat to the display interface (41) via the display bus αη, converted to an image signal, and then sent to the display +53 for display.The image is also sent to the multi-board binary memory unit +61 via the sensor bus 1e. It is possible to create a vertical histogram via the real-time bus Kasumi using the real-time path αa port while creating binary image data and storing it in the binary memory.For the horizontal histogram, use the multi-port binary histogram. When the start address and creation width in the memory section (6) are given, the port for the image bus ■ of the multi-port binary memory section (6) is accessed via the image bus ω to create a horizontal histogram. The processor r1z is capable of performing advanced image processing using binary data and histogram data via the system bus a9.

Since the captured images can be saved in the fixed disk device (8), batch processing and offline analysis are also possible.

〔Effect of the invention〕

As described above, according to the present invention, offline image analysis is facilitated by providing a fixed disk device for storing image data and programs, and a floppy disk device for externally loading programs into the fixed disk device. Another advantage is that when changing a program, it is only necessary to load the changed program onto a fixed disk rather than a floppy disk.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional image file device. Warm in the figure! 1 is a camera, (2I is a camera interface, (3) is an image memory, (4) is a display interface, (5) is a display, (6) is a multi-port binary memory section, and (7) is a multi-port histogram memory section. , (8) is a fixed disk device, (9) is a fixed disk device interface, (1 (l is a floppy disk device, αυ is a floppy disk device interface, a is a high-speed image processing processor, 113 is a control processor, +141 is an operation , a9 is the operation unit interface X, ae is the + server bus, and aη is the display bus. The bet is the real-time bus, a9 is the system bus, and ■ is the image bus. Note that the same symbols in each figure indicate the same or equivalent parts. shall be.

Claims (1)

[Claims] A camera that images the subject and outputs an analog video signal,
A camera interface that creates digitized image data from an analog video signal output from the camera, a multiport image memory that has multiple ports for storing image data, and a display interface that creates an image display signal from the image data. A display that displays an image according to an image display signal output from this display interface, a multi-port binary memory unit that has multiple ports that binarizes and stores image data, and a display that displays images in the vertical and horizontal directions from the image data. A multi-port histogram memory unit with multiple ports for creating and storing directional histogram data, a fixed disk device and a fixed disk interface for storing various data and programs, and a floppy disk device for loading programs onto the fixed disk. and a floppy disk device interface, a high-speed image processing processor that performs high-speed image processing using image data, binary image data, and histogram data, a control processor that controls each of the above components, and an operation for transmitting control contents to this control processor. a sensor bus for transferring image data output from the camera interface to the multi-port image memory and the multi-port binary memory section; and a sensor bus for transferring the image data output from the multi-port image memory to the multi-port binary memory section; a display bus for transferring image data to a display interface; a real-time bus for transferring image data output from the multi-port image memory to the multi-port histogram memory unit; and a real-time bus for transferring control data between the control processor and each unit and the high-speed image processing unit. a system bus for the processing processor to operate the multiport image memory, the multiport binary memory section, and the multiport histogram memory section; and a system bus for the control processor to operate the multiport image memory and the multiport binary memory section; , and an image bus for operating the multiport histogram memory unit.