JPH01238314A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH01238314A
JPH01238314A JP63066424A JP6642488A JPH01238314A JP H01238314 A JPH01238314 A JP H01238314A JP 63066424 A JP63066424 A JP 63066424A JP 6642488 A JP6642488 A JP 6642488A JP H01238314 A JPH01238314 A JP H01238314A
Authority
JP
Japan
Prior art keywords
output
circuit
data latch
latch signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63066424A
Other languages
Japanese (ja)
Inventor
Takao Kanzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP63066424A priority Critical patent/JPH01238314A/en
Publication of JPH01238314A publication Critical patent/JPH01238314A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731Optimisation thereof
    • H03K19/1732Optimisation thereof by limitation or reduction of the pin/gate ratio

Abstract

PURPOSE:To decrease number of input/output terminals and input/output circuits and to reduce the chip size by supplying a data latch signal switchingly to provide a different input/output function to the input/output circuit to a data latch circuit. CONSTITUTION:With an output data latch signal switching signal (e) at an L level, an output data latch signal (c) of an output data latch signal generating circuit 8 is made effective and an output circuit 5 acts like an output circuit A. With the output data latch signal switching signal (e) at an H level, the output data latch signal (d) of the output data latch signal generating circuit 9 is made effective and the output circuit 5 acts like an output circuit B. A switching circuit 10 switching the output data latch signal (b) in this way is added to the output control circuit 11, then one output circuit 5 acts like plural output circuits. Thus, number of the output circuits 5 and the output terminals 4 is saved and a multi-function output is obtained with a few terminal number.
JP63066424A 1988-03-18 1988-03-18 Semiconductor integrated circuit Pending JPH01238314A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63066424A JPH01238314A (en) 1988-03-18 1988-03-18 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63066424A JPH01238314A (en) 1988-03-18 1988-03-18 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH01238314A true JPH01238314A (en) 1989-09-22

Family

ID=13315395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63066424A Pending JPH01238314A (en) 1988-03-18 1988-03-18 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH01238314A (en)

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