JPH01238150A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01238150A
JPH01238150A JP63066139A JP6613988A JPH01238150A JP H01238150 A JPH01238150 A JP H01238150A JP 63066139 A JP63066139 A JP 63066139A JP 6613988 A JP6613988 A JP 6613988A JP H01238150 A JPH01238150 A JP H01238150A
Authority
JP
Japan
Prior art keywords
resin
semiconductor chip
sealing part
cured
resin sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63066139A
Other languages
Japanese (ja)
Inventor
Shuichi Sakai
境 秀一
Noriaki Shiba
柴 典章
Hidehiko Ishiguro
石黒 秀彦
Makoto Kasai
誠 笠井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Priority to JP63066139A priority Critical patent/JPH01238150A/en
Publication of JPH01238150A publication Critical patent/JPH01238150A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating

Abstract

PURPOSE:To narrow a sealing region without exposing the peripheral edge of a semiconductor chip and to obtain a semiconductor device having a small size and preferably sealed with resin by covering the peripheral edge of the chip with a resin having high viscosity, and covering the surface of the chip surrounded by resin having low viscosity with resin having low viscosity. CONSTITUTION:Liquid resin of polyimide resin having low viscosity is potted from a nozzle on a semiconductor chip 3 as a second resin sealing part 6, cured at approx. 100-170 deg.C, the liquid resin of polyimide resin having high viscosity is potted to cover to a bonding wiring 4 to the peripheral edge of the chip 3 as a first resin sealing part 5, and the parts 5, 6 are cured at approx. 100-170 deg.C. In this case, when only the part 6 is cured, the part 6 is so cured as to be an intermediate state not completely cured. Thus, a thin and small-sized preferable resin sealing part is obtained.

Description

【発明の詳細な説明】 〔概要〕 本発明は基板上に搭載した半導体チップを樹脂封止して
なる半導体装置に関し、 半導体チップ搭載領域に小面積で、且つ薄い樹脂封止部
によって封止された半導体装置を得ることを目的とし、 基板上に搭載された半導体チップと、該半導体チップの
周縁部を覆うように設けられ、粘度の高い樹脂が硬化さ
れてなる第1の樹脂封止部と、該半導体チップ表面を覆
うように設けられ、該第1の樹脂封止部に囲まれた該第
1の樹脂封止部の樹脂より粘度の低い樹脂が硬化されて
なる第2の樹脂封止部とを有する構成とする。
[Detailed Description of the Invention] [Summary] The present invention relates to a semiconductor device in which a semiconductor chip mounted on a substrate is sealed with a resin, and the present invention relates to a semiconductor device in which a semiconductor chip mounted on a substrate is sealed with a small area and a thin resin sealing part. The present invention aims to obtain a semiconductor device with a high viscosity, and includes a semiconductor chip mounted on a substrate, a first resin sealing part formed by hardening a highly viscous resin and provided so as to cover the peripheral edge of the semiconductor chip. , a second resin sealing formed by curing a resin having a lower viscosity than the resin of the first resin sealing part, which is provided so as to cover the surface of the semiconductor chip and surrounded by the first resin sealing part; The configuration has a section.

〔産業上の利用分野〕[Industrial application field]

本発明は基板上に搭載した半導体チップを樹脂封止して
なるICモジュール、ROMカード等の半導体装置に関
する。
The present invention relates to semiconductor devices such as IC modules and ROM cards, which are formed by resin-sealing a semiconductor chip mounted on a substrate.

〔従来の技術〕[Conventional technology]

従来、ICモジュール、ROMカード等では、半導体チ
ップが液状のレンジのボッティングあるいは固形のタブ
レットレジンの落下後、熱処理(キュア)して樹脂封止
される。
Conventionally, in IC modules, ROM cards, and the like, semiconductor chips are heat-treated (cured) and sealed with resin after being boiled in a liquid microwave or dropped in a solid tablet resin.

ところが、半導体チップが大きいと、レジンの量が多く
なり、封止樹脂部が厚くまたは広がることになり、IC
モジュール、ROMカードが厚(なる、または半導体チ
ップの大型化にも増して容器サイズの大きなものとなる
。ここで、半導体チップの大型化に対し、レジンの量を
増加させないと部分的に樹脂で覆われずに露出する部分
が生じたりして歩留りの低下となる。
However, if the semiconductor chip is large, the amount of resin will increase, and the encapsulating resin will become thick or spread out, making the IC
Modules and ROM cards become thicker (or the size of the container becomes larger due to the larger size of the semiconductor chip.If the amount of resin is not increased as the size of the semiconductor chip becomes larger, the resin may partially become thicker). Some parts may be uncovered and exposed, resulting in a decrease in yield.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従って、従来の半導体装置では、薄型化及び小型化が封
止樹脂によって制限され、より薄型または小型の良好な
樹脂封止がされた半導体装置を得るのが困難であった。
Therefore, in the conventional semiconductor device, reduction in thickness and size is limited by the sealing resin, and it is difficult to obtain a thinner or smaller semiconductor device with good resin sealing.

本発明は、より薄型、小型であって、良好な樹脂封止が
なされる半導体装置を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that is thinner, smaller, and can be sealed with a good resin.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、上記目的を達成するため、基板上に搭載され
た半導体チップと、該半導体チップの周縁部を覆うよう
に設けられ、粘度の高い樹脂が硬化されてなる第1の樹
脂封止部と、該半導体チップ表面を覆うように設けられ
、該第1の樹脂封止部に囲まれた該第1の樹脂封止部の
樹脂より粘度の低い樹脂が硬化されてなる第2の樹脂封
止部とを有する半導体装置とする。
In order to achieve the above object, the present invention includes a semiconductor chip mounted on a substrate, and a first resin sealing part formed by hardening a highly viscous resin, which is provided so as to cover the peripheral edge of the semiconductor chip. and a second resin seal formed by hardening a resin having a lower viscosity than the resin of the first resin seal part, which is provided so as to cover the surface of the semiconductor chip and surrounded by the first resin seal part. A semiconductor device having a stop portion.

〔作用〕[Effect]

本発明では、粘度の高い樹脂で、半導体チップ周縁部を
覆い、この粘度の低い樹脂によって囲まれた半導体チッ
プ表面を粘度の低い樹脂により覆うことにより、半導体
チップ周縁部が露出することなく、封止領域を狭くでき
、且つ半導体チップ表面上を薄(封止できる。
In the present invention, the periphery of the semiconductor chip is covered with a resin with high viscosity, and the surface of the semiconductor chip surrounded by the resin with low viscosity is covered with the resin with low viscosity, thereby preventing the periphery of the semiconductor chip from being exposed. The sealing area can be narrowed and the surface of the semiconductor chip can be thinly sealed.

〔実施例〕〔Example〕

第1図に本発明一実施例の半導体装置の断面図を示す。 FIG. 1 shows a sectional view of a semiconductor device according to an embodiment of the present invention.

配線パターン2の形成された基板1上に半導体チップ3
が搭載され、半導体チップ3と配線パターン2間がボン
ディングワイヤ4により接続されており、半導体チップ
3の周縁部が例えば、シリカよりなるフィラーを、60
〜70%程度の割合で含有する粘度の高いポリイミド樹
脂が硬化された第1の樹脂封止部5で覆われ、中央部が
例えばシリカよりなるフィラーを25%程度の割合で含
有する粘度の低いポリイミド樹脂が硬化された第2の樹
脂封止部6で覆われている。粘度の高いポリイミド樹脂
は、加熱硬化において流れにくく、樹脂封止部の大きさ
を小さく保ち、粘度の低いポリイミド樹脂は流れやすく
、表面をなだらかにして樹脂封止部の厚さを薄くできる
ようにする。
A semiconductor chip 3 is placed on a substrate 1 on which a wiring pattern 2 is formed.
is mounted, the semiconductor chip 3 and the wiring pattern 2 are connected by bonding wires 4, and the periphery of the semiconductor chip 3 is coated with a filler made of silica, for example.
The first resin sealing part 5 is covered with a hardened polyimide resin containing a high viscosity polyimide resin in a proportion of ~70%, and the central part has a low viscosity containing a filler made of, for example, silica in a proportion of about 25%. It is covered with a second resin sealing part 6 made of hardened polyimide resin. Polyimide resin with high viscosity is difficult to flow when heated and cured, keeping the size of the resin sealing part small, while polyimide resin with low viscosity flows easily and allows the surface to be smooth and the thickness of the resin sealing part to be thinner. do.

したがってより薄く、且つ小型の良好な樹脂封止部が得
られる。
Therefore, a thinner, smaller and better resin sealing part can be obtained.

第1図の半導体装置の製造は、第2図のように半導体チ
ップ3上にノズルから粘度の低いポリイミド樹脂の液状
レジンをボッティングして、第2の樹脂封止部6とし、
100〜170°C程度でキュアした後、第1図のよう
に半導体チップ3周縁部にボンディングワイヤ4まで覆
うように粘度の高いポリイミド樹脂の液状レジンをポツ
ティングして第1の樹脂封止部5とし、100〜170
℃程度で第1及び第2の樹脂封止部5.6をキュアして
硬化させる。この場合、第2の樹脂封止部6だけのとき
のキュアでは、第2の樹脂封止部6が完全に硬化しない
中間の状態にする。
In manufacturing the semiconductor device shown in FIG. 1, as shown in FIG. 2, a liquid polyimide resin with low viscosity is potted onto the semiconductor chip 3 from a nozzle to form a second resin sealing part 6.
After curing at about 100 to 170°C, as shown in FIG. 1, a liquid polyimide resin with high viscosity is potted around the peripheral edge of the semiconductor chip 3 to cover the bonding wires 4 to form a first resin sealing part 5. Toshi, 100-170
The first and second resin sealing parts 5.6 are cured and hardened at about .degree. In this case, when only the second resin sealing part 6 is cured, the second resin sealing part 6 is in an intermediate state in which it is not completely cured.

尚、上記実施例では、粘度の低い樹脂、粘度の高い樹脂
ともポリイミド樹脂で説明したが、異なる樹脂を用いる
こともでき、例えば粘度の低い樹脂として、フェノール
系樹脂を、粘度の高い樹脂として、エポキシ系樹脂を用
いることもできる。
In the above example, polyimide resin was used for both the low viscosity resin and the high viscosity resin, but different resins may be used. For example, a phenolic resin is used as the low viscosity resin, a phenolic resin is used as the high viscosity resin, Epoxy resins can also be used.

また、液状レジンのボッティングの代わりに固形のタブ
レットを用いてもよく、半導体チップ周縁部に設ける粘
度の高い樹脂の場合には枠形状のタブレットを用いれば
よい。このようなタブレットを用いる場合には、タブレ
ットのボイド抜き用の穴を設けておけば、ボイドの発生
を少な(できる。
Furthermore, a solid tablet may be used instead of liquid resin botting, and a frame-shaped tablet may be used in the case of a highly viscous resin provided at the periphery of the semiconductor chip. When using such a tablet, the generation of voids can be reduced by providing a hole in the tablet for removing voids.

第3図は本発明の別の実施例の半導体装置の断面図であ
る。この実施例は、第3図に示すように、第1の樹脂封
止部5が先に設けられている点で前の実施例と異なる。
FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention. This embodiment differs from the previous embodiment in that the first resin sealing part 5 is provided first, as shown in FIG.

この第3図の実施例の場合も、前の実施例と同様、異な
る樹脂材料で第1及び第2の樹脂封止部を形成してもよ
く、また、ボッティング、タブレットを用いることがで
きる。
In the case of the embodiment shown in FIG. 3, as in the previous embodiment, the first and second resin sealing parts may be formed of different resin materials, and botting or tablets may be used. .

〔発明の効果〕〔Effect of the invention〕

本発明によれば、薄く且つ小型の良好な樹脂封止部が得
られ、ICモジュール、ROMカード等の薄型化及び小
型化に寄与するところが大きい。
According to the present invention, a thin, small and good resin sealing part can be obtained, which greatly contributes to making IC modules, ROM cards, etc. thinner and smaller.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明一実施例の半導体装置の断面図。 第2図は本発明一実施例に係る製造方法を説明するため
の断面図。 第3図は本発明の別の実施例の半導体装置の断面図。 第4図は本発明の別の実施例に係る製造方法を説明する
ための断面図である。 図中、に基板。 2:配線パターン。 3:半導体チップ。 4:ボンディングワイヤ。 5:第1の樹脂封止部。 6:第2の樹脂封止部。 \5.・、−1 −(−2−、−′ 第 1 口 屯企咀−実オ色例(二佐ダ臥者方牙乱記明するとの雁口
早 2 口 1声−幸5日月のδ’iJ 0)粋分、!IC)洋1〒
b区コ$ 32 声 4 固
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. FIG. 2 is a sectional view for explaining a manufacturing method according to an embodiment of the present invention. FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention. FIG. 4 is a sectional view for explaining a manufacturing method according to another embodiment of the present invention. In the figure, there is a board. 2: Wiring pattern. 3: Semiconductor chip. 4: Bonding wire. 5: First resin sealing part. 6: Second resin sealing part. \5.・, -1 -(-2-, -' 1st Koutun Planning Tsui - Real Oiro example (Ganguchi Hayate of Nisada Kousahogaran Kisho 2 Mouth 1 voice - Ko 5 Kazuki's δ 'iJ 0) Ichibun, !IC) Yo 1〒
B Ward Ko $ 32 Voice 4 Solid

Claims (1)

【特許請求の範囲】  基板上に搭載された半導体チップと、 該半導体チップの周縁部を覆うように設けられ、粘度の
高い樹脂が硬化されてなる第1の樹脂封止部と、 該半導体チップ表面を覆うように設けられ、該第1の樹
脂封止部に囲まれた該第1の樹脂封止部の樹脂より粘度
の低い樹脂が硬化されてなる第2の樹脂封止部とを有す
ることを特徴とする半導体装置。
[Scope of Claims] A semiconductor chip mounted on a substrate; a first resin sealing portion formed by hardening a highly viscous resin and provided to cover the peripheral edge of the semiconductor chip; and the semiconductor chip. and a second resin sealing part formed by curing a resin having a lower viscosity than the resin of the first resin sealing part, which is provided so as to cover the surface and surrounded by the first resin sealing part. A semiconductor device characterized by:
JP63066139A 1988-03-18 1988-03-18 Semiconductor device Pending JPH01238150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63066139A JPH01238150A (en) 1988-03-18 1988-03-18 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63066139A JPH01238150A (en) 1988-03-18 1988-03-18 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH01238150A true JPH01238150A (en) 1989-09-22

Family

ID=13307230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63066139A Pending JPH01238150A (en) 1988-03-18 1988-03-18 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH01238150A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334447A (en) * 1989-06-20 1991-02-14 Internatl Business Mach Corp <Ibm> Electrical assembly
US5525644A (en) * 1992-09-22 1996-06-11 Simmonds Precision Engine Systems Potted electrical components and methods of making the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54152161A (en) * 1978-05-19 1979-11-30 Fujitsu Ltd Method of producing hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54152161A (en) * 1978-05-19 1979-11-30 Fujitsu Ltd Method of producing hybrid integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334447A (en) * 1989-06-20 1991-02-14 Internatl Business Mach Corp <Ibm> Electrical assembly
US5525644A (en) * 1992-09-22 1996-06-11 Simmonds Precision Engine Systems Potted electrical components and methods of making the same

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