JPH01233724A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the reliability of a semiconductor device by a method wherein a taper is provided on a second insulating film in an opening part for contact by isotropic etching and a shoulder part formed by an anisotropic plasma etching operation of a first insulating film is heat-treated and made smooth. CONSTITUTION:An n-type diffusion region 2 is formed on a substrate 1; a BPSG film 3 and a silicon oxide film 4 are deposited and formed one after another on the region 2. A photoresist film 5 having a pattern to be used to form a contact opening part is formed selectively on the silicon film 4. The silicon film 4 is etched; the surface of the BPSG film 3 is exposed in an area which is slightly wider than a vertically projected area of a pattern of the photoresist film 5. The BPSG film 3 is etched; the surface of the region 2 is exposed; a cup-shaped opening part 6 for contact use is formed. The resist film 5 is removed; a heat treatment is executed; a shoulder part 7 of the BPSG film 3 is made fluid; the opening part 6 is made smooth due to surface tension. An Al layer is deposited on the surface including the opening part 6 and etched; an electrode wiring part 8 is formed.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

As shown in FIG. 3, in a conventional semiconductor device, an impurity is introduced into the surface of a p-type silicon substrate 10 to form an n-type diffusion region 2, and boron and phosphorus are contained on the n-type diffusion region 2. A silicon oxide film (hereinafter referred to as BPSG film) 3 is formed.

Next, the BPSG film 3 is selectively etched to form a contact opening 6, and then the j98PSG film 3 is fluidized and the upper end of the opening 6 is smoothed by heat treatment. Here, the opening 6 can be formed by a combination of isotropic etching and anisotropic etching, and the upper end of the opening 6 can be tapered. Next, an aluminum film is deposited on the surface including the opening 6 and selectively etched to form an electrode wiring 8 in contact with the n-type diffusion region 2.

[Problem to be solved by the invention]

In the conventional semiconductor devices described above, contact openings are difficult to form because the insulating film has low fluidity due to heat treatment, the isotropic etching rate of the insulating film is low, or the photoresist film cannot withstand long-term wet etching. There was a problem in that a sufficient taper could not be formed, and the step coverage of the electrode wiring provided in the contact opening was insufficient, resulting in accidents such as disconnection.

An object of the present invention is to provide a method for manufacturing a semiconductor device that improves reliability by improving step coverage of electrode wiring in a contact opening.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes: - providing a diffusion region of an opposite conductivity type on one main surface of a conductivity type semiconductor substrate; a first insulating film having fluidity by heat treatment on the surface including the diffusion region; a step of sequentially laminating and providing a second insulating film having a higher etching rate than the insulating film; a step of providing a butter-printed photoresist film on the second insulating film;
isotropically etching the second insulating film using the photoresist film as a mask, and anisotropically etching the first insulating film again using the photoresist film as a mask to provide a cup-shaped opening; Smoothing the inner wall of the opening by heat treatment after removing the photoresist film;
The method includes the step of depositing a metal film on the surface including the opening and selectively etching the metal film to provide an electrode wiring that contacts the diffusion region and extends on the second insulating film.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1A to 1E are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a first embodiment of the present invention.

As shown in FIG. 1(a), impurities are introduced into one main surface of a p-type silicon substrate 1 to form an n-type diffusion region 2, and CVD
l) B layer with a thickness of 0.5 μm on the n-type diffusion region 2
A PSG film 3 and a silicon oxide film 4 having a thickness of 0.5 .mu.m are sequentially deposited and then bre-baked. Next, a photoresist film 5 having a pattern for forming a contact opening is selectively provided on the silicon oxide film 4.

Next, as shown in FIG. 1(b), using the photoresist film 5 as a mask, the & silicon oxide film 4 is etched by an isotropic etching method using buffered hydrofluoric acid, and the vertical projected area of the pattern of the photoresist film 5 is etched. The surface of the BPSG film 3 is exposed over a slightly wider area. At this time, the etching rate of the silicon oxide film 4 is 3 to 3 with respect to the BPSG film 3.
Since it is 10 times larger, a bowl-shaped opening can be formed using the BPSG film 3 as an etching stopper.

Next, as shown in FIG. 1C, an anisotropic plasma etching process is performed again using the photoresist film 5 as a mask.
i The BPSG film 3 is etched to expose the surface of the n-type diffusion region 2, and a cup-shaped contact opening 6 is formed.

Next, as shown in FIG. 1(d), the photoresist film 5 is removed and heat treatment is performed in an inert atmosphere to fluidize the shoulder portion 7 of the BP8G film 3 and smooth the opening due to surface tension. .

At this time, the silicon oxide film 4 hardly flows, so
Since the BPSG film 3 has a fixed top and bottom shape, a smooth opening can be formed continuously from the top surface of the silicon oxide film 4 to the surface of the n-type diffusion region 2.

Next, as shown in FIG. 1(e), an aluminum layer is deposited on the surface including the opening 6, and this is selectively etched to connect the n-type diffusion region 2 of the opening 6 to the silicon oxide layer. Electrode wiring 8 is formed extending over the film 4. Since the opening 6 has a smooth taper in this way, the electrode wiring 8
This has the effect of improving step coverage.

FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

As shown in the figure, in the same process as in the first example, Bl' S
After forming the G film 3, a polycrystalline silicon film 9 is deposited on the BPSG film 3 and is selectively etched to form wiring. Next, on the surface including the polycrystalline silicon film 9, a 0.2 μm thick BPSG film 10 with a thickness of 00.5 μmoPsG
The membranes 11 are sequentially provided horizontally.

Next, the PSG film 11 is selectively etched by isotropic etching to form the n-type diffusion region 2 and the polycrystalline silicon layer 9.
A bowl-shaped contact opening is provided respectively, and the BPSG film 10 at the bottom of the opening is anisotropically etched to form cup-shaped contact openings 6 and 12. Next, an aluminum layer is deposited on the surface including the openings 6 and 12 and selectively etched to form an electrode wiring 8 in contact with the n-type diffusion region 2 and a wiring 13 in contact with the polycrystalline silicon layer 9, respectively. .

〔Effect of the invention〕

As explained above, the present invention provides a taper by isotropic etching in the second insulating film of the contact opening,
Furthermore, the first insulating film is rounded by anisotropic plasma etching and the comparable portions can be smoothed by heat treatment, resulting in good step coverage of the electrode wiring.
This has the effect of improving the reliability of the semiconductor device.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are cross-sectional views of a semiconductor device shown in order of steps for explaining a first embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining a second embodiment of the present invention. FIG. 3 is a cross-sectional view of a semiconductor chip showing an example of a conventional semiconductor device. 1...p-type silicon substrate, 2...n-type diffusion region, 3
...BPSG film, 4... Silicon oxide film, 5...
Photoresist film% 6...Opening, 7...Shoulder, butt...Electrode wiring, 9...Polycrystalline silicon film, 10...
BI) SG film, 11...PSG film, 12...opening, 13...wiring. Agent Patent Attorney Uchihara Oto 6 Lock U Department / Houki l Figure I P-type Shisokoshi Signature H (Figure 2 / Figure 3

Claims (1)

[Claims] A diffusion region of an opposite conductivity type is provided on one main surface of a semiconductor substrate of one conductivity type; a first insulating film having fluidity due to heat treatment on the surface including the diffusion region; and a second insulating film having a higher etching rate than the first insulating film. a step of providing a patterned photoresist film on the second insulating film, isotropically etching the second insulating film using the photoresist film as a mask, and etching the second insulating film again. a step of anisotropically etching the first insulating film using the photoresist film as a mask to provide a cup-shaped opening; a step of smoothing the inner wall of the opening by heat treatment after removing the photoresist film; A method for manufacturing a semiconductor device, comprising the steps of depositing a metal film on a surface including an opening and selectively etching the metal film to provide an electrode wiring that contacts the diffusion region and extends on the second insulating film.