JPH01211123A - Data driving type control method - Google Patents

Abstract

PURPOSE:To improve the performance of an instruction execution and to prevent the destruction of table contents by providing a flag to show whether the number of input data necessary to the execution of an instruction is '1' or '2' or above and efficiently executing the deciding processing of the instruction in which the number of data is '1'. CONSTITUTION:An exchange connecting request analyzing part 10 analyzes the exchange request from a channel 5 connected to a telephone set 7 and a trunk 8, determines a prescribed exchange connecting action and a waiting cue part 11 awaits the instruction execution of a program. A data driving instruction executing control part 12 executes the driving by a data program. Further, an arithmetic instruction processing part 13 executes the operation corresponding to the name of the instruction, an exchange connecting action is executed with a program described by a data flow at a connecting processing part 14, and an initial setting table 15 sets the address of the instruction and the initial value of a counter in which the number of the input data necessary to the execution of the instruction is 2 or above. The data are removed from the fingers to the instruction to execute the number of data based on the data driving successively at the data and the contents of the flag of the instruction correspondence are decided.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a data-driven control method, and in particular to a data-driven control method that shortens the initial setting time of instructions to minimize the system start-up time, and also provides information on The present invention relates to an instruction control method for a data flow machine that can improve the execution performance of a program having many instructions with one instruction.

[Conventional technology]

Functional languages are languages that improve software productivity. In this functional language, the value of a function is uniquely determined by the input value, so it has no side effects on others and is not influenced by others, so the execution of functions is independent of each other and parallel processing is possible. Become. A data flow machine is suitable as an execution machine for such a functional language. The data-driven execution principle that drives the data flow machine is that an operation can be executed whenever its required operands are available.

In data flow machine operations, for example, as shown in Figure 2, operands (data addresses) are assigned to nodes whose operation names are written in rectangular block 1 (data read, code conversion, addition 2, etc.). , data, code-converted data, etc.) are input, and their outputs are given as the calculation results. Inputs and outputs to these nodes are represented by lines with arrows, these lines are called arcs, and the data on the lines are called tokens.

For example, when a token X arrives at the input arc on the left side, addition cannot be performed with X alone, or it waits on the input arc. Then, when the token y arrives at the right input arc, the operation is immediately performed, resulting in a token with the value x+y being given to the output arc.

Functional expressions such as x''-2x+1 can also be calculated in the same way.

By the way, in the conventional data-driven control method,
For example, as described in Japanese Patent Application Laid-Open No. 61-123937, data that needs to be rewritten when an instruction is executed and data that does not need to be rewritten are stored in the same table, and when each instruction arrives, The number of input data was expressed by a rewritable counter. In other words, in the data-driven control method described in the above publication, a table is prepared in the storage device corresponding to each processing program module, and this table specifies the input/output data source table for that processing program module. An input data preparation status display section, an output notification destination table instruction section, and an output data storage section are provided.

When each program module is started, it refers to the corresponding table, reads input data from the specified source table, processes it in a sequential execution format, and then writes it to a predetermined storage section of the table. Next, referring to the table again, for the output data of the processing result, the input data preparation status display section (counter) of the output notification destination table displays that the corresponding input data is prepared.

The counter is set with the number of output data only from other program modules as an initial value. The execution control program checks the value of this counter every time the input data is complete, and if the value of the counter is 2 or more, it subtracts the value by 1, and if the value of the counter is 1,
It determines that all predetermined input data has been collected, and registers the table containing the data at the end of the queue. Therefore, in the above method, if there are many programs in which the initial value of the counter is 1, it is only necessary to set the initial value in advance for tables with a counter of 2 or more, and for those with a counter of 1, the initial setting is Since it is not necessary to perform this process, it is possible to suppress an increase in the amount of processing of the initial setting process. However, as mentioned above, since the above method uses a rewritable counter, there is a risk that the contents may be destroyed.
Since the value of is also stored in the same table along with values of 2 or more, it is necessary to refer to the value of 1 as well.

[Problem to be solved by the invention]

As mentioned above, since the conventional technology uses a RAM table, there is a problem in that it is vulnerable to data destruction due to program runaway. Therefore, data that does not need to be rewritten is stored in read-only memory (ROM), and data that needs to be rewritten is stored in random access memory (RA).
M) may be divided and accommodated. However, simply dividing and accommodating data is not enough.
I can't find a connection between the two. Therefore, in order to establish a linkage between the ROM and RAM, it is necessary to store in the ROM the address of the data stored in the RAM. R
If you store the RAM data address in OM,
Both are related, but in order to access the counter stored in the RAM, the ROM is accessed and the RAM is
Extract the address of M, then use that address to
It is necessary to access AM, resulting in an increased amount of processing.

Next, regarding the initial setting of the counter, use the conventional method.

As mentioned above, all instructions must be initialized to predetermined values, which is done when loading the program, so the larger the number of instructions, the longer the initialization time will be.

As described above, two problems have arisen: preventing destruction of the table contents stored in the RAM and shortening the initial setting time of the counter.

The purpose of the present invention is to solve these problems, shorten the initial setting time of the counter, prevent the contents of the registration table from being destroyed, and minimize the decline in processing performance due to overhead in data-driven control. An object of the present invention is to provide a data-driven control method that can reduce the amount of data driven.

[Means to solve the problem]

In order to achieve the above object, 1 the data-driven control method of the present invention provides, for each command, an input data source, an output notification destination of the calculation result using the input data, and an input indicating that the input data has been prepared. In a data-driven control method having a storage means storing a data number counter, the number of input data required for execution of each instruction is stored in the storage means as 1 or 2.
A flag indicating that the number of input data is 2 or more and a flag indicating that the number of input data is 2 or more.
The above-mentioned input data number counter and a table for setting the initial value of the counter are stored, and the data is sequentially retrieved from the input data source for the instructions executed based on the data drive. The content of the flag corresponding to the instruction is determined, and if the content is the number of input data 1, the instruction is executable, and if the number of input data is 2 or more, the number of input data counter is decremented by 1, and the subtraction is performed. The feature is that it can be executed when the result is O, and when the subtraction result is 1 or more, it is determined that the input data has not arrived, and the operation is executed from the instruction for which the input data is complete, and the operation result is notified to the output notification destination. be.

(Function) In the present invention, a flag to identify whether the number of input data required to execute the instruction is 1 or 2 or more is provided in the instruction word executed by data-driven, The address of an instruction that requires two or more input data for execution and the initial value of the counter for that instruction are stored in a table.In other words, when one input data arrives at an instruction that is executed based on data drive, First, the flag in the instruction is evaluated, and if the number of input data required to execute the instruction is 1, the instruction is determined to be executable.

If the number of input data is 2 or more, the counter indicating the number of input data arrivals is subtracted by 1, and if the value of the subtraction result is 0, it is determined that execution is possible. If the value of the subtraction result is 1 or more, it is determined that the input data necessary for executing the instruction is not yet available. Whether the number of input data is 1 or 2 or more can be determined at the time of compilation. Therefore, it is only necessary to perform judgment processing on input data necessary for execution of two or more, so that performance can be improved.

Further, since the value of the flag does not need to be rewritten during execution, it can be stored in the ROM, and the program can be prevented from being destroyed. Further, since the initial setting of the counter can be performed immediately before execution rather than at the time of loading, the system start-up time can be shortened. Further, when recovering from a failure, it is possible to skip the initial setting process of the counter in the instruction.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to five drawings.

FIG. 2 is a diagram showing a description example of a data graph applied in the present invention.

As mentioned above, node 1 in FIG. 2 represents an arithmetic instruction executed by data drive, and arc 2 represents a flow path of data exchanged between instructions. Since the instruction is executed based on data drive, the operation is executed only when all the input data necessary for executing the instruction is collected.

In FIG. 2, it is composed of an instruction to read data from an address specified by input data, an instruction to convert the code of input data, and an instruction to add two pieces of input data. The order of operations is to first read data from the data address specified by the two input data, then code convert the data read from one, and add the conversion result to the data read from the other. will output the result.

FIG. 3 is a block diagram of an electronic exchange to which the present invention is applied. Here, an electronic exchange program expressing a data flow graph to which the present invention is applied is executed.

Further, in FIG. 3, a Neumann type processor 3 is also used.

In the electronic exchange shown in FIG. 3, a von Neumann processor 3 under normal program counter control, a memory 4 having a memory protection function, and a space-division or time-division communication path 5 are connected via a processor bus 6. is connected to
A telephone 7 and a trunk 8 are accommodated in the communication path 5.

A plurality of these telephones 7 and trunks 8 are accommodated in the communication path 5, and only one of them is shown here.

The electronic exchange program for connecting the telephone 7 and the trunk 8 via the communication path 5 is represented by a data flow graph as shown in FIG. 2, and the program itself is stored in the memory 4. The processor 3 selects a predetermined electronic exchange program stored in the memory 4 in response to an exchange connection request from the telephone 7 or the trunk 8, and controls the execution of the program based on data drive. A connection between terminals such as a telephone 7 or a trunk 8 is established via the line 5.

FIG. 1 is a functional block diagram of a data-driven control method according to an embodiment of the present invention, and shows the combination of functional units constituting the electronic exchange program of FIG. 3.

In FIG. 1, 10 is a switching connection request analysis unit that analyzes switching connection requests from a telephone 7 and a trunk 8 to determine a predetermined switching connection operation, and 11 is a program instruction expressed in a data flow graph. A waiting queue for waiting for execution, 12 a data-driven instruction execution control unit that data-driven executes program instructions expressed in a data flow graph, and 13 an arithmetic instruction processing unit that performs an operation corresponding to the name of the instruction. , 14 is a connection processing section of a program in which exchange connection operations are described in data flow.

Reference numeral 15 denotes an initial setting table for setting addresses and counter initial values for instructions in which the number of input data required for execution of the instruction is two or more.

FIG. 4 is a diagram showing a configuration example of a data driven instruction executed in FIG. 1, and FIG. 5 is an operation flowchart of the data driven instruction execution control section in FIG. 1.

FIG. 4 shows an instruction IA corresponding to one of the connection processes 1 to m defined in the connection processing unit 14 of FIG.

A connection example of IB, IC, and LD is shown, and one instruction is composed of eight areas 20 to 27.

The relationship between LA, IB, iC, and LD shown in FIG. 4 is equivalent to the data flow graph shown in FIG. 2, and the nodes IA to ID in FIG. ~
All six arrows corresponding to the ID are arcs, and the operation name is written in area 21. That is, instruction IA and IC read data, instruction IB code conversion,
The instruction ID is each instruction of addition. Note that symbols are attached only to each area that constitutes the instructions of node IA,
The areas that make up the other nodes IB, IC, and ID differ only in the area 21 where the contents of the operation instruction code are written, and the other areas are exactly the same as A.
Symbols are omitted.

In FIG. 4, 20 is a random access memory address indicating the header of an area that is rewritten when an instruction is executed;
21 is an arithmetic instruction code that specifies the processing of the instruction; 22 is a flag indicating that the number of input data required to execute the instruction is 1 or 2 or more; 23 is an input data source address that indicates where to obtain the input data; 24 is an output notification destination address for transmitting to the next instruction that the output has been given, 2
5 is a linkage pointer for registering executable instructions in the waiting queue 11; 26 is a counter indicating the arrival status of input data necessary for executing the instruction; and 27 is an output data storage area for storing calculation results.

The above-mentioned instructions are secured in the memory 4 for each node constituting one connection process.

Random access memory address 20, operation instruction code 21, flag 22, input data source address 23, and output notification destination address 24 are all programmed.
Determined at compile time.

Moreover, 1. Since these are not rewritten during program execution, after the program has been loaded into the memory 4, memory protection can be applied to protect the stored contents.

On the other hand, the linkage pointer 25, counter 26, and output data storage area 27 are stored in a random access memory area because they are rewritten when an instruction is executed. As a result, most area contents can be protected, so even if the program runs out of control, instructions can be prevented from being destroyed and reliability can be improved.

Next, a method for initializing the counter 26 will be described in detail.

If the number of input data required to execute an instruction is 1, this is indicated by flag 22 when compiling the program, as described above, so once the program is loaded, the number of input data required for executing an instruction is 1. Initial setting of the counter 26 becomes unnecessary.

In addition, the initial setting of the counter 26 for instructions for which the number of input data required for instruction execution is 2 or more is made immediately before program execution.
This is done by setting the specified instruction address and initial value according to the initial setting table 15 corresponding to the execution program. This eliminates the need for the initial setting process for the counter 26, which was conventionally performed at the time of program loading, thereby making it possible to shorten the initial setting time for the program.

Next, according to FIG. 5, the functional blocks of FIG. 1 and the fourth
The operation of the memory area shown in the figure will be explained in detail. The arrow numbers in FIG. 1 indicate the order in which the processes are transferred.

First, in FIGS. 1 and 3, when a connection request arrives at the electronic exchange from a terminal such as a telephone 7 and a trunk 8, the exchange connection request analysis section 10 analyzes this connection request,
After selecting and determining one of the connection processes to be executed from connection processes 1 to m of the connection processing unit 14 (arrow (1)),
Waiting queue 1 for the instruction address at the beginning of the connection process
1 (arrow (2)). Then, the data-driven instruction execution control unit 12 takes over the name of the registered connection process and starts the data-driven instruction execution control unit 12 (arrow (3)
)). The data-driven instruction execution control unit 12 that has received the activation,
It operates according to the operation flow shown in FIG.

First, the initial setting table 15 corresponding to the name of the inherited connection process is indexed, and all instruction counters 26 whose number of input data required for executing an instruction is 2 or more are initialized (step 31) (as shown by the arrow in FIG. 1). (4)). Then, if the waiting queue 11 is not empty (step 32), the first instruction address of the connection process registered by the exchange connection request analysis unit 10 is extracted from the waiting queue 11 and stored (arrow (5) ), step 33) of removing the instruction from the waiting queue 11 (arrow (6)), determining the arithmetic instruction processing unit 13 determined by the arithmetic instruction code 21 in the instruction.

After passing the instruction address to the arithmetic instruction processing unit 13 (arrow (7)), the arithmetic instruction processing unit 13 is activated (
Step 34). The activated arithmetic instruction processing unit 13 obtains input data from the input data source address 23 in the instruction specified by the instruction address, performs a predetermined operation using the input data, and stores the result of the operation. Store in the output data storage area 27 linked by the random access memory address 20 of the instruction (step 35) (
arrow (8)). Control is then returned to the data-driven instruction execution control unit 12 (arrow (9)).

Next, the data-driven instruction execution control unit 12 determines the output notification destination address 24 based on the stored instruction, and notifies that the output data, that is, the input data of the next instruction is prepared (arrow (10) ).

This notification is performed as follows. First, the flag 22 of the next instruction specified by the output notification destination address 24 is extracted (step 36), and if the flag 22 of the next instruction is, for example, 1.
If so (step 37), it is determined that the number of input data required to execute the instruction is 1 and that it is executable, and the linkage pointer 25 indicated by the random access memory address 20 of the next instruction is used to execute that instruction. register the address in the waiting queue 11 (step 40) (arrow (11)
)).

Also, if the flag 22 of the next instruction is 0, the number of input data required to execute the instruction is 2 or more, so the counter 26 specified by the random access memory address 20 is decremented by 1 (step 38). If 26 is 0, it is determined that the instruction is executable, and the instruction address is registered in the waiting queue 11 as described above (step 40) (arrow (11) in FIG. 1). Furthermore, if the counter 26 is not 0, nothing is done.6Furthermore, if there are a plurality of output notification destination addresses 24, the above-mentioned process is repeated for the number of output notification destination addresses (steps 36 to 41). Then, when the notification of output data to all output notification destination addresses 24 is completed, a determination process (
Return to step 32).

If the instruction address is registered, the instruction execution process (
Repeat steps 33 to 35).

On the other hand, if there is no instruction address registered in the waiting queue 11 (step 32), it is determined that there is no instruction to be executed, and the data-driven instruction execution control unit 12 returns control to the exchange connection request analysis unit 10. arrow (12)), the connection process ends.

In this way, in this embodiment, there is no need to initialize the counter that indicates the arrival of input data necessary for command execution when loading the program, and it can be done when executing the program, reducing system startup time. It is possible.

It is also possible to shorten the time required for restart processing.

〔Effect of the invention〕

As explained above, according to the present invention, a flag is provided to indicate whether the number of input data required for execution of an instruction is 1 or 2 or more, and the determination process for an instruction where the number of input data is 1 can be efficiently performed. This makes it possible to improve the performance of instruction execution, and is particularly effective in programs that include many instructions in which the number of input data required for instruction execution is one. Further, since the value of the flag is not rewritten during program execution, it can be stored in a read-only memory, and therefore the program can be prevented from being destroyed.

[Brief explanation of the drawing]

Fig. 1 is a functional block diagram of a data-driven control method showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of a conventional data flow graph, and Fig. 3 is an electronic exchange to which the data flow graph of the present invention is applied. FIG. 4 is a combination diagram of memory areas for storing data-driven instructions showing one embodiment of the present invention, and FIG. 5 is an operation flowchart of the data-driven instruction execution control section in FIG. 1. LA, IB, IC, ID: Instruction node, 2: Arc, 3
: Processor, 4: Memory, 5: Communication path, 6: Processor bus, 7: Telephone, 8 Nidrank, 10: Exchange connection request analysis section, 11: Waiting queue, 12: Data driven instruction execution control section, 13: Arithmetic instruction Processing unit, 14: Connection processing unit,
15: Initial setting table, 20: Random access memory address, 21: Operation instruction code, 22: Flag, 2
3: Input data source address, 25 link pointer, 26: counter, 27: output data storage area. Patent applicant: Hitachi, Ltd. Figure 1] 0 Figure 2 Figure 3 Figure Φ

Claims (1)

[Claims] 1. A memory that stores, for each command, an input data acquisition source, an output notification destination of the calculation result using the input data, and an input data number counter indicating that the input data is prepared. In a data-driven control method having a storage means, the number of input data required for execution of each instruction is 1 or 2.
A flag indicating that the number of input data is 2 or more and a flag indicating that the number of input data is 2 or more.
The above-mentioned input data number counter and a table for setting the initial value of the counter are stored, and the data is sequentially retrieved from the input data source for the instructions executed based on the data drive. The content of the flag corresponding to the instruction is determined, and if the content is the number of input data 1, the instruction is executable, and if the number of input data is 2 or more, the number of input data counter is decremented by 1, and the subtraction is performed. It can be executed when the result is 0, and when the subtraction result is 1 or more, it is determined that the input data has not arrived, and the operation is executed from the instruction for which the input data is complete, and the operation result is notified to the output notification destination. data-driven control method. 2. In the data-driven control method as set forth in claim 1, an initial value is set in the initial setting table for an input data number counter where the number of input data required for executing an instruction is 2 or more immediately before program execution. A data-driven control method characterized by: