JPH01204150A - Information processor - Google Patents

Abstract

PURPOSE:To substitute value for same variables stored in a register file at a high speed by using a double reading port associative register file which performs data writing actions in a single operation to all registers which hold the same value as that of the read data. CONSTITUTION:A double reading port associative register file 110 stores a register holding the data of the same value as that of the read data and can write data to all registers having the same value in a single operation in a data reading state. Then a tag check circuit 120 checks the tag parts of two pieces of data read out of an optional argument register and work register and decides a process to be carried out based on the checking result. Thus the value can be substituted for the same variables stored in a register file at a high speed.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention detects a register that holds data with the same value as the read data, and writes to all registers that hold the same value as the read data. Information that enables high-speed processing of specific data, such as assignment of values to the same variable that exists in multiple register files, by using a 2-read port associative register file that can be achieved with a single write operation. It relates to a processing device.

(Prior Art) Recent high-level programming languages have complex data structures and frequently use pointers.

For example, the programming language PROLOG is attracting attention in the field of knowledge information processing.

The basic element of this prologue program description is a predicate. This predicate consists of a predicate name and a number of arguments, and a predicate with a predicate name P having five arguments is as follows.

P('a', x, 'b', X, X) 'a' and 'b' are data representing symbols called atoms. There is a method in which the arguments of the predicate are stored in a group of registers called argument registers. Conventionally, the argument registers were implemented using a general-purpose register file.The arguments of the predicate P are stored in the argument registers. In this case, the atoms ``a'' and ``b'' can be stored directly in the argument register, but the variable X stores the value of the variable cell in memory.

FIG. 2 shows a state in which the arguments of predicate P are stored in the argument register. 200 is a register file that constitutes the argument register group, and 201 is the first argument "'a"? This is the argument register to store. Variable X uses cell 206 on memory as a data storage area. The argument register 202 is
Since the second argument is variable X, a pointer to variable cell 206 on memory is stored.

(Problems to be Solved by the Invention) Variable data cannot be directly stored in argument registers using conventional general-purpose register files. For this reason, accessing variable data must always follow the pointer.
The time required for processing tended to be longer than that of atom data. The reason why variable data cannot be stored directly will be explained using the predicate P mentioned above.

What is the state in Figure 3 when the five arguments of predicate P are directly stored in the argument register? This is a diagram showing 302°304.305
A variable X is stored in three argument registers. In processing the second argument, atom 90''? is assigned to variable X.

FIG. 4 is a diagram showing the state after the processing of the second argument is completed,
Argument register 402 stores atom "C". However, the argument registers 404 and 405 continue to store the variable X. Here, in processing the fourth argument, the atom "d" is assigned to the variable X.

FIG. 5 shows the state after the processing of the fourth argument is completed.

Argument register 502 stores atom "C", and argument register 404 stores atom "d"? This creates a contradiction in that two pieces of data are assigned to one variable. In order to avoid this contradiction, when assigning the atom "Nc" to the variable ''.However, the processing time required to check all argument registers is much longer than the processing time required to follow pointers in variable access, so in the case of argument registers realized with a general-purpose register file, It is better not to store variable data directly.

An object of the present invention is to store registers that hold the same value as the read data when reading data, and to write data to all registers that hold the same value with one data write operation. An object of the present invention is to provide an information processing device equipped with an argument register that can directly store variable data, which could not be realized when using a general-purpose register file, by using a port-associative register file.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the information processing device provided by the present invention processes data consisting of a tag section indicating a data type and a value section indicating a data value. A 2-read port associative register file with 2 read ports and 1 write port for temporarily storing the data, and arithmetic and logical operations on the value part of the output data of the 2 read port associative register file. a tag inspection circuit that inspects the combination of tag portions of the two output data of the two read port associative register file; and a memory that is connected to the two read port associative register file and stores data. and a control circuit that outputs control signals to the four components based on the test result output of the tag test circuit, and when the two read port associative register file reads data,
Compare the read data with the data held by the registers that make up the register file, set a flag indicating which read data is equal to all registers that store the same value as the read data, and set the flag to indicate which read data is equal to the read data. It is possible to write data to all registers belonging to any set of 2m register sets that are set in one data write operation, and the tags of the two data read from the two read port associative register file The process to be executed next is determined based on the results of inspecting the parts.

(Operation) The information processing apparatus of the present invention uses a two-read port associative register file as means for providing an argument register file for temporarily holding data and a working register. The tag inspection circuit examines the tag portions of two pieces of data read from an arbitrary argument register and a work register, and determines the next process to be executed based on the inspection results. As a result of inspecting the tag part, if variable data exists among the two read data, the other data is substituted for the variable data. If both data are variables, a pointer to the other variable is written to the variable with the larger address in the memory of the variable cell.

7 argument registers and 1 working register? The operating principle of the information processing apparatus according to the present invention will be explained. Figure 6 is
It is a two read port associative register file that provides seven argument registers and one working register. 60
1 to 607 are argument registers, and 608 is a work register. Argument of predicate P shown below? Set in argument register.

The predicate P is.

P('a'', X, ''b'', X, X) shall be.

FIG. 7 shows the state of the two-read port associative register file and memory after setting the argument of predicate P.

709 is a cell of variable X on the memory. Argument registers 702, 704, 705 are variables X? Store. The value portions of argument registers 702, 704, and 705 store the memory address of self 09 of variable X on memory.

The problem that the information processing device of the present invention is trying to solve is:
The purpose is to speed up processing for variable X. Therefore,
In the processing of predicate P, processing of the second argument will be explained.

FIG. 8 shows the state of the two read port associative register file when the second argument is read.

The second argument is the variable X. Therefore, when the second argument register 802 is read, the data held in the second, fourth, and fifth argument registers 802, 804, and 805 match the read data (variable X). As a result, the 2 read port associative register file contains flags 812, 814.8 indicating that the second, fourth, and fifth argument registers hold the same value as the read data of the second argument register.
Set 15. At this time, if the data held in the working register is the atom 1c'', the atom @C'' is assigned to the second argument variable X.

Figure 9 shows the data flow of the process of assigning this atom @C'' to variable .

The state after processing of the second argument is shown in FIG. 1O.

2nd, 4th, and 5th argument register 1 that held variable X
The held data of 002, 1004.1005 has been rewritten to the atom "'C".

As a result, the associative register file of the present invention can realize the process of directly storing the variable xi- in the argument register, which could not be realized when using a conventional general-purpose register file.

(Example) Examples of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of an information processing apparatus according to the present invention, and 100 is a memory for storing data to be processed and data after processing. The data to be processed is transferred from the memory 100 to the data selector 101'! Move to the 2-read port associative register file 110 in r ways. 2
The value part of the data held by the read port associative register file 110 is operated on by the arithmetic and logic unit 140 .

The operation result passes through the data selector 101 and is written to the 2-read L port associative register file 110 again.

On the other hand, the tag section is inspected by the tag inspection circuit 120, and the next process to be executed is determined based on the combination of data types of the two read data.

The calibration result is notified to the control circuit 130, and the control circuit 130
Memory 100, 2 read port associative register file 110%, tag inspection circuit 120, arithmetic logic unit 14
Send a control signal to 0.

When reading two pieces of processing data from the two-pronged port associative register file 110, the read port associative register file 110 reads data held in all registers that make up the register file and two pieces of read data.
A flag is set in a register that holds data with the same value as the read data to indicate which read data matches the read data. On the other hand, the two pieces of read data are processed by the tag inspection circuit 120 and the arithmetic logic unit 140. During the process, the tag inspection circuit 120 determines the process to be executed next. If at least one of the two pieces of read data is variable data, the next process to be executed is to assign the other data to the variable data. To this variable, the other data? The writing process is
This is achieved by writing the other data into all registers that match the read data, which is a variable, when reading two pieces of data.

An embodiment of a two read port associative register file having such a function is shown in FIG.

1100 is a register number decoder that decodes a register number sent from the outside and generates control signals for data read operations and data write operations. In a data read operation for the register with register number ``3'', the register number decoder 1100 generates a control signal from the read register number, controls the register output tri-state buffers 1131 to 1138, and Select register 1103 from among the eight registers, and select the data held in register 1103? Output tri-state buffer 1133
to the output buffer 1110 via the output buffer 1110.

At this time, the coincidence detection circuits 1111 to 1118 compare the output of the output tristate write buffer 1133 with the data held in the registers 1101 to 1108, and send the comparison results to the coincidence flag holders 1121 to 1128.

In a data write operation to register number ``5'', register number generator 1100 generates a write enable signal. The write permission signal passes through write permission signal selectors 1141 to 1148 and is sent to the register 1101.
is sent to 1108.

In this case, write permission signal selector 1145'Th
As expected, a write permission signal is sent to register 1105,
The input data sent from input buffer 1120 is written to register 1105.

Is the data the same value as the read data? For write operations to the registers held, the outputs of the match flag holders 1121 to 1128 pass through the write permission signal selectors 1141 to 1148, and the outputs of the registers 1101 to 1108
sent to. As a result, the output of the match flag holder with the match flag set becomes the write permission signal,
Match flag is set. n write data sent from the input buffer 1120 is written to a plurality of registers.

(Effects of the Invention) The information processing device It of the present invention detects a register that holds the same value as the read data, and realizes writing to all registers that hold the same value as the read data in one write operation. This feature enables high-speed execution of processes such as the process of assigning values to the same variable that exists in a plurality of register files. As a result, it is possible to rewrite multiple pieces of specific data on the register file at high speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the information processing apparatus of the present invention, FIG. 2 is a diagram showing the state of a two-read port associative register file, which is one of the components of the present invention, and FIG. Figure 4 shows the state after writing the argument of P, Figure 4 shows the state after reading the second argument, Figure 5 shows the state in which the contents of the working register are being written, and Figure 6 shows the state after reading the second argument. A diagram showing the state after writing the contents of the working register, Figure 7 is a block diagram of an actual example of a two-port associative register file, and Figure 8 shows the argument of predicate P stored in the argument register. Figure 9 shows the state in which variable It is a diagram showing a state where processing has been completed. 100...Memory, 101,102...
・Data selector, 110...2 start-up port associative register file upper 2o...tag inspection circuit, 130...control circuit, 140...
Arithmetic logic unit, 200°300.400,500 ・
...General-purpose register file, 201 to 205.3
01~305.401~405゜501~505...
...Register, 207...Memory, 206.
...Cell of variable X, 600,700,800゜9
00.1000...2 read port associative register file, 601~608.701~708.80
1~808.901~908.1001~1008...
...Associative register, 709,809,909.10
09...Cell of variable X on memory, 811-8
18. 911 to 918...Flag indicating coincidence with the start-up data, 1100...Register number decoder, 1101 to 1108...Register, 1
120 ・・・・・・Enkahafa, 1110.113
0 --- Output buffer, 1111 to 1118.1
151-1158...-Scattered product output circuit, 1121
~1128.1161~1168 ...... Match flag holder, 1131~1138.1171-1178
・・・・・・Tri-state φ buffer for output. Agent: Susumu Uchihara, Patent Attorney 2nd figure, 3rd figure, 4th figure

Claims (1)

[Claims] A 2-read port associative register file that processes data consisting of a tag section indicating the data type and a value section indicating the data value, and has 2 read ports and 1 write port for temporarily storing data. , an arithmetic and logic unit that performs arithmetic and logic operations on the value part of the output data of the two read port associative register files, and two of the two read port associative register files.
a tag inspection circuit that inspects the combination of tag parts of the output data; a memory that is connected to the two read port associative register file and stores data; Consisting of a control circuit that outputs control signals to the constituent elements, when the two read port associative register file reads data, it compares the two read data with the data held by the registers that make up the register file, and calculates the read data. A flag indicating which read data is equal is set in all registers that store the same value as , and a single flag is applied to all registers belonging to any set of the two sets of registers for which that flag is set. Information processing characterized in that data can be written by a data write operation, and the next process to be executed is determined based on the result of inspecting the tag part of the two data read from the two read port associative register file. Device.