JPH01201913A - Preparation of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a thin film transistor with a sufficient transconductance, by a method wherein Si ions are implanted into a polysilicon film, and a two- step annealing process is then performed. CONSTITUTION:A polysilicon film 2 is formed on allover the surface of a silica glass substrate 1 by means of a lower pressure CVD system. Subsequently, Si ions are extensively implanted into the polysilicon film 2 by means of an ion implanter. As an implantation condition, the Si implantation dose is set to more than 1X10<15>dose/cm<2>. This implantation of Si ions makes the polysilicon film 2 amorphous. Next, in order to prevent the silica glass substrate 1 from deforming and the polysilicon film 2 from cracking, the polysilicon film 2 is selectively etched so that it is left on only a transistor area for a TFT with being removed on the other area. Next, an annealing is performed for 30 hours or more at 500-700 deg.C to enlarge a crystal grains. Thereafter, when an annealing is again performed for 1 hour or more at above 900 deg.C, a large number of crystal defects which are generated in the crystal grain are extinguished. According to the manufacturing process described hereinabove, the crystal grains are enlarged and the electron mobility is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing semiconductor devices such as thin film transistors used in liquid crystal display devices, particularly active matrix liquid crystal display devices.

Conventional technology In recent years, Actidama 1 - Linox type liquid crystal display 2 ・
＼-7 The devices have come to be used in pocket TVs and other devices due to their low power consumption and thinness.

Recently, research and development have been actively conducted on techniques for simultaneously forming a shift register on a glass substrate in order to further downsize the device.

Hereinafter, thin film transistors (TFTs) constituting the shift register of the above-mentioned liquid crystal display are conventionally used as low-pressure CVD devices.
A shift register circuit is constructed using TPT using polysilicon film formed in , for the transistor region.

Problems to be Solved by the Invention However, even if TPTs made using the manufacturing method described above are used in scanning circuits for liquid crystal display devices, they cannot operate at high speeds of 2 MHz or higher due to their small qmO lance conductance. It has drawbacks.

In view of the above drawbacks, the present invention provides a TPT manufacturing method that increases the mobility of electrons and holes in polysilicon to obtain a sufficient qm.

Means for Solving the Problems In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes forming a polysilicon film on a quartz substrate using a low pressure CVD apparatus, and then depositing 5si+ on the entire surface using an ion implanter. 1x
A step of injecting 1015deseA or more, and then,
It is characterized by comprising a step of annealing at 500 to 700° C. for 30 hours or more, followed by an annealing step at 900° C. or more for 1 hour or more.

How it works This method results in larger grain boundary sizes than conventional polysilicon, resulting in greater electron and hole mobility. Therefore, a TPT formed of polysilicon annealed by this method has a large qm.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a cross-sectional view of TPT manufactured by the manufacturing method of the present invention. In FIG. 1, 1 is a quartz glass substrate, 2 is polysilicon with large grain boundaries, 3 is a gate oxide film, 4 is a gate electrode, 5 is a source or drain electrode, 6 is a
is the source or drain.

The manufacturing method will be explained using the TPT process diagram shown in FIG.

As shown in FIG. 2a, the quartz glass substrate 1 is coated with low pressure CVD.
Polysilicon (1000 to 2500 layers thick) is deposited on the entire surface of the device.

After that, 81 is implanted into the entire surface using an ion implanter. As for the implantation conditions, the accelerating voltage is 100 to 200 KeV.
In this case, the implantation amount is 1×10 2 dose 74 or more.

By implanting Sl ions, polysilicon is
Become amorphous.

Next, the quartz substrate was deformed due to the stress generated by the enlarging of the grain boundaries during the subsequent annealing process.
To prevent cracks from occurring in the polysilicon film, as shown in Figure 2, the polysilicon layer is left only in the transistor region of the TPT.
Other parts are removed by etching.

Next, annealing is performed at 5°C to 700°C in an N2 atmosphere for 70 hours or more to enlarge the grain boundaries to 0.5 pm or more. Next, by annealing in a N2 atmosphere at 1000° C. to 1100° C. for 1 hour or more, many crystal defects occurring in the grain boundaries disappear.

As a result of the above process, the crystal grain boundaries are thicker (0.5 pm or more) than in conventional polysilicon, and as a result, the electron mobility becomes several times larger.

In this manufacturing method, before solid-phase growth, the polysilicon is formed into an island shape as shown in Figure 2, so the annealing process enlarges the crystal grain boundaries and generates stress. , warping of the quartz substrate and cracking of the polysilicon film can be prevented.

TPTs made using the manufacturing method shown in Figure 2 have qm several times larger than TPTs made from conventional polysilicon, and the scanning circuit using them has a 5MHz frequency.
It operates at higher speeds than conventional ones.

6 to 7 A block diagram of an active matrix type liquid crystal display device having manufacturing power υ and features of the present invention is shown in FIG.

In FIG. 3, 1 is on a quartz glass substrate, 31 is a horizontal shift register composed of a D flip-flop using, for example, 0MO3TFT, 32 is also a vertical shift register, 33 is a switching transistor, 3
4 is a pixel electrode formed of, for example, an IT○ electrode, and 35 is a video signal input terminal.

In order to use this liquid crystal display device as a television monitor, the horizontal shift register 32 needs to be driven at several MHz. Therefore, with the TPT whose qm has been greatly improved by the manufacturing method of the present invention, the horizontal shift register 3
1 needs to be formed.

In the manufacturing method of the present invention, the switching transistor 33 in the multi-node section can be formed at the same time, so the leakage current in the OH state of the TPT can be reduced by an order of magnitude, which improves the image quality of the liquid crystal display device. It can be greatly improved.

71\-/ Effects of the Invention As described above, the present invention is capable of implanting S1 ions into polysilicon and annealing in two stages, thereby increasing the size of the crystal grain boundaries of polysilicon and TPT. Improved characteristics.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of TPT in an embodiment of the present invention, FIG. 2 is a process diagram of TPT in an embodiment of the present invention,
FIG. 3 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention. 1. Quartz glass substrate, 2...polysilicon, 3
Gate oxide film, 4... Gate electrode, 5...
...Source/drain electrode, 31...Horizontal shift register, 32...Vertical shift register, 33...Switching transistor. Name of agent: Patent attorney Toshio Nakao and 1 other person, to 6” δ ○ ℃

Claims (1)

[Claims] A step of forming a polysilicon film on a quartz glass substrate, and applying silicon ions accelerated to 100 KeV or higher at 1×10^1^5 dose/cm^3 to the polysilicon.
The step of implanting the above polysilicon, and then the polysilicon
A method for manufacturing a semiconductor device, comprising the steps of annealing at 0° C. to 700° C. for 30 hours or more, and then annealing the polysilicon at 900° C. or more for 1 hour or more.