JPH01194480A - Manufacture of ceramic thermoelectric element - Google Patents

Manufacture of ceramic thermoelectric element

Info

Publication number
JPH01194480A
JPH01194480A JP63020120A JP2012088A JPH01194480A JP H01194480 A JPH01194480 A JP H01194480A JP 63020120 A JP63020120 A JP 63020120A JP 2012088 A JP2012088 A JP 2012088A JP H01194480 A JPH01194480 A JP H01194480A
Authority
JP
Japan
Prior art keywords
type semiconductor
semiconductor ceramic
thermoelectric element
ceramic
ceramics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63020120A
Other languages
Japanese (ja)
Inventor
Yutaka Shimabara
豊 島原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP63020120A priority Critical patent/JPH01194480A/en
Publication of JPH01194480A publication Critical patent/JPH01194480A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To bake or seize a thermoelectric element at a high temperature and to obtain the thermoelectric element having low element resistance and high performance index by employing a noble metal material as an electrode for electrically connecting a P-type semiconductor ceramic layer to an N-type semiconductor ceramic layer. CONSTITUTION:P-type semiconductor ceramics 2a, 2b are electrically connected to parts of N-type semiconductor ceramics 1a, 1b through conductive pastes 3a-3c containing a noble metal material, and the paste is baked to form electrodes. A potential barrier is formed between the ceramics and the electrodes in this state. Then, a specific voltage is applied through the P-type and N-type ceramics to the electrodes to break the barrier formed between the electrodes and the ceramics. Thus, the electrodes come in ohmic contact with the ceramics to obtain a thermoelectric element which reduces its element resistance, and enhances its performance index.

Description

【発明の詳細な説明】 (a)産業上の利用分野 この発明は、n型半導体セラミックとn型半導体セラミ
ックを接合してなる熱電素子に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a thermoelectric element formed by bonding an n-type semiconductor ceramic and an n-type semiconductor ceramic.

(b)従来の技術 従来、熱電材料として、B iz Te3.FeSi、
5i−Geなどが知られている。これらの熱電材料は比
抵抗が小さいため電力用途として優れている。また最近
、半導体セラミック材料の一部に大きなゼーヘノク係数
を有する熱電材料が見出されている。このようなゼベソ
ク係数の大きな熱電材料によって高感度の熱センサが開
発されている。
(b) Prior Art Conventionally, as a thermoelectric material, B iz Te3. FeSi,
5i-Ge and the like are known. These thermoelectric materials have low specific resistance, making them excellent for power applications. Furthermore, recently, thermoelectric materials having a large Seehenok coefficient have been discovered as part of semiconductor ceramic materials. Highly sensitive thermal sensors have been developed using thermoelectric materials with such large Zebesok coefficients.

(C1発明が解決しようとする課題 半導体セラミックにより熱電素子を構成する場合、熱起
電力を高めるため、n型半導体層とn型半導体層とが交
互に積層されるが、その積層方法として、半導体セラミ
ックの焼結板を積層する方法と、セラミックグリーンシ
ートを積層して一体焼成する方法とがある。いずれの場
合も金属材料の電極により電気的に接続されるが、この
電極と半導体セラミック層との接触はオーム性接触であ
ることが望ましい。なぜなら半導体セラミックと電極界
面が非オーム性接触であれば高抵抗層が形成され、素子
抵抗が大きくなって熱電素子としての性能指数が低下す
るからである。このため半4体セラミックとオーム性接
触が得られる金属材料で電極を形成すればよいが、それ
らは主にPb。
(C1 Problem to be Solved by the Invention When a thermoelectric element is constructed using a semiconductor ceramic, n-type semiconductor layers and n-type semiconductor layers are alternately laminated in order to increase the thermoelectromotive force. There is a method in which sintered ceramic plates are laminated, and a method in which ceramic green sheets are laminated and integrally fired.In both cases, electrical connection is made by an electrode made of a metal material, but this electrode and the semiconductor ceramic layer It is desirable that the contact be an ohmic contact, because if the semiconductor ceramic and the electrode interface are in non-ohmic contact, a high resistance layer will be formed, the element resistance will increase, and the figure of merit as a thermoelectric element will decrease. For this reason, electrodes may be formed of a metal material that can make ohmic contact with the semi-quadramid ceramic, but these are mainly Pb.

Sn、Zn、A1などの卑金属であり高温下で酸化され
やすい。従来よりセラミック基板用電極として用いられ
ているAg、Pd、Ag−Pd、Ptなどの貴金属は比
較的高温まで使用可能であるが、仕事関数が高く、n型
半導体セラミックとの間に電位障壁が形成され非オーム
性接触となる。
It is a base metal such as Sn, Zn, and A1, and is easily oxidized at high temperatures. Noble metals such as Ag, Pd, Ag-Pd, and Pt, which have been conventionally used as electrodes for ceramic substrates, can be used up to relatively high temperatures, but they have high work functions and create a potential barrier between them and n-type semiconductor ceramics. A non-ohmic contact is formed.

この発明の目的は、熱電素子として半導体セラミック材
料を用い、かつ各半導体セラミ・7りと電極とをオーム
性接触させて性能指数の高い熱電素子を得られるように
したセラミック熱電素子の製造方法を提供することにあ
る。
The object of the present invention is to provide a method for manufacturing a ceramic thermoelectric element, which uses a semiconductor ceramic material as the thermoelectric element and makes it possible to obtain a thermoelectric element with a high performance index by bringing each semiconductor ceramic element into ohmic contact with an electrode. It is about providing.

(d1課題を解決するための手段 この発明のセラミック熱電素子の製造方法は、n型半導
体セラミックとn型半導体セラミックの一部を貴金属材
料を含む導電ペーストを介して接続し、この導電ペース
トを焼き付けて電極を形成する工程と、 前記n型半導体セラミックとn型半導体セラミックを介
して前記電極に特定電圧を印加し、前記電極と半導体セ
ラミック間の電位障壁を破壊する工程とからなる。
(Means for Solving Problem d1) The method for manufacturing a ceramic thermoelectric element of the present invention connects an n-type semiconductor ceramic and a part of the n-type semiconductor ceramic via a conductive paste containing a noble metal material, and bakes this conductive paste. and a step of applying a specific voltage to the electrode via the n-type semiconductor ceramic and the n-type semiconductor ceramic to destroy the potential barrier between the electrode and the semiconductor ceramic.

(e)作用 この発明のセラミック熱電素子の製造方法によれば、前
半工程により、n型半導体セラミックとn型半導体セラ
ミックの一部が貴金属材料を含む導電ペーストを介して
接続され、この導電ペーストが焼き付けられて一応の電
極が形成される。この状態では半導体セラミックと電極
間に電位障壁が形成されている。後半工程において、前
記n型半導体セラミックとn型半導体セラミックを介し
て前記電極に特定電圧が印加されることにより、前記電
極と半導体セラミック間に形成されていた電位障壁が破
壊される。これにより電極と半導体セラミック間がオー
ム性接触となり素子抵抗が小さくなり、性能指数の高い
熱電素子を得ることができる。
(e) Function According to the method for manufacturing a ceramic thermoelectric element of the present invention, in the first half step, an n-type semiconductor ceramic and a part of the n-type semiconductor ceramic are connected via a conductive paste containing a noble metal material, and this conductive paste A temporary electrode is formed by baking. In this state, a potential barrier is formed between the semiconductor ceramic and the electrode. In the second half process, a specific voltage is applied to the electrode via the n-type semiconductor ceramic and the n-type semiconductor ceramic, thereby destroying the potential barrier formed between the electrode and the semiconductor ceramic. This makes ohmic contact between the electrode and the semiconductor ceramic, reducing element resistance, and making it possible to obtain a thermoelectric element with a high figure of merit.

(f)実施例 n型半導体セラミックとしてNi099.5m01%に
対してLi2OをQ、5mo+2%ドープした材料を用
い、バインダを添加してドクターブレード法によってグ
リーンシートを成形し、乾燥後、空気中において125
0°Cで1時間焼成してn型半導体セラミックの焼結板
を作成した。
(f) Example As an n-type semiconductor ceramic, a material in which Ni099.5m01% is doped with Li2O at Q,5mo+2% is used, a binder is added, a green sheet is formed by the doctor blade method, and after drying, it is placed in the air. 125
A sintered plate of n-type semiconductor ceramic was produced by firing at 0°C for 1 hour.

一方n型半導体セラミックとして、BaTi0=99.
5moff%に対してY* O,を0.5m。
On the other hand, as an n-type semiconductor ceramic, BaTi0=99.
Y*O, 0.5m for 5moff%.

β%ドープした材料を用い、バインダを添加してドクタ
ーブレード法によってグリーンシートを成形し、乾燥後
、空気中において1300℃で1時間焼成し、これによ
ってn型半導体セラミックの焼結板を作成した。
Using β% doped material, a binder was added and a green sheet was formed by the doctor blade method, and after drying, it was fired at 1300°C in air for 1 hour, thereby creating a sintered plate of n-type semiconductor ceramic. .

それぞれの焼結板の所定箇所に、Ag、  ワニス、フ
リソHM剤を混練してペースト状にした導電ペーストを
印刷し、第1図に示すように各セラミック板を積層した
。図において1 a(!:l bはn型半導体セラミッ
ク板、2aと2bはn型半導体セラミック板である。ま
た3a、3b、3c、3d、3eはそれぞれ導電ペース
トであり、3a、3b、3c、3dによって4枚のセラ
ミック板を電気的に直列接続した。なお3a、3eは焼
付後取り出し電極として用いる。
A conductive paste made by kneading Ag, varnish, and Friso HM agent was printed at a predetermined location on each sintered plate, and the ceramic plates were laminated as shown in FIG. 1. In the figure, 1 a (!: l b is an n-type semiconductor ceramic plate, 2 a and 2 b are n-type semiconductor ceramic plates, and 3 a, 3 b, 3 c, 3 d, and 3 e are conductive pastes, respectively. , 3d electrically connected four ceramic plates in series. Note that 3a and 3e are used as electrodes to be taken out after baking.

第1図では説明上n型半導体セラミック板とn型半導体
セラミック板をそれぞれ2層とした例を示したが、n型
半導体セラミック板とn型半導体セラミック板をそれぞ
れ10層合計20層の積層体を形成し、1010X20
X2のリーイズにスライスして、常温での素子抵抗を測
定した。その結果はLMΩであった。この値は各半導体
セラミック板自体の抵抗値と積層数から計算して明らか
に高抵抗であり、n型半導体セラミック板と焼き付けら
れた電極間に電位障壁(ショットキーバリア)が形成さ
れた。
For the sake of explanation, Fig. 1 shows an example in which the n-type semiconductor ceramic plate and the n-type semiconductor ceramic plate are each made of two layers. form 1010X20
It was sliced into X2 slices and the element resistance at room temperature was measured. The result was LMΩ. This value was clearly high as calculated from the resistance value of each semiconductor ceramic plate itself and the number of laminated layers, and a potential barrier (Schottky barrier) was formed between the n-type semiconductor ceramic plate and the baked electrode.

第2図はn型半導体セラミック板と、このセラミック板
に焼き付けられた2つの電極との間に形成されたショッ
トキーダイオードを示している。
FIG. 2 shows a Schottky diode formed between an n-type semiconductor ceramic plate and two electrodes baked into the ceramic plate.

図において11方向に特定電流を通電すること己こより
D2で示したショットキーダイオートを破壊することが
できる。また12方向に通電することによってDiで示
したショットキーダイオートを破壊することができる。
In the figure, the Schottky diode indicated by D2 can be destroyed by passing a specific current in 11 directions. Further, by applying current in 12 directions, the Schottky diode indicated by Di can be destroyed.

この実施例では第3図に示すように最大電圧をVmとし
半値幅(印加電圧がV m / 2を超える時間)を1
0μsecとし、電流密度が50A/cm2となる3角
波パルス電圧を正負両方向に各3回印加した。その後、
素子抵抗を測定したところIOKΩまで低下し、これに
よって電位障壁が破壊されたことを確認した。
In this example, as shown in FIG. 3, the maximum voltage is Vm, and the half-width (the time when the applied voltage exceeds V m / 2) is 1.
A triangular wave pulse voltage with a current density of 50 A/cm 2 was applied three times in both the positive and negative directions for 0 μsec. after that,
When the element resistance was measured, it decreased to IOKΩ, thereby confirming that the potential barrier was destroyed.

したがって熱電素子としての性能指数は電位障壁が破壊
される前と比較して約100倍向上した。
Therefore, the figure of merit as a thermoelectric element was improved about 100 times compared to before the potential barrier was destroyed.

なお、電位障壁を破壊するために熱電素子に印加ずべき
電圧は半導体セラミック板の積層数と電極および半導体
セラミック材料によって適宜設定すればよい。
Note that the voltage that should be applied to the thermoelectric element in order to destroy the potential barrier may be appropriately set depending on the number of laminated semiconductor ceramic plates, the electrodes, and the semiconductor ceramic material.

実施例ではあらかじめ複数の半導体セラミックの焼結板
を作成し、これを導電ペーストを介して積層した後焼付
を行う例であったが、各セラミック層をグリーンシート
の状態で積層し、一体焼成することによって製造する場
合も同様に適用することができる。
In the example, a plurality of sintered semiconductor ceramic plates were created in advance, and these were laminated with conductive paste and then baked, but each ceramic layer was laminated in the form of a green sheet and fired as a unit. The same can be applied to the case of manufacturing by.

(g+発明の効果 以上のようにこの発明によれば、n型半導体セラミック
層とn型半導体セラミック層とを電気的に接続する電極
として貴金属材料を用いたことにより、高温で焼成また
は焼付を行うことができ、セラミック熱電素子に適用す
ることができる。しかも電極と半導体セラミック層間に
形成される電位障壁が破壊されることにより、素子抵抗
が低く性能指数の高い熱電素子を得ることができる。
(g+ Effect of the invention As described above, according to this invention, by using a noble metal material as an electrode for electrically connecting the n-type semiconductor ceramic layer and the n-type semiconductor ceramic layer, firing or baking is performed at a high temperature. This method can be applied to ceramic thermoelectric elements.Moreover, by destroying the potential barrier formed between the electrode and the semiconductor ceramic layer, it is possible to obtain a thermoelectric element with low element resistance and a high figure of merit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例であるセラミック熱電素早の
製造方法による製造途中のセラミック熱電素子の構造を
示す図、第2図は半導体セラミック層と電極間に形成さ
れるショットキ・ダイオードの構成を示す図である。第
3図は前記セラミック熱電素子に印加される電圧波形を
示す図であるla、1b−n型半導体セラミック板、2
a、2.b−p型半導体セラミック板、3a、3b、3
c、3d、3e−導電ペーストおよびその焼付による電
極。
Figure 1 is a diagram showing the structure of a ceramic thermoelectric element in the process of being manufactured by the ceramic thermoelectric quick manufacturing method which is an embodiment of the present invention, and Figure 2 is a diagram showing the configuration of a Schottky diode formed between a semiconductor ceramic layer and an electrode. FIG. FIG. 3 is a diagram showing voltage waveforms applied to the ceramic thermoelectric element. la, 1b-n type semiconductor ceramic plate, 2
a, 2. b-p type semiconductor ceramic plate, 3a, 3b, 3
c, 3d, 3e - electrodes by conductive paste and its baking.

Claims (1)

【特許請求の範囲】[Claims] (1)p型半導体セラミックとn型半導体セラミックの
一部を貴金属材料を含む導電ペーストを介して接続し、
この導電ペーストを焼き付けて電極を形成する工程と、 前記p型半導体セラミックとn型半導体セラミックを介
して前記電極に特定電圧を印加し、前記電極と半導体セ
ラミック間の電位障壁を破壊する工程とからなるセラミ
ック熱電素子の製造方法。
(1) A part of the p-type semiconductor ceramic and the n-type semiconductor ceramic are connected via a conductive paste containing a noble metal material,
a step of baking this conductive paste to form an electrode; and a step of applying a specific voltage to the electrode via the p-type semiconductor ceramic and the n-type semiconductor ceramic to destroy the potential barrier between the electrode and the semiconductor ceramic. A method for manufacturing a ceramic thermoelectric element.
JP63020120A 1988-01-29 1988-01-29 Manufacture of ceramic thermoelectric element Pending JPH01194480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63020120A JPH01194480A (en) 1988-01-29 1988-01-29 Manufacture of ceramic thermoelectric element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63020120A JPH01194480A (en) 1988-01-29 1988-01-29 Manufacture of ceramic thermoelectric element

Publications (1)

Publication Number Publication Date
JPH01194480A true JPH01194480A (en) 1989-08-04

Family

ID=12018261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63020120A Pending JPH01194480A (en) 1988-01-29 1988-01-29 Manufacture of ceramic thermoelectric element

Country Status (1)

Country Link
JP (1) JPH01194480A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054882A (en) * 2009-09-04 2011-03-17 Fujitsu Ltd Thermoelectric conversion element and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054882A (en) * 2009-09-04 2011-03-17 Fujitsu Ltd Thermoelectric conversion element and manufacturing method thereof

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