JPH01162240U - - Google Patents

Info

Publication number
JPH01162240U
JPH01162240U JP5550688U JP5550688U JPH01162240U JP H01162240 U JPH01162240 U JP H01162240U JP 5550688 U JP5550688 U JP 5550688U JP 5550688 U JP5550688 U JP 5550688U JP H01162240 U JPH01162240 U JP H01162240U
Authority
JP
Japan
Prior art keywords
metal layer
insulating film
recognition mark
utility
model registration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5550688U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5550688U priority Critical patent/JPH01162240U/ja
Publication of JPH01162240U publication Critical patent/JPH01162240U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP5550688U 1988-04-25 1988-04-25 Pending JPH01162240U (US07579456-20090825-P00002.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5550688U JPH01162240U (US07579456-20090825-P00002.png) 1988-04-25 1988-04-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5550688U JPH01162240U (US07579456-20090825-P00002.png) 1988-04-25 1988-04-25

Publications (1)

Publication Number Publication Date
JPH01162240U true JPH01162240U (US07579456-20090825-P00002.png) 1989-11-10

Family

ID=31281408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5550688U Pending JPH01162240U (US07579456-20090825-P00002.png) 1988-04-25 1988-04-25

Country Status (1)

Country Link
JP (1) JPH01162240U (US07579456-20090825-P00002.png)

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