JPH01161556A - Memory controlling circuit - Google Patents

Abstract

PURPOSE:To easily discover a read/write instruction to an improper memory area of a microprogram in a short time by providing a microprocessor and memory controlling circuit which set a faulty state when an interruption is issued. CONSTITUTION:When writing is made from a microprocessor 1 in the microprogram area of a RAM 2 or ROM 3, the address of the microprogram area is sent to an address information line 11 and a write instruction is sent to a memory write information line 13. Moreover, at the RAM 2 and ROM 3 the content of a data information line 10 is written in an instructed address. Simultaneously, a memory controlling circuit 4 checks the memory access of the processor and since the address indicates the write instruction to the microprogram area, discriminates that the memory access is improper one. Then the circuit 4 interrupts the microprocessor 1 through a read/write error information line 14 and sets the processor 1 to a faulty state. Therefore, the read/write instruction of the microprogram to an improper memory area can easily be discovered in a short time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to memory read and write control, and particularly to a control circuit for a memory in which micro programs and work tables used in a micro processor are stored.

[Conventional technology]

Conventionally, in this type of memory control circuit, the memory is read-only memory (ROA) or rewritable memory (RAM).
Regardless of the
Even when reading/writing the memory to the sed area), the reading/writing of the memory was performed using memory read/write signals from the microprocessor.

[Problem that the invention seeks to solve]

The above-mentioned memory control circuit performs memory read/write based on memory access from the microprocessor, regardless of whether it is ROM or RAM, and even when reading/writing memory to an unimplemented area. This has the drawback that a bug in the program may cause the program to run out of control due to writing in the micro program area or reading/writing to an unimplemented area, and it takes a long time to check.

SUMMARY OF THE INVENTION An object of the present invention is to provide a memory control circuit that eliminates the above-mentioned drawbacks.

[Means for solving problems]

The present invention includes a microprocessor that controls a system and halts when an interrupt occurs, a ROM circuit and a RAM circuit that store microprograms of the microprocessor, work tables for system control, and the like; The ROM circuit and RA of the processor
When reading/writing memory of M circuit etc., the micro-
A memory control circuit characterized in that it has a memory control circuit that checks memory access of the microprocessor based on processor address information and memory read/write information.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. The present invention uses a microprocessor (CPU) that controls the subsystem.
1, RA where the work table (readable/writable) and micro program (readable) are stored.
M circuit 2, ROM circuit 3 in which a micro program (readable) is stored, address information line 11 of micro processor 1, and memory read/write information line 1
2.13, the memory control circuit 4 checks the memory access of the microprocessor 1. 10 is a data information line, and 14 is a memory/R/W error information line.

FIG. 2 also shows a memory map of the microprocessor 1 and memory access information of the memory control circuit 4 of the present invention.

1 and 2, when the microprocessor 1 accesses the memory, the memory address to be accessed on the address information line 11, the memory read/write information line 1
2.13, information on whether to read or write the memory is sent.

Here, the ROM circuit 3 or R of the microprocessor 1
When writing to the micro program area of AM circuit 2,
The address of the micro program area is transferred from the microprocessor 1 to the address information line 11, and a write command is sent to the memory write information line 13.

The ROM circuit 3 or RAM circuit 2 writes the contents of the data information line 10 to the designated address. At this time, the memory control circuit 4 checks the memory access of the microprocessor 1 based on the address information and write information. Since the address is a write command in the micro program area, the memory control circuit 4 determines that it is an illegal memory access, and issues an interrupt to the microprocessor 1 via the memory/R/W error information line 14. Microprocessor 1 halts due to this interrupt.
The address at which the illegal memory access was made can be determined by the address at which the interrupt occurred.

〔Effect of the invention〕

As explained above, according to the present invention, when a microprocessor reads/writes to an illegal area,
By interrupting the processor,
This has the advantage that read/write commands to illegal memory areas in a program can be easily found in a short time.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the present invention, and Fig. 2 is a micro-computer diagram of the present invention.
FIG. 3 is a diagram showing a memory map of a processor and memory access information of a memory control circuit.

Claims (1)

[Claims] (1) a microprocessor that controls the system and halts when an interrupt occurs; a ROM circuit and a RAM circuit that store microprograms for the microprocessor, work tables for system control, etc.;
the ROM circuit and RAM of the microprocessor;
A memory control circuit comprising: a memory control circuit that checks memory access of the microprocessor based on address information of the microprocessor and memory read/write information during memory read/write of a circuit or the like. .