JPH01157700A - Loudspeaker driving circuit - Google Patents

Abstract

PURPOSE:To cause a maximum output power to be the four-fold that of a BTL system and, simultaneously, to cause an occupying valume to be small by using two amplifying parts. CONSTITUTION:The circuit is provided with a signal inverting means 2 to invert an input signal, a first switch 10 to select the input signal and an inverted signal, a first amplifying means 11 to amplify such an output signal and to obtain a first output, a second amplifying means 12 to further amplify the first amplified output signal and to obtain a second output signal, and a deciding circuit 9 to decide whether the input signal is positive or negative and to control the changeover of first - third switches 10, 15 and 16. In such a way, by using the power amplifiers 11 and 12, differential amplifying parts 13 and 19, the deciding circuit 9, a level shifting circuit 8, the switches 10, 15 and 16, and an NFB circuit 20, the four-fold maximum output of the BTL system can be stably outputted, and simultaneously, the occupying valume can be made small.

Description

[Detailed description of the invention] A. Industrial application field The present invention particularly relates to a drive circuit for a speaker of an audio device.

B1 Summary of the Invention (1) Determine whether the input signal is positive or negative at the O cross point of the input signal, and (2) switch the input of the first amplification section based on the determination output.

(3) When the input signal of the first amplification section is positive, it is in the same phase form, and when it is negative, it is inverted and given as a positive signal in the opposite phase form, (4 ) The operating point of the output of the first amplifier section is set to 0 potential, (5) the output signal is given to the second amplifier section, (6) the operating point of the output of the second amplifier section is set to Vcc, (7) output the output through a capacitor that level-shifts the operating point down to the O potential; The judgment output of 1) is applied to the speaker via a switch that switches at the same time as the switch of the first amplifier input, and the waveform is restored to one terminal of the speaker to be in phase with the input signal of above (1), (9) The output of (7) above is applied to the spinica via a switch that is switched simultaneously with the switch of the first amplifier input according to the judgment output of (1) above, and the other terminal of the speaker is provided with a signal in opposite phase to the input signal of (1) above. (10) Expand the dynamic range given to the speaker.

C1 Conventional Technology An example of a BTL system is shown in FIG. 3, and an amplifier output waveform is shown in FIG.

In FIG. 3, the signal Vl input from signal source 1 follows paths S and S. The operation explanation for each is shown below.

・(i) In the case of Sl, the input signal is input to the amplifier 3 in the same phase as the signal source,
Amplifier 3 amplifies this input signal.

The amplifier 3 outputs a voltage up to Vcc -0 as the operating bias point of the power supply voltage Vcc. The output signal waveform state is shown in FIG. 4(a). The output signal is given to one terminal P of the speaker 5.

(ii) In the case of S2, the input signal is further passed through an inverter 2 with a voltage gain of 1, and a signal inverted to the opposite phase is input to an amplifier 4, which amplifies this input signal. Amplifier 4 and amplifier 3
Similarly, as the ten operating bias points of the power supply voltage vcc,
The output signal of the inverter 2 (FIG. 4(b)) is applied to the other terminal Q of the speaker 5.

As a result, Vcc is applied between both terminals P and Q of the speaker 5.
A dynamic range of , the maximum output power PfBTLl is determined by equation (1), and no higher output can be obtained.

D0 Problems to be Solved by the Invention An object of the present invention is to provide a speaker drive circuit that makes it possible to obtain a larger maximum output than the BTL method.

Means for Solving Problem E1 In order to achieve the above object, a speaker drive circuit according to the present invention includes a signal inverting means for inverting an input signal, and a first means for selecting the input signal and the inverted signal. a first switch that amplifies the output signal of the first switch to obtain a first output; amplifying means for further amplifying the first output signal amplified by the first amplifying means to obtain a second output signal; and first and second amplifying means corresponding to a single speaker. a second switch that selectively connects the first output signal and the second output signal to the first output terminal; and a second switch that selectively connects the first output signal and the second output signal to the first output terminal; a third switch selectively connected to the second output terminal; and a determination that determines whether the input signal is positive or negative and controls switching of the first switch, second switch, and third switch. The gist is to include a circuit.

BTL using F0 working power amplifier, differential amplifier, determination circuit, level shift circuit and switch, and NFB circuit.
This makes it possible to stably output four times the maximum output of the conventional method.

G. EXAMPLES The present invention will be explained in more detail below using examples with reference to the drawings, but these are merely illustrative and various modifications and improvements can be made without going beyond the scope of the present invention. Of course it is possible.

FIG. 1 is a circuit diagram of a speaker drive circuit according to the present invention, in which the reference numbers common to FIG. 3 represent the same or corresponding parts as in FIG. 3, and 6 is a level shift circuit ( shift up), 7, 13.19
is a differential amplifier, 8 is a level shift circuit (shift down), 9 is a judgment circuit, 10, 15.16 are switches,
11.12 is an amplifier, 17.18 is an ATT section, 20 is an NFB circuit, R1-R9 are resistors, C4-C6 are coupling capacitors, VCC is a power supply voltage, VB is a DC bias, Dl is a diode, 81-S4 represents the signal path.

Figure 2 shows signal waveform diagrams at various parts of the circuit shown in Figure 1, where (a) is the input signal waveform, (b) is the inverter output signal waveform, (c) is the judgment signal waveform, and (d) is the amplifier. 11, (e) shows the input/output signal waveform of amplifier 12, (f) shows the signal waveform after passing through the coupling capacitor C3, and (g) shows the speaker input waveform.

In FIG. 1, a signal input from a signal source 1 is input to a determination circuit 9. An example of the input waveform at this time is shown in FIG. 2(a).

The determination circuit 9 determines whether the input signal v1 is positive or negative, and uses this determination output to control the switch AIO, switch B15, and switch C]-6. point), a judgment signal of rr 1 n is obtained in the case of a positive polarity signal, and N O++ is obtained in the case of a negative polarity signal, and this output signal is used to switch switch A.
10, Switch B 15 and Switch 01
6 to control. In the signal of Fig. 2(a), t, →
Positive polarity between t2 and t3→t4, and t2→t3
The polarity is negative between Q and t4→t5. Furthermore, the judgment signal waveform is t, → t2 and t3 in Fig. 2(c).
→ t4 is shown as rr I II, t2 → t3 question and t4 → t5 is shown as LL O11 (second
Figure (C)). The judgment circuit used this time is a DC amplifier with a sufficiently large gain or a reference point for the AC signal.
By using a comparator at the Or+ point,
You can get that behavior.

Next, when the signal obtained from the determination circuit is LL I II, the switch A 10 is set to the a side, and the switch B15 is set to the C side.
side, switch C16 is set to e side, and the judgment signal is set to II
When O++, switch A1.0 is on b side, switch B
The switch C15 is controlled to be switched to the d side, and the switch C16 is switched to the f side.

There are four possible signal paths: Sl, 82, C3, and 84. In path S1, the input signal is sent to the switch AIO.
The signal is input to the amplifier 11 through the contact a of the switch B 16 , and to the speaker 5 through the contact C of the switch B 16 .

In path S2, the input signal is the contact of switch A10.
A, the output signal is input to the amplifier 11 through the amplifier 12, the coupling capacitor C3, and the contact e side of the switch C16, and the output signal is input to the speaker 5.
is input.

In the path S3, the input signal passes through the inverter 2, passes through the level shift circuit 5, is inputted to the amplifier 11 via the contact b of the switch AIO, and is inputted to the speaker 5 via the contact f side of the switch C16. Ru.

In the path S4, the input signal passes through the inverter 2, the level shift circuit 5, and the contact b of the switch AIO, and is input to the amplifier 11, and the output signal is sent to the amplifier 12, the coupling capacitor C3, and the switch. Speaker 5 via contact d side of B15
is input.

The inverter 2 used in the present invention is shown in FIG. 1, and its operation will be explained below.

A signal output from signal source 1 is input to differential amplifier 7 via coupling capacitor C1 and resistor R2. If the input impedance of the differential amplifier 7 is high, the bias voltage Va of the differential amplifier 7 is R1, R
2, R3 (1) is applied to the two inputs of the differential amplifier 7 without voltage loss due to resistance. When R2=R4, the differential amplifier output is shifted up to Vs, and the signal source 1
A signal with a voltage gain of 1 that is in phase opposite (inverted) to that of is output (see FIG. 2(a)).

The level shift circuit 6 shifts down the potential by VB. This downshift circuit uses a method in which the DC component is cut using a CR circuit.

Further, as the bias voltage Vs of the inverter 2 used in this circuit, an arbitrary value is used to prevent the input signal waveform from clipping at the output.

As described above, the inverter 2 can also invert a negative polarity input signal without distortion.

If the decision signal is it l u, the signals are S, and S
Follow route 2.

In the case of path S1, switch AIO is on the a side,
The signal is input to the amplifier 11 in phase with the signal source. The input waveform state of amplifier 1o at this time is t1 in Fig. 2(d).
→ Questions t2 and between t3 and t4 are shown. The amplifier 11 amplifies this human input signal and provides it to the speaker 5 via the switch B 15 . Switch B 16
is the contact point C, and assuming that the speaker terminal P is at a positive potential,
Join speaker 5.

Next, in the case of the path S2, the switch A10 is on the a side, and the input signal is input to the amplifier 11 in phase with the signal source. The input waveform state of the amplifier 11 at this time is shown in FIG. 2(d) between t1 and t2 and between t3 and t4. Amplifier 11 amplifies this input signal, and this signal is input to amplifier 12 . In the amplifier 12, the input signal is amplified in voltage by a differential amplifier 13 by taking the difference from VCC, and is amplified in power by a power amplifier 14. At this time, the gain of the differential amplifier 13 is 1, and the gain of the power amplifier 14 is 1. Human power signal is amplifier 12
is amplified by 1l by coupling capacitor c3.
- The level is lowered by VCC, and t1 in Figure 2 (f)→
Switch C16 in the state between t2 and t3 → t4
is given to speaker 5 via. The coupling capacitor C3 used in the rowing is set to V on the amplifier 12 side when the input signal is in an unattended initial state. . , the switch C16 side is set to be charged with a voltage that is O, and a capacitor whose impedance is sufficiently smaller than the impedance RL of the speaker is used. Also, the diode is +
This is to perform DC component regeneration to suppress the peak from becoming 0 or more so that the average output voltage appears in the negative direction, and a voltage with a small Vt is used. Further, instead of a diode, a circuit equivalent to a diode and having a small Vt may be used. The switch C16 has a contact point e, and the speaker terminal Q is applied to the speaker 5 as a negative potential.

Considering the above, when a positive polarity signal is input, the dynamic range given to the speaker is +2Vcc at the terminal P with the speaker terminal Q as a reference.

Next, if the determination signal is 0, the signal is sent to S3. S
Follow route 4. When on path S3, switch AIO
is on the b side, the input signal passes through the inverter 2, and the inverted signal is input to the amplifier 11 via the level shift circuit 6 and the switch AIO. The input signal waveform state of the amplifier 11 at this time is t2 in Fig. 2(d).
→ Questions t3 and between t4 and t5 are shown. The amplifier 11 is
This input signal is amplified and applied to the speaker 5 via the switch 016. The switch C16 has a contact point f, and the speaker terminal Q is applied to the speaker 5 as a positive potential.

Next, during path S4, switch A10 is on the b side, the input signal passes through inverter 2, and the inverted signal is input to amplifier 11 via level shift circuit 6 and switch AIO. Amplifier at this time 11
The input signal waveform state is changed from t2 to t3 in Fig. 2(d).
and between t4 and t5. Amplifier 11 amplifies this human input signal, and this signal is input to amplifier 12 . The input signal is amplified by the amplifier 12 and vo by the coupling capacitor C3. The level has been lowered,
In the state from t2 to t3 and from t4 to t5 in FIG. 2(f), the speaker 5 is connected via the switch B15.
given to. The switch B 15 has a contact point d, and the speaker terminal P has a negative potential and the speaker 5
given to.

Taking these into consideration, similarly when a negative signal is input, the dynamic range given to the speaker 5 is -2Vc to the terminal P with the speaker terminal Q as the reference.
c.

From the above, the maximum output power P is t 2 P, = □ L = “4PIBTL) (2)
L, and the maximum output power is four times that of the BTL method.

Furthermore, there is a possibility that discontinuities at zero crossings, which are audibly disturbing, may occur in the restored waveform, leading to deterioration of sound quality. In order to improve this and obtain stable operation on the circuit, generally N
An FB circuit (negative feedback) is used. The system of the present invention also employs an NFB circuit in order to operate the circuit stably.

In the NFB circuit 20 shown in Figure 1, 17°18 is A
TT,19 is a differential amplifier with high input impedance.

The signal input from the signal source 1 is input to the speaker 5 according to the operation of this circuit. The signal is connected to the coupling capacitors C4 and C5 and the ATT section 17 and 1.8.
The signal is inputted to the differential amplifier 19 via. Here, the ATT section 17 and 18 input the input signal voltage to the differential amplifier 1.
The resistors R6,
Set by R7 and R8yR9. To achieve negative feedback, set the phase shift of the NFB circuit so that it feeds back with an inverse phase shift to the input signal.

Furthermore, in order to increase the amount of feedback, the gain of the differential amplifier 19 is increased.

By using the above NFB circuit 20, distortion components of the speaker drive circuit can be reduced.

As explained in detail about the H0 invention, according to the present invention, by using two amplifier sections, it is possible to increase the maximum output power by four times that of the BTL method, and accordingly, it is possible to increase the maximum output power by four times that of the BTL method. The advantage is that the occupied volume can be reduced. moreover,
Another advantage is that even if the power supply voltage is low, the dynamic range can be doubled.

The circuit according to the present invention can be applied to all general amplifier circuits.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a speaker drive circuit according to the present invention, and FIG.
The figures are signal waveform diagrams at various parts of the circuit shown in Figure 1, Figure 3 is a system block diagram of the BTL system, and Figure 4 is a system block diagram of the BTL system.
The figure is a waveform diagram of the voltage applied to the speaker. 1...Signal source, 2...Inverter, 3, 4...Amplifier, 5...
・・・・・・Speaker, 6・・・・・・Level shift circuit (shift up), 7,13°19・・・・・・
...Differential amplifier, 8...Level shift circuit (shift down), 9...Judgment circuit, 10゜15.16... ...switch, 1
1.12......Amplifier, 17.18...
・・・・・・A T T section, 20・・・・・・・・・N
FB circuit, R1-R9・・・・・・Resistance, C
1~C6...Coupling capacitor,
Vcc・・・・・・Power supply voltage, VB・・・・・・
...DC bias, v+...Input signal, Dl...Diode, S1 to S4.
......Signal route. Patent applicant - Clarion Co., Ltd.

Claims (1)

[Claims] (a) Signal inversion means for inverting an input signal; (b) a first switch for selecting the input signal and the inverted signal; (c) an output signal of the first switch; a first amplifying means for amplifying and obtaining a first output; (d) a second amplifying means for further amplifying the first output signal amplified by the first amplifying means and obtaining a second output signal; (e) first and second output terminals corresponding to a single speaker; (f) a second output terminal selectively connecting the first output signal and the second output signal to the first output terminal; (g) a third switch that selectively connects the first output signal and the second output signal to the second output terminal; and (h) a third switch that determines whether the input signal is positive or negative. , a speaker drive circuit comprising: a determination circuit that controls switching of the first switch, the second switch, and the third switch.