JPH01154204A - Plant monitor method - Google Patents

Plant monitor method

Info

Publication number
JPH01154204A
JPH01154204A JP62312005A JP31200587A JPH01154204A JP H01154204 A JPH01154204 A JP H01154204A JP 62312005 A JP62312005 A JP 62312005A JP 31200587 A JP31200587 A JP 31200587A JP H01154204 A JPH01154204 A JP H01154204A
Authority
JP
Japan
Prior art keywords
error
program
syntax
detected
poc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62312005A
Other languages
Japanese (ja)
Inventor
Shoji Suzuki
Original Assignee
Hitachi Eng Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Eng Co Ltd, Hitachi Ltd filed Critical Hitachi Eng Co Ltd
Priority to JP62312005A priority Critical patent/JPH01154204A/en
Publication of JPH01154204A publication Critical patent/JPH01154204A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To omit the need to add a debug-only PCS (plant control unit) to each plant and to ensure the economical and simplifying effects for users by detecting a logical program bug before a down-loading action is applied to each PCS with a simulation function. CONSTITUTION:A POC (operator's console station) 10 is started so as to decide whether or not an arithmetic operation formula should be produced for execution of an on-line monitor action. At the same time, an arithmetic operation formula is generated by a keyboard 12. A generated program is compiled 340 and the syntax structure errors are checked 345. Then a syntax structure error if detected is corrected 330 and the program is compiled 340 again with exclusion of said error. The simulation 350 is carried out by a simulation function of the POC 10 when no syntax structure error is detected. Then the presence or absence of a logical error is checked 355 and the program compiling process is repeated until no error is detected.
JP62312005A 1987-12-11 1987-12-11 Plant monitor method Pending JPH01154204A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62312005A JPH01154204A (en) 1987-12-11 1987-12-11 Plant monitor method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62312005A JPH01154204A (en) 1987-12-11 1987-12-11 Plant monitor method

Publications (1)

Publication Number Publication Date
JPH01154204A true JPH01154204A (en) 1989-06-16

Family

ID=18024059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62312005A Pending JPH01154204A (en) 1987-12-11 1987-12-11 Plant monitor method

Country Status (1)

Country Link
JP (1) JPH01154204A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362202A (en) * 1989-07-31 1991-03-18 Japan Electron Control Syst Co Ltd Control program developing device
JP2013003795A (en) * 2011-06-15 2013-01-07 Hitachi Ltd Set value management device, set value management method and program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362202A (en) * 1989-07-31 1991-03-18 Japan Electron Control Syst Co Ltd Control program developing device
JP2013003795A (en) * 2011-06-15 2013-01-07 Hitachi Ltd Set value management device, set value management method and program

Similar Documents

Publication Publication Date Title
US6332216B1 (en) Hybrid just-in-time compiler that consumes minimal resource
ES2045108T3 (en) Computer software verification procedure.
JPH0239372A (en) Operation system for database system
SG75106A1 (en) System and method for generating trusted architecture specific compiled versions of architecture neutral programs
JPH03172936A (en) Method and device for compiling computer program with inter-procedure register allocation
JPH01154267A (en) Incorporating system for input/output device control program of operating system
JPH04256034A (en) Computer system
EP1046995A3 (en) Method and apparatus for debugging optimized code
JPH01121938A (en) Object generating system
JPH02238527A (en) Method for executing program between target computer system and different computer system
CA2082066A1 (en) Software debugging system and method especially adapted for code debugging within a multi-architecture environment
JPS55131852A (en) Fail-safe unit of control computer
JPH01307826A (en) Program generating method
JPH01280843A (en) State machine checker
CA2030227A1 (en) Assembly language programming potential error detection scheme sensing apparent inconsistency with a previous operation
JPS61239360A (en) Documentation device
JPH0237455A (en) Modular compiler
WO2001097028A3 (en) Method and apparatus for rewriting bytecodes to minimize runtime checks
JPS6054012A (en) Numerical controller
Torczon Compilation dependences in an ambitious optimizing compiler.
JPH0362202A (en) Control program developing device
JPS5750058A (en) Debugging method by instruction exchange
Kuiper An operational semantics for bonded nondeterminism equivalent to a denotational one
JPH0245838A (en) Program execution condition monitoring method
JPH02105222A (en) Device and method for automatic software generation