JPH01112743A - Ｉｃ実装用回路基板 - Google Patents

Ｉｃ実装用回路基板

Info

Publication number
JPH01112743A
JPH01112743A JP62271137A JP27113787A JPH01112743A JP H01112743 A JPH01112743 A JP H01112743A JP 62271137 A JP62271137 A JP 62271137A JP 27113787 A JP27113787 A JP 27113787A JP H01112743 A JPH01112743 A JP H01112743A
Authority
JP
Japan
Prior art keywords
electrodes
circuit board
mounting
electrode
positioning protrusions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62271137A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0474863B2 (enrdf_load_stackoverflow
Inventor
Shigenari Takami
茂成 高見
Tatsuhiko Irie
達彦 入江
Jiro Hashizume
二郎 橋爪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP62271137A priority Critical patent/JPH01112743A/ja
Priority to DE3817600A priority patent/DE3817600C2/de
Priority to FR8806997A priority patent/FR2617335B1/fr
Publication of JPH01112743A publication Critical patent/JPH01112743A/ja
Priority to US07/504,028 priority patent/US5126818A/en
Publication of JPH0474863B2 publication Critical patent/JPH0474863B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Wire Bonding (AREA)
JP62271137A 1987-05-26 1987-10-27 Ｉｃ実装用回路基板 Granted JPH01112743A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP62271137A JPH01112743A (ja) 1987-10-27 1987-10-27 Ｉｃ実装用回路基板
DE3817600A DE3817600C2 (de) 1987-05-26 1988-05-24 Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis
FR8806997A FR2617335B1 (fr) 1987-05-26 1988-05-26 Substrat de connexion en ceramique muni de protuberances de raccordement a la pastille de circuit integre
US07/504,028 US5126818A (en) 1987-05-26 1990-04-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62271137A JPH01112743A (ja) 1987-10-27 1987-10-27 Ｉｃ実装用回路基板

Publications (2)

Publication Number Publication Date
JPH01112743A true JPH01112743A (ja) 1989-05-01
JPH0474863B2 JPH0474863B2 (enrdf_load_stackoverflow) 1992-11-27

Family

ID=17495831

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62271137A Granted JPH01112743A (ja) 1987-05-26 1987-10-27 Ｉｃ実装用回路基板

Country Status (1)

Country Link
JP (1) JPH01112743A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7250329B2 (en) 2004-05-31 2007-07-31 Shinko Electric Industries Co., Ltd. Method of fabricating a built-in chip type substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7250329B2 (en) 2004-05-31 2007-07-31 Shinko Electric Industries Co., Ltd. Method of fabricating a built-in chip type substrate

Also Published As

Publication number Publication date
JPH0474863B2 (enrdf_load_stackoverflow) 1992-11-27

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