JPH01103074A - Automatic iris circuit - Google Patents

Abstract

PURPOSE:To realize stable automatic iris operation by using a level control circuit in switching the detection characteristic of a detection circuit so as to control the output level of a non-addition mixing circuit corresponding to a set value to a constant value. CONSTITUTION:The signal of a maximum level of the input signal of R, G, B three primary colors is subjected to non-addition mixing 2. The output signal from the non-addition mixing circuit 2 is detected by a detection circuit 4 whose detection characteristic is variable and an output signal from the detection circuit 4 and a setting value VT are compared 6 to obtain an iris correction data and the iris mechanism is driven and controlled 8 based on the iris correction data. Then in switching and changing 10 the detection characteristic of the detection circuit, the output level of the circuit 2 corresponding to the setting value VT is controlled 9 to be constant.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to an auto-iris circuit in a color video camera.

B8 Summary of the Invention The present invention sends the color signal with the highest level of R, G, and B input signals to a detection circuit, and compares the output from the detection circuit with a set target value. Based on the error output, the optical system of the video camera is In the auto iris circuit that controls the iris (aperture) of the system, the detection characteristics of the above-mentioned detection circuit can be changed, and when the detection characteristics are switched, the detection circuit input corresponding to the set target value is kept constant. By controlling the level, it is possible to prevent the brightness of the photographed screen from changing when an appropriate auto iris operation is selected depending on the photographing conditions and the like.

C1 Conventional technology-g, in a color video camera, in the optical system,
A so-called iris mechanism is often installed, such as a mechanical aperture mechanism using aperture blades or an aperture mechanism using an optical-to-electrical conversion element that electrically controls light transmittance. The aperture amount is adjusted manually or automatically depending on the amount of light. In this case, a so-called auto-iris circuit is required to automatically adjust the aperture amount according to the amount of incident light and the like.

In this auto-iris circuit, a circuit as shown in FIG. 8, for example, is used to obtain data on the so-called exposure amount or incident light amount. In this Figure 8, 3
Two input terminals IR and IC.

IB contains R (red) from the imaging unit of the color video camera.
, G (green), and B (blue) signals are supplied, respectively.

From these R, G, and B signals, a color signal with the highest level is extracted by a NAM (non-additive mixing) circuit 2 and sent to a peak detection circuit 41 and an average value detection circuit 42.

The respective outputs from the peak detection circuit 41 and the average value detection circuit 42 are mixed at an arbitrary level ratio by a variable resistor 43 and taken out from an output terminal 44.

Then, the detection output signal from the output terminal 44 is compared with a set voltage that is a control target, and the iris a mechanism is driven and controlled so that the error voltage becomes 0, thereby performing auto-iris operation. be.

Here, the human output characteristic of the peak detection circuit 41 appears as a solid line in FIG. 9, and the human output characteristic of the average value detection circuit 42 appears as a broken line in FIG. The horizontal axis in FIG. 9 indicates the amount of light at the pedestal level (OIR) of the video signal.
[White peak (100
The area ratio of the subject in the image capture screen corresponding to IRE) is expressed as a percentage (%), which is hereinafter referred to as APL (
average picture level). Also, the vertical axis in Figure 9 is
The output level (voltage) from each circuit 41, 42 is shown in mV units.

As is clear from this Figure 9, the APL on the horizontal axis is approximately 38
The curves intersect at the position of %, and the variable resistor 43
By changing the mixing ratio by , input/output characteristics corresponding to the curves located in the region between these curves can be obtained.

Since the control operation of the auto iris changes in accordance with such changes in characteristics, the mixing ratio is changed according to the photographing situation, the subject, etc., thereby making it possible to switch the mode of the auto iris.

Further, by setting the level setting value, which is the control target of the auto-iris, to about 540 mV at the above-mentioned intersection, it is possible to suppress changes in the APL value to a small extent even when switching modes.

D0 Problems to be Solved by the Invention However, in reality, the peak detection characteristics vary depending on the temperature characteristics of the diodes and capacitors inside the detection circuit, and the intersection with the average value detection characteristic curve changes, so the mode cannot be changed. When switching, the APL value corresponding to the above setting value will change.

In addition, in auto iris using digital signal processing, the detection characteristic curve is kept constant, so for example, the auto iris mode can be switched by switching between multiple types of detection characteristics. The APL value corresponding to the set value serving as the control target is not constant between the two modes, and there is a risk that the APL value corresponding to the set value may change significantly when the mode is switched.

As the APL value corresponding to the above setting value changes due to such mode switching, an error in the detection output with respect to the above setting value for an input signal of the same APL value will occur, causing disturbance in auto iris operation. However, there are drawbacks such as the brightness of the monitor screen changing and becoming unsightly.

The present invention has been made in view of the above circumstances, and provides an auto iris that suppresses fluctuations in the APL value corresponding to the above setting value even when switching the auto iris mode, and provides stable auto iris operation. The purpose is to provide circuits.

Means for Solving the E1 Problem In order to solve the above-mentioned problem, the auto iris circuit according to the present invention uses a non-additive mixing method that outputs the maximum level signal of the input signals of the three primary colors R, G, and B. a detection circuit that detects the output signal from the non-adding mixing circuit and whose detection characteristics can be changed; and a circuit that obtains iris correction data by comparing the output signal from the detection circuit with a set value;
When the circuit that drives and controls the iris mechanism based on this iris correction data and the detection characteristics of the detection circuit are changed, the output level of the non-addition mixing circuit corresponding to the setting value is controlled to be constant. It is characterized by comprising a level control circuit.

When the detection characteristic of the detection circuit is switched in response to the mode switching operation of the F8 action auto iris, etc., the level control circuit controls the output level of the non-additive mixing circuit corresponding to the set value to be constant. , stable auto iris operation can be achieved.

G. Embodiment FIG. 1 shows a schematic configuration of an auto-iris circuit as an embodiment of the present invention.

In FIG. 1, digital input signals of three primary colors, R (red), G (green), and B (blue) from, for example, a digital color video camera are supplied to each input terminal IR and IC1IB, respectively. These RSG and B digital input signals are supplied to a NAM (non-adding mixer) circuit 2, the signal with the highest level is taken out, and the vertical weighting is sent to a circuit 3. This vertical weighting circuit 3 takes into consideration that generally a bright sky is placed at the top of the screen, so that the video signal at the top of the screen is not subject to iris control or weighted. This is to keep it low. The output signal from the vertical weighting circuit 3 is subjected to detection processing in a detection circuit 4, and then sent to a level control circuit 9, which is a main part of the present invention, to control the signal level. The detection characteristics of the detection circuit 4 and the level control amount of the level control circuit 9 are changed according to a mode switching signal supplied to a terminal 10. The output signal from the level control circuit 9 is sent to the field averaging circuit 5, where l fields' worth of summed and averaged data is obtained, and sent to one input terminal (for example, a non-inverting input terminal) of the comparator circuit 6.

The other input terminal of this comparator 4 (for example, inverting input terminal)
7 is supplied with reference voltage data Va corresponding to a preset target value for iris control, and error data of the above-mentioned average data with respect to this set data (control target value) VT is supplied to iris control as iris correction data. The signal is sent to the drive control circuit 8. The output from the iris drive control circuit 8 controls the iris mechanism (mechanical diaphragm mechanism using aperture blades, etc., or electro-optic conversion element whose light transmittance is electrically controlled) provided in the optical system of the video camera. The aperture mechanism used) is driven, and the field average data of the detected data is controlled to become the set value (control target data Vt). Note that the mode switching signal to the terminal 10 is obtained from the system controller of the video camera or the so-called CPU, and in the embodiment of the present invention, it is mainly assumed that the switching control signal is for the auto-iris operation mode.

Here, the detection circuit 4 is for obtaining a level detection output by controlling the charging and discharging of the output obtained from the NAM circuit 2 via the vertical weighting circuit 3,
The detection characteristics at this time can be switched and set according to the mode switching operation of the auto iris. The mode switching control signal in this case is supplied to the detection circuit 4 via the above-mentioned terminal 10.

That is, the detection circuit 4 has a configuration as shown in FIG. 2, for example, and a signal obtained from the NAM circuit 2 via the vertical weighting circuit 3 is input to the input terminal 21. . This detection circuit 4 includes a comparator 11 that compares the output signal of the circuit 4 with an input signal, and a comparator 11 that compares the output signal of the circuit 4 with the input signal.
1, a coefficient multiplier 13 that multiplies the output from this switch 12 by a first coefficient α; It comprises an adder 14 that adds the output and the output of the circuit 4, and a coefficient multiplier 15 that multiplies the output from the adder 14 by a second coefficient β. The coefficient α of the coefficient multiplier 13 can be set and changed according to a control signal from the control terminal 16 corresponding to the terminal IO, and the coefficient β of the coefficient multiplier 15 can be changed according to the control signal from the control terminal 16 corresponding to the terminal 10. The settings can be changed according to a control signal from the control terminal 17. The output from the coefficient multiplier 15 is taken out from the output terminal 19 as the output of the detection circuit 4 and sent to the level control circuit 9.

In the detection circuit 4 having such a configuration, when the input of the circuit 4 is larger than the output, the input signal is multiplied by the first coefficient α and added to the output signal, and the added output is given the second coefficient β. The multiplied result is output and sent to the adder 14. Here, the first coefficient α is usually a value sufficiently smaller than 1, and corresponds to, for example, a charging time constant in an analog charging/discharging circuit. That is, when the input of the circuit 4 is greater than the output, the adder 14 accumulates a signal α times the input for each clock, so the adder 14 outputs an output whose level increases at a slope according to α. can get. 2nd above
The coefficient β is set to a value smaller than 1 but extremely close to l (for example, 0.99), and corresponds to, for example, the discharge time constant in an analog charge/discharge circuit. That is, the output of the circuit 4 becomes larger than the input, and the switch 1
2 is turned off, and the output from the coefficient multiplier 13 is sent to the adder 14.
adder 1 for each clock.
Since the output from 4 is multiplied by β and sent back to the adder 14, the level of the output decreases in a substantially geometric progression at a rate corresponding to β.

Here, each of these coefficients α and β is the control terminal 16.
．． Since the settings can be controlled according to the control signal from 17, the charging time constant and the discharging time constant can be equivalently set variably, and as a result, the detection characteristics can be switched.

Such a detection circuit 4 may be realized by software using a DSP (digital signal processing device), but since the clock frequency of a digital video signal is generally extremely high, ranging from several MHz to several tens of MHz, this is not possible at present. In this case, rather than using a normal multiplier configuration as the coefficient multiplier 13.15, it is better to use a so-called bit shifter to multiply coefficients in units of powers of 2. can be greatly simplified. FIG. 3 shows an example of a specific hardware configuration using this bit shifter as a coefficient multiplier.

In this FIG. 3, the input signal from the input terminal 21 of FIG. selector) 12. The switch (selector) 12 is the comparator 11
Switching is controlled according to the output from the
The output from switch 12 is sent to adder 24.

The i component consisting of adder 24, counter 25, latch circuit 26, selector 27, 28, adder 30, selector 31 and latch circuit 32 is obtained from coefficient multiplier 13, adder 14 and coefficient multiplier 15 in FIG. It corresponds to the part consisting of
As mentioned above, by replacing the coefficient multiplication with 2'' multiplication by bit shifting, the configuration is greatly simplified and the calculation speed is increased.In other words, the selector 27 receives the 6 outputs from the latch circuit 26. 2°to, 2-
++.

2-12 is selected and sent to the next selector 28, and this selector 2 selects any of 2-1.24.2-2.2-4 as the input level to the adder 30. You can select by switching. Here, selector 2
The output from terminal 8 is inverted and supplied to adder 30, and at the same time, 01'' from terminal 29 is supplied to adder 30, resulting in a so-called two's complement display format. , a small portion of the output from the latch circuit 26 is subtracted, and as a result, a value smaller than 1 and close to 1, such as 0.99, is multiplied. Selector 27.2 of
The multiplication coefficient by bit shift in 8 is r (I”~
2-”), the coefficient β of the coefficient multiplier 15 is
It will be expressed as β-1-γ. Next, selector 3
1 is a bit shift similar to selector 27)! switching, i.e. 2-Ill of the output from adder 30, 2-11
．． 2-1! The selected one is sent to the latch circuit 32 at the next stage. These selectors 27 and 31 are interlocked and correspond to the coefficient multiplier 13 for the multiplication coefficient α. Next, the output from the latch circuit 32 is sent to the other input terminal of the comparator 11 via the latch circuit 23, and is compared in magnitude with the input to the terminal 21, as described in the first It is the same as the explanation of the figure.

A specific example of the level control operation by the level control circuit 9 for specific detection characteristics of the detection circuit having the configuration shown in FIG. 3 will be explained with reference to FIGS. 4 to 7. The horizontal axis in these figures represents the area ratio in the image capture screen of the subject corresponding to the white beak (100 IRE) with respect to the background whose light intensity corresponds to the pedestal level (OIRE) of the video signal. It is a thing,
This is hereinafter referred to as APL (average picture level).

Further, the vertical axis in FIGS. 4 to 7 indicates the output level (II?E value) from each circuit 41, 42.

First, FIGS. 4 and 5 show an example in which a circuit (such as a variable gain amplifier) whose amplification degree (gain) changes is used as the level control circuit 9, and each The solid line in the figure shows the detection characteristic before level control, and the broken line shows the detection characteristic after level control. Here, FIG. 4 shows the case where the coefficient α selected by switching the selector 27.31 is set to 2-11, and the coefficient T selected by switching the selector 27.28 is set to 2.
The coefficient β is 1-2'').

In addition, in FIG. 5, the coefficient α is set to 2-1, and the coefficient γ is
The detection characteristics are shown when is set to 2-''(θ=1-2-'').

In these figures 4 and 5, the vertical axis output (I
RE value) is set to 90 as the control target, and the AP on the horizontal axis
When the L value is 50%, the output is 90rl? Amplification control is performed so that E is obtained. Specifically, when the mode shown in FIG. 4 is selected, the amplification degree in the level control circuit 9 is set to 90/65 in order to gain up the output value 65 with an APL value of 50% to 90. When the switching is controlled and the switching shown in FIG. The detection characteristics are as shown by the broken lines in each figure. In this way, by switching the level control amount (amplification degree in this example) in the level control circuit 9 according to the selected mode,
The APL value corresponding to the control target setting value (90IRE) is kept constant at 50%.

Incidentally, as a level control operation in the level control circuit 9, in addition to changing the amplification degree, a so-called level shift may be performed, for example, by changing only a predetermined level in a DC manner, and the level control by this level shift The 61st example is a concrete example! I and FIG. here,
Figure 6 shows the modes (α, , 2-11, β-3) in Figure 4 above.
2-1! ) is selected, and FIG. 7 shows a case where the mode shown in FIG. 5 (α=2-1!, β=1-2-1h) is selected. Then, in the level control circuit 9, when the mode shown in FIG. 6 is selected, the DC level is set to 11? E value is 25 (=90=65
), and in the case of Fig. 7, by raising the DC level by 6 (=90-84) in terms of IRE value, the APL value corresponding to the control target set value (901RE) becomes 50.
It is kept constant as a percentage.

In addition, modes other than the above, that is, selectors 27 and 28
．． 31 is switched to a combination other than the above, the level control circuit 9 controls the amplification degree, level shift I, etc. so that the output value at the APL value of 50% becomes 90. i
Of course, it is only necessary to control the switching of ll.

In this case, the level control amount in the level control circuit 9 is:
After writing it in a ROM (read only memory) etc. in advance, the CPU etc. automatically reads the corresponding level control amount data from the ROM and sends it to the level control circuit 9 in response to the mode switching operation. Processing using software using ROM can be considered. In addition, hardware-wise,
A method of determining the level control amount from the difference in the detected output value from a predetermined standard mode is also possible.

In this way, even if the mode is switched, the APL value (for example, the output level of the NAM circuit 2) corresponding to the control target set value
is kept constant, so there is no adverse effect on the auto iris control operation during mode switching. In addition, since it can be configured with a digital circuit, it can be integrated into an integrated circuit (IC) to achieve a smaller size and lower power, making it compatible with future digital video cameras.

Note that the present invention is not limited to the above-mentioned embodiments; for example, the level control circuit 9 in FIG. 1 may be provided at any position between the NAM circuit 2 and the detection circuit 4; , a coefficient multiplier may be placed on the output side of the feedback loop of the adder 14 in FIG. 2, and each selector 27, 28 in FIG.
．． The amount of bit shift of 31, the number of selected terminals, etc. can be set arbitrarily.

In addition, various modifications can be made without departing from the gist of the present invention.

H1 Effects of the Invention According to the auto iris circuit according to the present invention, when the detection characteristic of the detection circuit is switched, the level control circuit controls the output level of the non-addition mixing circuit corresponding to the set value to be constant. Therefore, stable auto iris operation can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing a schematic configuration of an auto iris circuit according to an embodiment of the present invention, FIG. 2 is a block circuit diagram showing an example of the detection circuit in FIG. 1, and FIG. 3 is a block circuit diagram showing an example of the detection circuit in FIG. A block circuit diagram showing a more specific configuration, FIGS. 4 to 7 are characteristic diagrams showing examples of level control operations for switching and changing detection characteristics, and FIG. 8 shows the main part of a conventional example of an auto iris circuit. The block circuit diagram, FIG. 9, is a characteristic diagram showing the detection characteristics in the circuit of FIG. 8. 1...R, G, B primary color signal input terminal 2...NAM (non-additive mixing) circuit 4...Detection circuit 5...Field averaging circuit 6...Comparator 8...Iris drive control Circuit 9...Level control circuit 10...Mode switching signal input terminal

Claims (1)

[Claims] A non-adding mixing circuit that outputs the maximum level input signal of the three primary colors R, G, and B, and detecting the output signal from the non-adding mixing circuit, and whose detection characteristics can be changed. A detection circuit, a circuit that obtains iris correction data by comparing an output signal from this detection circuit with a set value, a circuit that drives and controls an iris mechanism based on this iris correction data, and a detection characteristic of the above-mentioned detection circuit. and a level control circuit that controls the output level of the non-addition mixing circuit corresponding to the set value to be constant when switching is changed.