JP7713944B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP7713944B2
JP7713944B2 JP2022541321A JP2022541321A JP7713944B2 JP 7713944 B2 JP7713944 B2 JP 7713944B2 JP 2022541321 A JP2022541321 A JP 2022541321A JP 2022541321 A JP2022541321 A JP 2022541321A JP 7713944 B2 JP7713944 B2 JP 7713944B2
Authority
JP
Japan
Prior art keywords
transistor
current
wiring
circuit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2022541321A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2022029542A1 (https=
Inventor
卓郎 金村
義元 黒川
宏充 郷戸
一樹 津田
智 大下
英史 力丸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of JPWO2022029542A1 publication Critical patent/JPWO2022029542A1/ja
Priority to JP2025118820A priority Critical patent/JP7799127B2/ja
Application granted granted Critical
Publication of JP7713944B2 publication Critical patent/JP7713944B2/ja
Priority to JP2025282141A priority patent/JP2026062833A/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/14—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for addition or subtraction 
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/48—Analogue computers for specific processes, systems or devices, e.g. simulators
    • G06G7/60—Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Software Systems (AREA)
  • Biophysics (AREA)
  • Neurology (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Neurosurgery (AREA)
  • Physiology (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
  • Manipulation Of Pulses (AREA)
JP2022541321A 2020-08-03 2021-07-26 半導体装置 Active JP7713944B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2025118820A JP7799127B2 (ja) 2020-08-03 2025-07-15 有機ｅｌ表示装置
JP2025282141A JP2026062833A (ja) 2020-08-03 2025-12-25 半導体装置

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
JP2020131717 2020-08-03
JP2020131717 2020-08-03
JP2020219739 2020-12-29
JP2020219739 2020-12-29
JP2021017033 2021-02-05
JP2021017033 2021-02-05
JP2021095086 2021-06-07
JP2021095086 2021-06-07
PCT/IB2021/056695 WO2022029542A1 (ja) 2020-08-03 2021-07-26 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025118820A Division JP7799127B2 (ja) 2020-08-03 2025-07-15 有機ｅｌ表示装置

Publications (2)

Publication Number Publication Date
JPWO2022029542A1 JPWO2022029542A1 (https=) 2022-02-10
JP7713944B2 true JP7713944B2 (ja) 2025-07-28

Family

ID=80117222

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2022541321A Active JP7713944B2 (ja) 2020-08-03 2021-07-26 半導体装置
JP2025118820A Active JP7799127B2 (ja) 2020-08-03 2025-07-15 有機ｅｌ表示装置
JP2025282141A Pending JP2026062833A (ja) 2020-08-03 2025-12-25 半導体装置

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2025118820A Active JP7799127B2 (ja) 2020-08-03 2025-07-15 有機ｅｌ表示装置
JP2025282141A Pending JP2026062833A (ja) 2020-08-03 2025-12-25 半導体装置

Country Status (5)

Country Link
US (1) US12592714B2 (https=)
JP (3) JP7713944B2 (https=)
KR (1) KR20230048063A (https=)
CN (1) CN115769497A (https=)
WO (1) WO2022029542A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025142026A (ja) * 2020-08-03 2025-09-29 株式会社半導体エネルギー研究所 半導体装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7717080B2 (ja) * 2020-09-18 2025-08-01 株式会社半導体エネルギー研究所 半導体装置、および電子機器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190190531A1 (en) 2017-12-19 2019-06-20 Imec Vzw Analog-to-digital converters
JP2019186842A (ja) 2018-04-16 2019-10-24 ザインエレクトロニクス株式会社 Ａｄ変換器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1108198B (it) 1978-09-13 1985-12-02 Cselt Centro Studi Lab Telecom Perfezionamenti ai codificatori analogici digitali
DE69331170T2 (de) * 1992-03-31 2002-06-20 Texas Instruments Inc., Dallas Mehrmoden-Analog/Digitalwandler und Verfahren
US20020027688A1 (en) * 2000-09-05 2002-03-07 Jim Stephenson Fiber optic transceiver employing digital dual loop compensation
TWI655442B (zh) 2014-05-02 2019-04-01 日商半導體能源研究所股份有限公司 輸入／輸出裝置
JP6633330B2 (ja) 2014-09-26 2020-01-22 株式会社半導体エネルギー研究所 半導体装置
KR102609508B1 (ko) * 2016-11-11 2023-12-04 엘지디스플레이 주식회사 외부 보상용 드라이버 집적회로와 그를 포함한 표시장치
US10148280B2 (en) * 2016-12-23 2018-12-04 Avnera Corporation Hybrid flash architecture of successive approximation register analog to digital converter
US10483994B2 (en) * 2017-12-29 2019-11-19 Texas Instruments Incorporated Kickback compensation for a capacitively driven comparator
US11128307B2 (en) * 2018-10-30 2021-09-21 Omnivision Technologies, Inc. Circuit and method for control of counter start time
US10630304B1 (en) * 2019-04-01 2020-04-21 Nxp B.V. Sub-ranging analog-to-digital converter
US10886937B1 (en) * 2019-10-16 2021-01-05 Analog Devices International Unlimited Company Method to embed ELD DAC in SAR quantizer
US11018682B1 (en) * 2020-05-28 2021-05-25 Nxp B.V. Time-interleaved sub-ranging analog-to-digital converter
CN115769497A (zh) 2020-08-03 2023-03-07 株式会社半导体能源研究所 半导体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190190531A1 (en) 2017-12-19 2019-06-20 Imec Vzw Analog-to-digital converters
JP2019186842A (ja) 2018-04-16 2019-10-24 ザインエレクトロニクス株式会社 Ａｄ変換器

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025142026A (ja) * 2020-08-03 2025-09-29 株式会社半導体エネルギー研究所 半導体装置
JP7799127B2 (ja) 2020-08-03 2026-01-14 株式会社半導体エネルギー研究所 有機ｅｌ表示装置
US12592714B2 (en) 2020-08-03 2026-03-31 Semiconductor Energy Laboratory Co., Ltd. Apparatus comprising analog to digital converter semiconductor device

Also Published As

Publication number Publication date
JP7799127B2 (ja) 2026-01-14
WO2022029542A1 (ja) 2022-02-10
JP2026062833A (ja) 2026-04-10
JPWO2022029542A1 (https=) 2022-02-10
JP2025142026A (ja) 2025-09-29
US20230353163A1 (en) 2023-11-02
KR20230048063A (ko) 2023-04-10
US12592714B2 (en) 2026-03-31
CN115769497A (zh) 2023-03-07

Similar Documents

Publication Publication Date Title
JP7799127B2 (ja) 有機ｅｌ表示装置
JP7514240B2 (ja) 記憶装置、半導体装置、及び電子機器
JP7080231B2 (ja) 半導体装置
US11594176B2 (en) Semiconductor device, display apparatus, electronic device, and operation method of semiconductor device
TW202022681A (zh) 半導體裝置及電子裝置
JP7661571B2 (ja) 半導体装置および電子機器
TW201901971A (zh) 半導體裝置及半導體裝置的製造方法
CN113383342A (zh) 半导体装置及电子设备
CN115769221A (zh) 半导体装置及电子设备
JP2024058633A (ja) 半導体装置
KR20230043924A (ko) 반도체 장치의 구동 방법
JP2026032141A (ja) 半導体装置
JP2025100591A (ja) 半導体装置
JP7724221B2 (ja) 半導体装置
CN120283276A (zh) 半导体装置、显示装置及电子设备
CN120019724A (zh) 半导体装置、存储装置及电子设备
KR20240165976A (ko) 반도체 장치, 기억 장치, 및 전자 기기
TW202401740A (zh) 半導體裝置、記憶體裝置以及電子裝置
CN118696617A (zh) 半导体装置、存储装置及电子设备

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20240704

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20250318

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250421

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20250708

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20250715

R150 Certificate of patent or registration of utility model

Ref document number: 7713944

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150