JP7695247B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP7695247B2
JP7695247B2 JP2022535981A JP2022535981A JP7695247B2 JP 7695247 B2 JP7695247 B2 JP 7695247B2 JP 2022535981 A JP2022535981 A JP 2022535981A JP 2022535981 A JP2022535981 A JP 2022535981A JP 7695247 B2 JP7695247 B2 JP 7695247B2
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Japan
Prior art keywords
semiconductor
conductor
insulator
transistor
memory
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JP2022535981A
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English (en)
Japanese (ja)
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JPWO2022013679A1 (https=
JPWO2022013679A5 (https=
Inventor
寛司 國武
優希 伊藤
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of JPWO2022013679A1 publication Critical patent/JPWO2022013679A1/ja
Publication of JPWO2022013679A5 publication Critical patent/JPWO2022013679A5/ja
Priority to JP2025094567A priority Critical patent/JP2025124866A/ja
Application granted granted Critical
Publication of JP7695247B2 publication Critical patent/JP7695247B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/675—Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

Landscapes

  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2022535981A 2020-07-17 2021-07-06 半導体装置 Active JP7695247B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025094567A JP2025124866A (ja) 2020-07-17 2025-06-06 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020122595 2020-07-17
JP2020122595 2020-07-17
PCT/IB2021/056021 WO2022013679A1 (ja) 2020-07-17 2021-07-06 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025094567A Division JP2025124866A (ja) 2020-07-17 2025-06-06 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2022013679A1 JPWO2022013679A1 (https=) 2022-01-20
JPWO2022013679A5 JPWO2022013679A5 (https=) 2024-07-08
JP7695247B2 true JP7695247B2 (ja) 2025-06-18

Family

ID=79555098

Family Applications (2)

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JP2022535981A Active JP7695247B2 (ja) 2020-07-17 2021-07-06 半導体装置
JP2025094567A Pending JP2025124866A (ja) 2020-07-17 2025-06-06 半導体装置

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JP2025094567A Pending JP2025124866A (ja) 2020-07-17 2025-06-06 半導体装置

Country Status (5)

Country Link
US (1) US20230301099A1 (https=)
JP (2) JP7695247B2 (https=)
KR (1) KR20230038710A (https=)
CN (1) CN115777239A (https=)
WO (1) WO2022013679A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240003740A (ko) * 2022-07-01 2024-01-09 주식회사 에이치피에스피 3차원 낸드 플래시 메모리 어레이의 제조 방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016063027A (ja) 2014-09-17 2016-04-25 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
JP2018207038A (ja) 2017-06-08 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、記憶装置、及び電子機器
JP2019024087A (ja) 2017-07-21 2019-02-14 株式会社半導体エネルギー研究所 半導体装置、半導体ウェハ、記憶装置、及び電子機器
JP2019165178A (ja) 2018-03-20 2019-09-26 東芝メモリ株式会社 半導体記憶装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133594A (ja) 1998-08-18 2000-05-12 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
KR101746814B1 (ko) 2009-12-09 2017-06-14 한국전자통신연구원 복사전력 측정 장치
JP2019054220A (ja) 2017-09-19 2019-04-04 東芝メモリ株式会社 半導体記憶装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016063027A (ja) 2014-09-17 2016-04-25 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
JP2018207038A (ja) 2017-06-08 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、記憶装置、及び電子機器
JP2019024087A (ja) 2017-07-21 2019-02-14 株式会社半導体エネルギー研究所 半導体装置、半導体ウェハ、記憶装置、及び電子機器
JP2019165178A (ja) 2018-03-20 2019-09-26 東芝メモリ株式会社 半導体記憶装置

Also Published As

Publication number Publication date
JPWO2022013679A1 (https=) 2022-01-20
JP2025124866A (ja) 2025-08-26
KR20230038710A (ko) 2023-03-21
WO2022013679A1 (ja) 2022-01-20
US20230301099A1 (en) 2023-09-21
CN115777239A (zh) 2023-03-10

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