JP7516361B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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JP7516361B2
JP7516361B2 JP2021519021A JP2021519021A JP7516361B2 JP 7516361 B2 JP7516361 B2 JP 7516361B2 JP 2021519021 A JP2021519021 A JP 2021519021A JP 2021519021 A JP2021519021 A JP 2021519021A JP 7516361 B2 JP7516361 B2 JP 7516361B2
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oxide
insulator
conductor
film
oxygen
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Japanese (ja)
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JPWO2020229914A5 (ja
JPWO2020229914A1 (https=
Inventor
舜平 山崎
涼太 方堂
哲弥 掛端
慎也 笹川
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/70—Chemical treatments

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  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP2021519021A 2019-05-10 2020-04-27 半導体装置の作製方法 Active JP7516361B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019089646 2019-05-10
JP2019089646 2019-05-10
PCT/IB2020/053912 WO2020229914A1 (ja) 2019-05-10 2020-04-27 半導体装置、および半導体装置の作製方法

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JPWO2020229914A1 JPWO2020229914A1 (https=) 2020-11-19
JPWO2020229914A5 JPWO2020229914A5 (ja) 2023-05-09
JP7516361B2 true JP7516361B2 (ja) 2024-07-16

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US (1) US12218247B2 (https=)
JP (1) JP7516361B2 (https=)
WO (1) WO2020229914A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2021009619A1 (https=) * 2019-07-17 2021-01-21

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12396214B2 (en) * 2019-03-15 2025-08-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US20230282618A1 (en) * 2020-07-16 2023-09-07 Ultramemory Inc. Semiconductor device and method for manufacturing same
TW202349459A (zh) * 2022-04-15 2023-12-16 日商半導體能源研究所股份有限公司 疊層體的製造方法及半導體裝置的製造方法
US20240413247A1 (en) * 2023-06-06 2024-12-12 Taiwan Semiconductor Manufacturing Company Limited Compositionally-modulated capping layer for a transistor and methods for forming the same

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014225656A (ja) 2013-04-24 2014-12-04 株式会社半導体エネルギー研究所 半導体装置
JP2016167595A (ja) 2015-03-06 2016-09-15 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
WO2016166635A1 (ja) 2015-04-13 2016-10-20 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP2016201541A (ja) 2015-04-13 2016-12-01 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP2017147445A (ja) 2016-02-17 2017-08-24 株式会社半導体エネルギー研究所 半導体装置、電子機器
WO2018150295A1 (ja) 2017-02-15 2018-08-23 株式会社半導体エネルギー研究所 半導体装置
WO2018178793A1 (ja) 2017-03-29 2018-10-04 株式会社半導体エネルギー研究所 半導体装置、半導体装置の作製方法

Family Cites Families (6)

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Publication number Priority date Publication date Assignee Title
KR101473684B1 (ko) 2009-12-25 2014-12-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101809105B1 (ko) 2010-08-06 2017-12-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 집적 회로
KR102279459B1 (ko) 2012-10-24 2021-07-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
KR20160132405A (ko) 2014-03-12 2016-11-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP2016154225A (ja) * 2015-02-12 2016-08-25 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US11189736B2 (en) * 2015-07-24 2021-11-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014225656A (ja) 2013-04-24 2014-12-04 株式会社半導体エネルギー研究所 半導体装置
JP2016167595A (ja) 2015-03-06 2016-09-15 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
WO2016166635A1 (ja) 2015-04-13 2016-10-20 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP2016201541A (ja) 2015-04-13 2016-12-01 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP2017147445A (ja) 2016-02-17 2017-08-24 株式会社半導体エネルギー研究所 半導体装置、電子機器
WO2018150295A1 (ja) 2017-02-15 2018-08-23 株式会社半導体エネルギー研究所 半導体装置
WO2018178793A1 (ja) 2017-03-29 2018-10-04 株式会社半導体エネルギー研究所 半導体装置、半導体装置の作製方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2021009619A1 (https=) * 2019-07-17 2021-01-21
JP7564104B2 (ja) 2019-07-17 2024-10-08 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

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JPWO2020229914A1 (https=) 2020-11-19
US20220216341A1 (en) 2022-07-07
US12218247B2 (en) 2025-02-04

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