JP7353211B2 - Semiconductor device and its manufacturing method - Google Patents

Description

The present invention relates to a semiconductor device having a semiconductor capacitor and a method for manufacturing the same.

A structure in which a capacitor structure is formed inside a groove formed on the surface of a semiconductor substrate is used in a semiconductor capacitor. For example, a method has been disclosed in which a thin film capacitor is formed by laminating a plurality of conductive films on the side surfaces of a groove while sandwiching a dielectric film therebetween (see Patent Document 1).

Special Publication No. 2010-530128

However, when a thin film capacitor is formed inside a groove of a semiconductor substrate, the dielectric film is bent at the corner of the groove where the bottom and side surfaces of the groove are connected. Therefore, when a predetermined voltage is applied to the thin film capacitor, an electric field is concentrated at the bent portion of the dielectric film at the corner of the groove. This electric field concentration lowers the withstand voltage of the thin film capacitor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device in which a thin film capacitor is formed inside a groove of a semiconductor substrate and a decrease in breakdown voltage is suppressed, and a method for manufacturing the semiconductor device.

A semiconductor device according to one embodiment of the present invention includes a conductive film and a side dielectric film that are arranged alternately on the side surfaces of a groove formed on a main surface of a semiconductor substrate, and a conductive film and a side dielectric film that are arranged on a bottom surface of the groove and formed on a lower end of the side dielectric film. The gist is to provide a bottom dielectric film which is connected to the bottom dielectric film and has a thickness thicker than each of the side dielectric films.

A method for manufacturing a semiconductor device according to another aspect of the present invention includes the steps of: alternately stacking a conductive film and a side dielectric film on the side surfaces of a groove in a semiconductor substrate; The gist includes the step of forming a bottom dielectric film thicker than the bottom dielectric film on the bottom surface of the trench. Each time a conductive film is formed, a mask material is formed using a film forming method in which the mask material is not formed on the bottom surface of the trench, but is formed outside the trench and above the main surface of the semiconductor substrate. Using the mask material as a protective film, the portion of the conductive film deposited on the bottom of the groove is selectively removed by anisotropic etching in which etching progresses in the depth direction of the groove.

According to the present invention, it is possible to provide a semiconductor device and a method for manufacturing a semiconductor device in which a thin film capacitor is formed inside a groove of a semiconductor substrate and a decrease in breakdown voltage is suppressed.

1 is a schematic cross-sectional view showing the configuration of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view (part 1) for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view (Part 2) for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (part 3). FIG. 4 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (Part 4). FIG. 5 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (part 5). FIG. 6 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (part 6). FIG. 7 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (part 7). FIG. 8 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (Part 8). FIG. 9 is a schematic cross-sectional view for explaining the method for manufacturing a semiconductor device according to the first embodiment of the present invention (Part 9). FIG. 2 is a schematic cross-sectional view showing the configuration of a semiconductor device according to a second embodiment of the present invention. FIG. 3 is a schematic cross-sectional view showing the configuration of a semiconductor device according to a third embodiment of the present invention.

Embodiments will be described below with reference to the drawings. In the description of the drawings, the same parts are denoted by the same reference numerals and the description thereof will be omitted. However, the drawings are schematic, and the relationship between the thickness and planar dimensions, the ratio of the thickness of each layer, etc. may differ from the actual drawings. Furthermore, the drawings include portions that differ in dimensional relationships and ratios.

(First embodiment)
As shown in FIG. 1, the semiconductor device according to the first embodiment of the present invention includes a conductive semiconductor substrate 10 in which a groove is formed in the main surface 11, and a conductive semiconductor substrate 10 that is mutually connected along the surface normal direction of the side surface of the groove. The first conductive film 21 to the third conductive film 23 are stacked apart from each other. FIG. 1 is a cross-sectional view of a groove formed in the main surface of a semiconductor substrate 10 along the width direction.

As shown in FIG. 1, a first side dielectric film 31 is disposed between the semiconductor substrate 10 and the first conductive film 21. Further, a second side dielectric film 32 is disposed between the first conductive film 21 and the second conductive film 22, and a third side dielectric film 33 is disposed between the second conductive film 22 and the third conductive film 23. There is.

In the following, the conductive films disposed inside the grooves, such as the first conductive film 21 to the third conductive film 23, are also collectively referred to as the "conductive film 20." In addition, the dielectric films disposed between the semiconductor substrate 10 and the conductive film 20 or between the conductive films 20, such as the first side dielectric film 31 to the third side dielectric film 33, are collectively referred to as the "side surface dielectric film 30". Also called. That is, the conductive films 20 and the side dielectric films 30 are alternately arranged along the normal direction of the side surfaces of the trench.

Further, a bottom dielectric film 40 connected to the lower end of the side dielectric film 30 is disposed on the bottom of the groove formed in the semiconductor substrate 10 . The film thickness along the depth direction of the bottom dielectric film 40 is thicker than each film thickness along the surface normal direction of the side surface of the trench of the side dielectric film 30 .

The first electrode 51 and the second electrode 52 are arranged on the semiconductor substrate 10 outside the groove. Each of the conductive films 20 is electrically connected to either the first electrode 51 or the second electrode 52. Specifically, among a pair of conductive films 20 facing each other with the side dielectric film 30 in between, one conductive film 20 is electrically connected to the first electrode 51, and the other conductive film 20 is connected to the second electrode. It is electrically connected to 52.

In this way, inside the groove of the semiconductor substrate 10, a thin film capacitor is constructed in which the conductive films 20 and the side dielectric films 30 are alternately arranged along the normal direction of the side surfaces of the groove. In the semiconductor device shown in FIG. 1, the semiconductor substrate 10 and the second conductive film 22 are electrically connected to the first electrode 51. Further, the first conductive film 21 and the third conductive film 23 are electrically connected to the second electrode 52.

Note that the first conductive film 21 is electrically connected to the second electrode 52 via the first upper conductive layer 201 which is electrically insulated from the semiconductor substrate 10 by the first interlayer insulating film 301. The second conductive film 22 is electrically connected to the first electrode 51 via the second upper conductive layer 202 which is electrically insulated from the first upper conductive layer 201 by the second interlayer insulating film 302 . The third conductive film 23 is electrically connected to the second electrode 52 via the third upper conductive layer 203 which is electrically insulated from the second upper conductive layer 202 by the third interlayer insulating film 303 .

The first electrode 51 and the second electrode 52 are arranged on the upper surface of the fourth interlayer insulating film 304 arranged on the upper surface of the third upper conductive layer 203 . In the cross-sectional view shown in FIG. 1, the first electrode 51 and the second electrode 52 are shown separated into a plurality of regions, but the first electrodes 51 are electrically connected to each other outside the semiconductor substrate 10. The second electrodes 52 are electrically connected to each other.

As shown in FIG. 1, the second electrode 52 electrically connected to the first conductive film 21 is connected to the first top conductive layer 201 by a contact via penetrating the second to fourth interlayer insulating films 302 to 304. electrically connect with. The first electrode 51, which is electrically connected to the second conductive film 22, is electrically connected to the second upper surface conductive layer 202 through a contact via penetrating the third to fourth interlayer insulating films 303 to 304. The second electrode 52 electrically connected to the third conductive film 23 is electrically connected to the third upper conductive layer 203 through a contact via penetrating the fourth interlayer insulating film 304 . The semiconductor substrate 10 is electrically connected to the first electrode 51 via contact vias that penetrate the first to fourth interlayer insulating films 301 to 304.

The operation of the thin film capacitor formed in the semiconductor device shown in FIG. 1 will be described below. By applying a positive voltage to the first electrode 51 with respect to the second electrode 52, positive charges are charged to the semiconductor substrate 10 and the second conductive film 22, and the first conductive film 21 and the third conductive film 23 is charged with a negative charge. At this time, polarization occurs inside the side dielectric film 30 and electrostatic capacitance is generated. Note that the polarities of the voltages applied to the first electrode 51 and the second electrode 52 may be reversed.

In the semiconductor device shown in FIG. 1, a plurality of side dielectric films 30 are alternately stacked with conductive films 20 inside a groove formed in a semiconductor substrate 10, and each side dielectric film 30 can generate capacitance. Therefore, the capacitance density per area of the semiconductor substrate 10 can be improved.

When a thin film capacitor is formed inside a groove of the semiconductor substrate 10, the dielectric film is bent at the corner of the groove where the bottom and side surfaces of the groove are connected. Therefore, when a predetermined voltage is applied to the thin film capacitor, an electric field is concentrated at the bent portion of the dielectric film at the corner of the groove. This electric field concentration may lower the breakdown voltage of the semiconductor device.

In contrast, in the semiconductor device shown in FIG. 1, the bottom dielectric film 40, which is thicker than the side dielectric film 30 disposed on the side surfaces of the trench, is disposed on the bottom surface of the trench. Therefore, electric field concentration at the corners of the groove can be alleviated. Note that by increasing only the thickness of the bottom dielectric film 40 without increasing the thickness of the side dielectric film 30, it is possible to suppress a decrease in capacitance density and to alleviate electric field concentration at the corners of the trench.

As described above, according to the semiconductor device shown in FIG. 1, a thin film capacitor can be formed inside the groove of the semiconductor substrate 10, and a decrease in breakdown voltage can be suppressed.

In the above, a structure in which three layers of conductive films 20 are laminated has been exemplified. By stacking a plurality of layers of the conductive film 20, the capacitance density per unit area can be increased. The larger the number of laminated conductive films 20, the greater the capacity density per unit area, so the number of conductive films 20 may be four or more. On the other hand, by reducing the number of layers of the conductive film 20, the manufacturing process can be shortened. The number of layers of the conductive film 20 can be arbitrarily selected depending on the desired capacity density and the like. Note that among the plurality of conductive films 20, the first conductive film 21 closest to the side surface of the groove is set as the first conductive film, the odd-numbered conductive films 20 are electrically connected to each other, and the even-numbered conductive films 20 are connected to each other electrically. electrically connected to each other. The side dielectric films 30 electrically insulate the odd-numbered conductive films 20 and the even-numbered conductive films 20 inside the trench.

A method for manufacturing a semiconductor device according to the first embodiment will be described below with reference to the drawings. Note that the method for manufacturing a semiconductor device described below is just an example, and it can be realized by various other manufacturing methods, including this modification.

First, as shown in FIG. 2, a groove 100 is formed in the main surface 11 of the semiconductor substrate 10. Here, the semiconductor substrate 10 is a conductive single crystal silicon substrate. The groove 100 is formed, for example, as follows. That is, after forming a silicon oxide film over the entire main surface 11 by CVD or the like, the silicon oxide film is patterned using photolithography so that the region where the groove 100 is to be formed is exposed. Then, using the silicon oxide film as an etching mask, the groove 100 is formed by dry etching or wet etching. After forming the groove 100, the silicon oxide film used as an etching mask is removed.

Next, as shown in FIG. 3, a first side dielectric film 31 is formed on the inner wall surface and main surface 11 of the groove 100. The side dielectric films 30 such as the first side dielectric film 31 are formed by depositing a silicon oxide film, a silicon nitride film, or a laminated film of a silicon oxide film and a silicon nitride film using a low pressure CVD method. The thickness of the side dielectric film 30 is, for example, about 0.8 μm.

Thereafter, as shown in FIG. 4, a bottom dielectric film 40 is formed on the bottom surface of the groove 100. The bottom dielectric film 40 is a silicon oxide film, a silicon nitride film, or a laminated film of a silicon oxide film and a silicon nitride film. A bottom dielectric film 40 is selectively deposited on. The thickness of the bottom dielectric film 40 is, for example, about 3 μm.

By using the plasma CVD method that applies a bias in the depth direction of the trench 100 as described above, the bottom dielectric film 40 can be deposited inside the trench 100 only on the bottom surface of the trench 100 excluding the side surfaces of the trench 100. Note that the stack of dielectric films formed above the main surface 11 of the semiconductor substrate 10 in the step of forming the first side dielectric film 31 and the step of forming the bottom dielectric film 40 is the first interlayer insulating film 301. .

Next, as shown in FIG. 5, a first conductive film 21 is formed inside the groove 100 to cover the surface of the first side dielectric film 31. For the conductive film 20 such as the first conductive film 21, for example, a polycrystalline silicon film doped with an impurity such as phosphorus (P) is used. The polycrystalline silicon film is formed using a CVD method or the like. The thickness of the conductive film 20 is, for example, about 0.4 μm. Note that the conductive film formed above the main surface 11 of the semiconductor substrate 10 in the step of forming the first conductive film 21 is the first top conductive layer 201 .

As shown in FIG. 6, a mask material 60 covering the first upper conductive layer 201 is formed. Here, the mask material 60 is a silicon oxide film formed by atmospheric pressure CVD. By using the normal pressure CVD method for forming the mask material 60, the mask material 60 is not formed on the bottom surface of the groove 100, and the mask material 60 is formed above the main surface 11 of the semiconductor substrate 10 outside the groove 100. is formed. The film thickness of the mask material 60 is, for example, about 1 μm.

Thereafter, as shown in FIG. 7, using the mask material 60 as a protective film, anisotropic etching such as dry etching in which etching progresses in the depth direction of the groove 100 is performed to form the first conductive film 21 on the bottom surface of the groove 100. The conductive film deposited on the substrate is etched away. At this time, by plasma etching that applies a bias in the depth direction of the groove 100, the conductive film deposited on the bottom surface of the groove 100 is selectively removed without etching the first conductive film 21 formed on the side surface of the groove 100. can do. A stack of mask materials 60 used as a protective film is left above main surface 11 of semiconductor substrate 10 as second interlayer insulating film 302 .

After removing the conductive film deposited on the bottom surface of the trench 100, a second side dielectric film 32 is formed to cover the surface of the first conductive film 21 formed on the side surface of the trench 100, as shown in FIG. . The second side dielectric film 32 is formed by, for example, a low pressure CVD method.

Next, as shown in FIG. 9, the dielectric film deposited on the bottom surface of the trench 100 and the top surface of the mask material 60 during the formation of the second side dielectric film 32 is etched away by anisotropic dry etching. At this time, by applying a bias in the depth direction of the trench 100 during plasma etching, the dielectric film deposited on the bottom surface of the trench 100 is selected without etching the second side dielectric film 32 formed on the side surface of the trench 100. can be removed.

Thereafter, the second conductive film 22, the third side dielectric film 33, and the third conductive film 23 are sequentially formed in the same manner as described with reference to FIGS. 5 to 9. By filling the trench 100 with the third conductive film 23, the semiconductor substrate shown in FIG. 10 is obtained. Note that the third interlayer insulating film 303 is a mask material used for etching away the conductive film deposited on the bottom surface of the trench 100 when forming the second conductive film 22. Further, the conductive film formed above the main surface 11 of the semiconductor substrate 10 in the step of forming the second conductive film 22 is the second top conductive layer 202 . The conductive film formed above the main surface 11 of the semiconductor substrate 10 in the step of forming the third conductive film 23 is the third top conductive layer 203 .

A fourth interlayer insulating film 304 is formed covering the surface of the third conductive film 23 shown in FIG. Further, a first electrode 51 and a second electrode 52 are formed on the upper surface of the fourth interlayer insulating film 304, and the semiconductor device shown in FIG. 1 is completed.

To form the first electrode 51 and the second electrode 52, the insulating film formed on the main surface 11 of the semiconductor substrate 10 is selectively removed. For example, a contact hole passing through the first interlayer insulating film 301 to the fourth interlayer insulating film 304 is formed, and the first electrode 51 electrically connected to the semiconductor substrate 10 is formed so as to fill this contact hole with a conductive material. do. Further, a contact hole passing through the second interlayer insulating film 302 to the fourth interlayer insulating film 304 is formed, and a second electrode is electrically connected to the first upper conductive layer 201 so as to fill the contact hole with a conductive material. Form 52. A contact hole passing through the third to fourth interlayer insulating films 303 to 304 is formed, and the first electrode 51 is electrically connected to the second upper conductive layer 202 so as to fill the contact hole with a conductive material. Form. Further, a contact hole passing through the fourth interlayer insulating film 304 is formed, and a second electrode 52 electrically connected to the third upper surface conductive layer 203 is formed so as to fill this contact hole with a conductive material.

In the manufacturing method described above, every time the conductive film 20 is formed, the mask material 60 is not formed on the bottom surface of the groove 100, and the mask material 60 is not formed on the bottom surface of the groove 100 and above the main surface 11 of the semiconductor substrate 10. The mask material 60 is formed using a film forming method that forms the mask material 60. For example, a silicon oxide film is formed as the mask material 60 by atmospheric pressure CVD. Thereby, the conductive film deposited on the bottom surface of the trench 100 can be removed without the need to pattern the mask material 60 using photolithography technology. As a result, the manufacturing process of the semiconductor device can be shortened.

On the other hand, a bottom dielectric film 40 is selectively formed on the bottom surface of the trench 100, for example, as shown in FIG. 4, by a plasma CVD method that applies a bias in the depth direction of the trench 100. Furthermore, for example, when forming a film on the side and bottom surfaces of the groove 100 as shown in FIG. 3, a low pressure CVD method is used.

For example, a single crystal silicon substrate or a polycrystalline silicon substrate can be used as the semiconductor substrate 10. By using a silicon substrate, which is a material with high workability, integration is possible through microfabrication. Therefore, a semiconductor device with high capacity density can be manufactured.

Furthermore, by using a polycrystalline silicon film for the conductive film 20, a low-pressure chemical vapor deposition method that forms a film with good coverage can be used to form the conductive film 20. Therefore, the conductive film 20 can be formed inside the groove 100 with a high aspect ratio, and a semiconductor device having a thin film capacitor with a high capacitance density can be manufactured.

Furthermore, in the above example, a silicon oxide film or a silicon nitride film is used for the side dielectric film 30 and the bottom dielectric film 40. By using a material with a high dielectric breakdown electric field and a high dielectric constant, it is possible to form the side dielectric film 30 with a high withstand voltage and a high dielectric constant. Therefore, a semiconductor device with high breakdown voltage and high capacity density can be realized.

Alternatively, a side dielectric film 30 or a bottom dielectric film 40 having a multilayer structure made of two or more types of materials may be used. For example, the side dielectric film 30 is formed by stacking a silicon nitride film with a relatively high dielectric constant but a large film stress and a silicon oxide film with a relatively low dielectric constant but a small film stress. As a result, it is possible to form a side dielectric film 30 having a high dielectric constant, ensuring a desired thickness, and having a well-balanced dielectric constant and stress.

(Second embodiment)
In the semiconductor device according to the second embodiment of the present invention, as shown in FIG. 11, among the plurality of conductive films 20 formed inside the trench, the conductive films 20 closer to the side surfaces of the trench are arranged in the depth direction of the trench. It is deeply formed along the That is, the lower end of the first conductive film 21 is closest to the bottom of the groove, and the lower end of the third conductive film 23 is furthest from the bottom of the groove.

In the semiconductor device shown in FIG. 11, by forming the conductive film 20 deeper near the side surfaces of the trench, the area of the side dielectric film 30 forming capacitance can be increased. As a result, a semiconductor device having a thin film capacitor with high capacitance density can be realized. Further, by forming the side dielectric film 30 deeper in the order closer to the side surfaces of the trench, the electric field distribution at the bottom of the trench of the side surface dielectric film 30 has a gentle slope. As a result, electric field concentration at the corners of the trench is alleviated, and a decrease in breakdown voltage of the semiconductor device can be suppressed.

Furthermore, the semiconductor device shown in FIG. 11 has a structure in which the bottom dielectric film 40 has a plurality of layers laminated in the depth direction of the trench. That is, a first bottom dielectric layer 401, a second bottom dielectric layer 402, and a third bottom dielectric layer 403 are laminated in order from the bottom surface of the groove. Hereinafter, the first to third bottom dielectric layers 401 to 403 are collectively referred to as "bottom dielectric layer 400."

As shown in FIG. 11, each of the bottom dielectric layers 400 is connected to the lower end of one of the side dielectric films 30. That is, the first bottom dielectric layer 401 is connected to the bottom end of the first side dielectric film 31, the second bottom dielectric layer 402 is connected to the bottom end of the second side dielectric film 32, and the third bottom dielectric layer 403 is connected to the bottom end of the first side dielectric film 31. Connected to the lower end of the dielectric film 33.

Of the bottom dielectric layers 400, the closer the bottom dielectric layer 400 is to the bottom of the groove, the thinner the film thickness is. That is, the first bottom dielectric layer 401 has the thinnest thickness, and the third bottom dielectric layer 403 has the thickest thickness. Normally, the farther the dielectric film is from the bottom of the groove, the smaller the radius of curvature of the dielectric film, the greater the electric field concentration, and the lower the withstand voltage. However, according to the semiconductor device shown in FIG. 11, by increasing the thickness of the bottom dielectric layer 400 as the distance from the bottom surface of the groove increases, the decrease in breakdown voltage can be suppressed.

The semiconductor device shown in FIG. 11 can be manufactured in the same manner as the manufacturing method described with reference to FIGS. 2 to 10. However, after forming the side dielectric film 30 (see FIG. 8), the dielectric film formed on the bottom of the trench is not removed. That is, the dielectric film deposited on the bottom surface of the trench during the formation of the side dielectric film 30 is used as the bottom dielectric film 40. Therefore, each of the side dielectric films 30 is disposed continuously from one side of the trench to the other side of the trench through a bottom region formed along the bottom of the trench. The thickness of the side dielectric film 30 is made thinner as the side dielectric film 30 is closer to the side surface of the trench. Thereby, the thickness of the bottom dielectric layer 400 can be made thinner closer to the bottom of the groove.

Note that a silicon substrate is used as the semiconductor substrate 10, and the surface orientations of the side and bottom surfaces of the trench 100 are selected so that the rate of oxide film formation by the thermal oxidation method is faster on the bottom surface of the trench 100 than on the side surface of the trench 100. is preferred. For example, the bottom surface of the groove 100 has a plane orientation of (111) or (110), and the side surface of the groove 100 has a plane direction of (100). As a result, when forming an oxide film on the side and bottom surfaces of the trench 100 by thermal oxidation, it is possible to form an oxide film thicker on the bottom surface of the trench 100 than on the side surfaces in one step. Therefore, the number of manufacturing steps for the semiconductor device can be reduced.

In the semiconductor device shown in FIG. 11, the first bottom dielectric layer 401 has a laminated structure of the bottom region of the first side dielectric film 31 and the first bottom region dielectric film 411. The second bottom dielectric layer 402 has a stacked structure of a bottom region of the second side dielectric film 32 and a second bottom region dielectric film 412 . The third bottom dielectric layer 403 has a stacked structure of a bottom region of the third side dielectric film 33 and a third bottom region dielectric film 413 . By increasing the film thickness in the order of the first bottom region dielectric film 411, the second bottom region dielectric film 412, and the third bottom region dielectric film 413, the film thickness of the bottom dielectric layer 400 is made thinner as it approaches the bottom of the groove. are doing. For example, the thickness of the first bottom dielectric layer 401 is about 1 μm, the thickness of the second bottom dielectric layer 402 is about 1.5 μm, and the thickness of the third bottom dielectric layer 403 is about 2 μm.

(Third embodiment)
In the semiconductor device according to the third embodiment of the present invention, as shown in FIG. 12, each of the plurality of conductive films 20 passes through a region formed along the bottom surface of the trench from one side of the trench. It is formed continuously to the other side. The conductive films 20 are insulated from each other by a bottom dielectric layer 400. The semiconductor device shown in FIG. 12 differs from the semiconductor device shown in FIG. 11 in that the conductive film 20 is disposed continuously including the region along the bottom surface of the trench. The rest is the same as the second embodiment.

In the semiconductor device shown in FIG. 12, the first bottom dielectric layer 401 is thicker than the first side dielectric film 31. Furthermore, the second bottom dielectric layer 402 is thicker than the second side dielectric film 32 . Furthermore, the thickness of the third bottom dielectric layer 403 is thicker than the thickness of the third side dielectric film 33. Therefore, according to the semiconductor device shown in FIG. 12, electric field concentration in the dielectric film at the corners of the trench can be alleviated, and a decrease in breakdown voltage can be suppressed.

Furthermore, in the semiconductor device shown in FIG. 12, capacitance is also formed at the bottom of the groove. Therefore, according to the semiconductor device shown in FIG. 12, the area of the dielectric film forming capacitance can be increased. As a result, a semiconductor device having a thin film capacitor with high capacitance density can be realized.

Further, as shown in FIG. 12, the closer the conductive film 20 is to the side surface of the groove, the deeper the conductive film 20 is formed along the depth direction of the groove. Therefore, by increasing the area of the side dielectric film 30 that forms capacitance, the capacitance density of the thin film capacitor can be increased. Further, the farther the bottom dielectric layer 400 is from the bottom of the trench, the thicker the film is. Therefore, even if the radius of curvature of the dielectric film becomes smaller as it is farther from the bottom of the groove and the electric field is concentrated, a decrease in breakdown voltage can be suppressed.

The semiconductor device shown in FIG. 12 can be manufactured in the same manner as the semiconductor device according to the second embodiment. However, after forming the conductive film 20 (see FIG. 6), the conductive film 20 formed on the bottom surface of the groove is not removed. For example, the mask material 60 is not used as a protective film for etching away the conductive film deposited on the bottom surface of the groove 100, but is used as an interlayer insulating film.

(Other embodiments)
As described above, embodiments of the present invention have been described, but the statements and drawings that form part of this disclosure should not be understood as limiting the present invention. Various alternative embodiments, implementations, and operational techniques will be apparent to those skilled in the art from this disclosure.

For example, although the case where the semiconductor substrate 10 is a conductive substrate has been described above, the semiconductor substrate 10 may be an insulating substrate. At this time, the film that contacts the semiconductor substrate 10 on the side surface of the trench may be the conductive film 20 or the side dielectric film 30. Furthermore, the number of grooves in which the thin film capacitor is formed may be plural.

Further, although an example has been shown in which the first electrode 51 and the second electrode 52 are arranged on the main surface 11 side of the semiconductor substrate 10, the first electrode 51 and the second electrode 52 are arranged on the side of the semiconductor substrate 10 that faces each other. They may be placed on the first main surface and the second main surface, respectively.

Note that although the case where the conductive film 20 is a polycrystalline silicon film has been described above, the conductive film 20 may be any other conductive semiconductor film or metal film. For example, conductive polycrystalline silicon carbide, silicon germanium (SiGe), aluminum, or the like may be used as the material of the conductive film 20.

DESCRIPTION OF SYMBOLS 10... Semiconductor substrate 11... Main surface 21... First conductive film 22... Second conductive film 23... Third conductive film 31... First side dielectric film 32... Second side dielectric film 33... Third side dielectric film 40... Bottom surface Dielectric film 51...First electrode 52...Second electrode 100...Groove

Claims (12)

a semiconductor substrate with a groove formed on its main surface;
a plurality of conductive films stacked apart from each other along the surface normal direction of the side surface of the groove;
a plurality of side dielectric films alternately arranged with the plurality of conductive films along the surface normal direction of the side surface of the groove;
A bottom dielectric film disposed on the bottom surface of the groove and connected to the lower ends of the plurality of side dielectric films, the film thickness being greater than the thickness of each of the plurality of side dielectric films along the surface normal direction of the side surface of the groove. and the bottom dielectric film is thick in the depth direction of the groove;
a first electrode to which one of a pair of mutually opposing conductive films among the plurality of conductive films is electrically connected;
and a second electrode to which the other of the pair of conductive films is electrically connected. 2. The semiconductor device according to claim 1, wherein among the plurality of conductive films, a conductive film closer to a side surface of the groove is formed deeper along a depth direction of the groove. Each of the plurality of conductive films is continuously formed from one side of the groove through a region formed along the bottom of the groove to the other side of the groove opposite to the one side. The semiconductor device according to claim 1 or 2, characterized in that: The bottom dielectric film has a configuration in which a plurality of bottom dielectric layers are stacked in the depth direction of the groove,
Each of the plurality of bottom dielectric layers is connected to a lower end of one of the plurality of side dielectric films,
4. The semiconductor device according to claim 1, wherein among the plurality of bottom dielectric layers, a bottom dielectric layer closer to a bottom surface of the trench has a thinner film thickness. 5. The semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon substrate. 6. The semiconductor according to claim 5, wherein the plane orientations of the side and bottom surfaces of the trench are selected so that the rate of oxide film formation by thermal oxidation is faster on the bottom surface of the trench than on the side surfaces of the trench. Device. 7. The semiconductor device according to claim 1, wherein the plurality of conductive films are polycrystalline silicon films. 8. The semiconductor device according to claim 1, wherein the plurality of side dielectric films and the bottom dielectric film are silicon oxide films or silicon nitride films. 9. The semiconductor device according to claim 1, wherein the side dielectric film and the bottom dielectric film have a multilayer structure made of two or more types of materials. 10. The semiconductor device according to claim 1, wherein the plurality of conductive films have a structure of three or more layers. forming a groove on the main surface of the semiconductor substrate;
Alternately laminating a conductive film and a side dielectric film along the surface normal direction of the side surface of the groove;
forming a bottom dielectric film on the bottom surface of the groove, the bottom dielectric film being connected to the lower end of each of the side dielectric films; forming the bottom dielectric film having a thick film thickness along the depth direction;
Each time the conductive film is formed, the mask material is formed using a film forming method in which the mask material is not formed on the bottom surface of the groove and the mask material is formed above the main surface outside the groove. death,
A semiconductor device characterized in that a portion of the conductive film deposited on the bottom surface of the groove is selectively removed by anisotropic etching in which etching proceeds in the depth direction of the groove using the mask material as a protective film. Production method. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the film forming method for forming the mask material is an atmospheric pressure CVD method.

Images