JP7339908B2 - 半導体装置およびその制御方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims description 402
- 238000000034 method Methods 0.000 title claims description 6
- 239000012535 impurity Substances 0.000 claims description 31
- 239000012528 membrane Substances 0.000 claims 5
- 238000011084 recovery Methods 0.000 description 19
- 238000010586 diagram Methods 0.000 description 7
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 3
- 239000013642 negative control Substances 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Description
図1は、実施形態に係る半導体装置1を模式的に示す斜視図である。半導体装置1は、例えば、ダイオードであり、トレンチゲート構造を有する。なお、図1に示すトレンチゲート構造は例示であり、これに限定される訳ではない。例えば、アノード電極とゲート電極とを電気的に接続した構成でも良い。
図6は、第2実施形態に係る半導体装置4を模式的に示す斜視図である。
図6に示すように、隣り合う制御電極20の間において、p形半導体層13は、n形半導体層11上に設けられる。
Claims (12)
- 半導体部と、
前記半導体部の裏面上に設けられた第1電極と、
前記半導体部の表面上に設けられた第2電極と、
前記半導体部と前記第2電極との間において、前記半導体部に設けられたトレンチの内部に配置され、前記半導体部から第1絶縁膜により電気的に絶縁され、前記第2電極から第2絶縁膜により電気的に絶縁された制御電極と、
を備え、
前記半導体部は、第1導電形の第1半導体層と、第2導電形の第2半導体層と、前記第2導電形の第3半導体層と、を含み、
前記第1半導体層は、前記第1電極と前記第2電極との間に延在し、前記制御電極は、前記半導体部の前記表面側から前記第1半導体層中に延在し、
前記第2半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2電極に接続され、
前記第3半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第1半導体層と前記第2半導体層と前記第1絶縁膜とに接し、前記第2電極に電気的に接続され、前記第2半導体層の第2導電形不純物の濃度よりも高濃度の第2導電形不純物を含み、
前記第1電極から前記第2電極に向かう方向において、前記第1半導体層と前記第3半導体層との境界は、前記第1半導体層と前記第2半導体層との境界と同じレベルに位置する半導体装置。 - 半導体部と、
前記半導体部の裏面上に設けられた第1電極と、
前記半導体部の表面上に設けられた第2電極と、
前記半導体部と前記第2電極との間において、前記半導体部に設けられたトレンチの内部に配置され、前記半導体部から第1絶縁膜により電気的に絶縁され、前記第2電極から第2絶縁膜により電気的に絶縁された制御電極と、
を備え、
前記半導体部は、第1導電形の第1半導体層と、第2導電形の第2半導体層と、前記第2導電形の第3半導体層と、を含み、
前記第1半導体層は、前記第1電極と前記第2電極との間に延在し、前記制御電極は、前記半導体部の前記表面側から前記第1半導体層中に延在し、
前記第2半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2電極に接続され、
前記第3半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第1半導体層と前記第2半導体層と前記第1絶縁膜とに接し、前記第2電極に電気的に接続され、前記第2半導体層の第2導電形不純物の濃度よりも高濃度の第2導電形不純物を含み、
前記第2半導体層は、前記半導体部の前記表面に沿った前記制御電極の延在方向に並び、前記第2電極に接した複数の第1コンタクト部を有し、
前記第3半導体層は、前記第2電極に接する第2コンタクト部を含み、
前記第3半導体層の前記第2コンタクト部は、前記第2半導体層の前記複数の第1コンタクト部のうちの前記延在方向において隣り合う2つの第1コンタクト部の間に位置する半導体装置。 - 半導体部と、
前記半導体部の裏面上に設けられた第1電極と、
前記半導体部の表面上に設けられた第2電極と、
前記半導体部と前記第2電極との間において、前記半導体部に設けられたトレンチの内部に配置され、前記半導体部から第1絶縁膜により電気的に絶縁され、前記第2電極から第2絶縁膜により電気的に絶縁された制御電極と、
を備え、
前記半導体部は、第1導電形の第1半導体層と、第2導電形の第2半導体層と、前記第2導電形の第3半導体層と、を含み、
前記第1半導体層は、前記第1電極と前記第2電極との間に延在し、前記制御電極は、前記半導体部の前記表面側から前記第1半導体層中に延在し、
前記第2半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2電極に接続され、
前記第3半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2半導体層と前記第1絶縁膜とに接し、前記第2電極に電気的に接続され、前記第2半導体層の第2導電形不純物の濃度よりも高濃度の第2導電形不純物を含み、
前記第2半導体層は、前記半導体部の前記表面に沿った前記制御電極の延在方向に並ぶ複数の第1コンタクト部を有し、
前記第3半導体層は、前記第2半導体層の前記複数の第1コンタクト部のうちの前記延在方向において隣り合う2つの第1コンタクト部の間に位置する第2コンタクト部をさらに含み、
前記第2電極は、前記第2半導体層の前記複数の第1コンタクト部、前記第3半導体層の前記第2半導体層と前記第1絶縁膜との間に位置する部分および前記複数の第1コンタクト部の間に位置する前記第2コンタクト部に接する半導体装置。 - 前記第2半導体層は、前記第1電極から前記第2電極に向かう第1方向における第1厚を有し、
前記第3半導体層の前記第2コンタクト部は、前記第1方向における第2厚を有し、前記第1厚は、前記第2厚よりも厚い請求項2または3に記載の半導体装置。 - 前記第3半導体層は、前記第1絶縁膜に沿って延在し、前記第1半導体層と前記第1絶縁膜との間に位置する部分を含む請求項2~4のいずれか1つに記載の半導体装置。
- 半導体部と、
前記半導体部の裏面上に設けられた第1電極と、
前記半導体部の表面上に設けられた第2電極と、
前記半導体部と前記第2電極との間において、前記半導体部に設けられたトレンチの内部に配置され、前記半導体部から第1絶縁膜により電気的に絶縁され、前記第2電極から第2絶縁膜により電気的に絶縁された制御電極と、
を備え、
前記半導体部は、第1導電形の第1半導体層と、第2導電形の第2半導体層と、前記第2導電形の第3半導体層と、を含み、
前記第1半導体層は、前記第1電極と前記第2電極との間に延在し、前記制御電極は、前記半導体部の前記表面側から前記第1半導体層中に延在し、
前記第2半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2電極に接続され、
前記第3半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第1半導体層と前記第2半導体層と前記第1絶縁膜とに接し、前記第2電極に電気的に接続され、前記第2半導体層の第2導電形不純物の濃度よりも高濃度の第2導電形不純物を含み、
前記第3半導体層は、前記第1絶縁膜に沿って延在し、前記第1半導体層と前記第1絶縁膜との間に位置する部分を含む半導体装置。 - 前記第3半導体層は、前記第2半導体層から前記制御電極に向かう方向における第1層厚を有し、
前記第2半導体層は、前記第2半導体層から前記制御電極に向かう前記方向における第2層厚を有し、前記第1層厚は、前記第2層厚よりも薄い請求項1記載の半導体装置。 - 半導体部と、
前記半導体部の裏面上に設けられた第1電極と、
前記半導体部の表面上に設けられた第2電極と、
前記半導体部と前記第2電極との間において、前記半導体部に設けられたトレンチの内部に配置され、前記半導体部から第1絶縁膜により電気的に絶縁され、前記第2電極から第2絶縁膜により電気的に絶縁された制御電極と、
を備え、
前記半導体部は、第1導電形の第1半導体層と、第2導電形の第2半導体層と、前記第2導電形の第3半導体層と、を含み、
前記第1半導体層は、前記第1電極と前記第2電極との間に延在し、前記制御電極は、前記半導体部の前記表面側から前記第1半導体層中に延在し、
前記第2半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第2電極に接続され、
前記第3半導体層は、前記第1半導体層と前記第2電極との間に設けられ、前記第1半導体層と前記第2半導体層と前記第1絶縁膜とに接し、前記第2電極に電気的に接続され、前記第2半導体層の第2導電形不純物の濃度よりも高濃度の第2導電形不純物を含み、
前記第3半導体層は、前記第2半導体層から前記制御電極に向かう第1方向における第1層厚を有し、
前記第2半導体層は、前記第1方向における第2層厚を有し、前記第1層厚は、前記第2層厚よりも薄く、
前記第3半導体層は、前記第1電極から前記第2電極に向かう第2方向において、前記第1絶縁膜に沿った第1長を有し、
前記第1長は、前記第1層厚よりも長い半導体装置。 - 前記半導体部は、前記第1半導体層と前記第1絶縁膜との間に設けられ、前記トレンチの底部に沿って延在し、前記制御電極の端を覆う前記第2導電形の第5半導体層をさらに含む請求項1~8のいずれか1つに記載の半導体装置。
- 前記第5半導体層は、前記第2電極に抵抗を介して接続される請求項9記載の半導体装置。
- 前記半導体部は、前記第1半導体層と前記第1電極との間に設けられ、前記第1半導体層の第1導電形不純物よりも高濃度の第1導電形不純物をさらに含む請求項1~10のいずれか1つに記載の半導体装置。
- 請求項1~11のいずれか1つに記載の半導体装置の制御方法であって、
前記第2電極の電位が前記第1電極の電位よりも高くなるように、前記第1電極と前記第2電極との間に電圧を印加した状態から、前記第2電極の電位が前記第1電極の電位よりも低くなるように、前記第1電極と前記第2電極との間に印加される電圧を反転させる過程において、前記制御電極の電位が前記第2電極の電位よりも低くなるように前記第2電極と前記制御電極との間に制御電圧を印加する制御方法。
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