JP7331419B2 - 集積回路装置、発振器、電子機器及び移動体 - Google Patents
集積回路装置、発振器、電子機器及び移動体 Download PDFInfo
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- JP7331419B2 JP7331419B2 JP2019069774A JP2019069774A JP7331419B2 JP 7331419 B2 JP7331419 B2 JP 7331419B2 JP 2019069774 A JP2019069774 A JP 2019069774A JP 2019069774 A JP2019069774 A JP 2019069774A JP 7331419 B2 JP7331419 B2 JP 7331419B2
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Description
図1に本実施形態の集積回路装置20の構成例を示す。本実施形態の集積回路装置20は、発振回路30と温度補償回路60と出力回路40とレギュレーター81、82を含む。また本実施形態の発振器4は振動子10と集積回路装置20を含む。振動子10は集積回路装置20に電気的に接続されている。例えば振動子10及び集積回路装置20を収納するパッケージの内部配線、ボンディグワイヤー又は金属バンプ等を用いて、振動子10と集積回路装置20は電気的に接続されている。
図4に本実施形態の集積回路装置20のレイアウト配置例を示す。図4のレイアウト配置例では、図2や図1で説明した各回路の回路配置領域が示されている。回路配置領域は、回路を構成する回路素子や回路素子間を接続する配線が配置される領域である。回路素子は、トランジスターなどの能動素子や、抵抗、キャパシターなどの受動素子である。また図4~図6のレイアウト配置例では、集積回路装置20の回路素子が形成される基板に直交する方向の平面視での配置例が示されている。
図7に発振回路30の構成例を示す。図7の発振回路30は、駆動回路32と、DCカット用のキャパシターC1、C2と、基準電圧供給回路34と、可変容量回路36を含む。また発振回路30は、DCカット用のキャパシターC4と、可変容量回路37を含むことができる。なおキャパシターC4と可変容量回路37は必須の構成要素ではなく、これらを設けない変形実施も可能である。また可変容量回路36及び可変容量回路37とGNDノードとの間にはキャパシターC31~C3nが設けられている。
図8に出力回路40の構成例を示す。出力回路40は、発振信号OSCのバッファリングなどを行うバッファー回路42と、発振信号OSCに基づくクロック信号CK、CKXの出力及び駆動を行う出力ドライバー46を含む。バッファー回路42は、例えば波形整形回路43、ディバイダー44、レベルシフター&プリドライバー45を含むことができる。波形整形回路43は、発振信号OSCの波形整形を行って、発振信号OSCに対応する矩形波の信号を出力する回路であり、インバーターIVBと、インバーターIVBの出力端子と入力端子の間に設けられる帰還用の抵抗RQを含む。ディバイダー44は、クロック分周を行う回路であり、ディバイダー44を設けることで、発振信号OSCの周波数を分周した周波数のクロック信号CK、CKXを出力できるようになる。レベルシフター&プリドライバー45は、VREG2の電源電圧レベルからVDDの電源電圧レベルへのレベルシフトや、出力ドライバー46を駆動するプリドライブを行う回路である。例えばバッファー回路42の波形整形回路43及びディバイダー44には、レギュレート電源電圧VREG2が供給され、レベルシフター&プリドライバー45には、レギュレート電源電圧VREG2及び電源電圧VDDが供給される。一方、出力ドライバー46には電源電圧VDDが供給される。
図16にレギュレーター81の構成例を説明する。レギュレーター81は、VDDノードとGNDノードの間に直列に設けられた駆動用のN型のトランジスターTA1及び抵抗RA1、RA2と、演算増幅器OPAを含む。またレギュレーター81は、演算増幅器OPAの出力端子側に設けられた抵抗RA3及びキャパシターCAを含むことができる。演算増幅器OPAの非反転入力端子には、基準電圧VREFが入力され、反転入力端子には、レギュレート電源電圧VREG1を抵抗RA1、RA2により電圧分割した電圧VDAが入力される。そして演算増幅器OPAの出力端子が、抵抗RA3を介してトランジスターTA1のゲートに入力され、トランジスターTA1のドレインノードからレギュレート電源電圧VREG1が出力される。図17では、図16とは異なり、駆動用のトランジスターがP型のトランジスターTA2となっており、演算増幅器OPAの反転入力端子に基準電圧VREFが入力され、非反転入力端子に電圧VDAが入力される。また図17では位相補償用のキャパシターCAの接続構成も図16とは異なっている。
図18に基準電圧生成回路90の構成例を示す。基準電圧生成回路90は、VDDノードとGNDノードの間に設けられるN型のトランジスターTD1、抵抗RD1、RD2、RD3、バイポーラトランジスターBP1、BP2を含む。また基準電圧生成回路90は、バイアス電圧BSがゲートに入力されるP型のトランジスターTD1、TD2と、トランジスターTD2のドレインノードとGNDノードとの間に設けられるバイポーラトランジスターBP3を含む。基準電圧生成回路90は、バンドギャップリファレンス回路であり、バンドギャップ電圧による基準電圧VREFを生成して出力する。例えばPNP型のバイポーラトランジスターBP1、BP2のベース・エミッター間電圧をVBE1、VBE2とし、ΔVBE=VBE1-VBE2とする。基準電圧生成回路90は、例えばVREF=K×ΔVBE+VBE2となる基準電圧VREFを出力する。Kは抵抗RD1、RD2の抵抗値により設定される。例えばVBE2は負の温度特性を有し、ΔVBEは正の温度特性を有するため、抵抗RD1、RD2の抵抗値を調整することで、温度依存性のない定電圧の基準電圧VREFを生成できるようになる。そして生成される基準電圧VREFはグランド電圧を基準とした定電圧になる。なお基準電圧生成回路90は図18の構成に限定されず、例えばトランジスターの仕事関数差電圧を用いて基準電圧VREFを生成する回路などの種々の構成の回路を用いることができる。
次に本実施形態の発振器4の構造例を説明する。図21に発振器4の第1の構造例を示す。発振器4は、振動子10と、集積回路装置20と、振動子10及び集積回路装置20を収容するパッケージ15を有する。パッケージ15は、例えばセラミック等により形成され、その内側に収容空間を有しており、この収容空間に振動子10及び集積回路装置20が収容されている。収容空間は気密封止されており、望ましくは真空に近い状態である減圧状態になっている。パッケージ15により、振動子10及び集積回路装置20を衝撃、埃、熱、湿気等から好適に保護することができる。
図23に、本実施形態の集積回路装置20を含む電子機器500の構成例を示す。電子機器500は、本実施形態の集積回路装置20と、集積回路装置20の発振回路30の発振信号に基づくクロック信号により動作する処理装置520を含む。具体的には電子機器500は、本実施形態の集積回路装置20を有する発振器4を含み、処理装置520は、発振器4からのクロック信号に基づいて動作する。また電子機器500は、アンテナANT、通信インターフェース510、操作インターフェース530、表示部540、メモリー550を含むことができる。なお電子機器500は図23の構成に限定されず、これらの一部の構成要素を省略したり、他の構成要素を追加するなどの種々の変形実施が可能である。
T5、T6…クロックパッド、L1、L2…信号線、CN1~CN4…コーナー部、
SD1、SD2、SD3、SD4…辺、DR1、DR2、DR3、DR4…方向、
TE3、TE4、TE5、TE6、TE7…外部端子、LPW1、LPW2…電源線、
CK、CKX…クロック信号、OSC…発振信号、VCP…温度補償電圧、
VREG1、VREG2…レギュレート電源電圧、EIN…外部入力信号、
VREF…基準電圧、VT…温度検出電圧、VR1~VRn、VRB…基準電圧、
C1、C2、C31~C3n、C4、CA…キャパシター、IS、IST…電流源、
BP、BP1、BP2、BP3、BPT…バイポーラトランジスター、
RA1~RA3、RB、RC1、RC2、RD1~RD3、RQ…抵抗、
OPA…演算増幅器、TA1、TA2、TD1、TD2、TD3…トランジスター、
4…発振器、5…パッケージ、6…ベース、7…リッド、8、9…外部端子、
10…振動子、12…回路部品、14…発振器、15…パッケージ、
16…ベース、17…リッド、18、19…外部端子、
20、21…集積回路装置、30…発振回路、32…駆動回路、
34…基準電圧供給回路、36、37…可変容量回路、40…出力回路、
42…バッファー回路、43…波形整形回路、44…ディバイダー、
45…レベルシフター&プリドライバー、46…出力ドライバー、
50…制御回路、60…温度補償回路、62…0次補正回路、64…1次補正回路、
66…高次補正回路、68…電流電圧変換回路、70…温度センサー、
80…電源回路、81、82…レギュレーター、
90…基準電圧生成回路、100…記憶部、
206…自動車、207…車体、208…制御装置、209…車輪、
220…処理装置、500…電子機器、510…通信インターフェース、
520…処理装置、530…操作インターフェース、540…表示部、
550…メモリー
Claims (17)
- 振動子を発振させることで発振信号を生成する発振回路と、
前記発振回路の発振周波数の温度補償を行う温度補償回路と、
前記発振信号に基づいてクロック信号を出力する出力回路と、
電源電圧に基づいて第1レギュレート電源電圧を生成して前記温度補償回路に供給する第1レギュレーターと、
前記電源電圧に基づいて第2レギュレート電源電圧を生成して前記出力回路に供給する第2レギュレーターと、
前記電源電圧が供給される電源パッドと、
を含み、
前記電源パッドと前記第2レギュレーターとの距離は、前記電源パッドと前記第1レギュレーターとの距離よりも短いことを特徴とする集積回路装置。 - 請求項1に記載の集積回路装置において、
前記電源パッドと前記第1レギュレーターとを接続する第1電源線と、
前記電源パッドと前記第2レギュレーターとを接続する第2電源線と、
を含み、
前記第1電源線の配線幅は、前記第2電源線の配線幅よりも細いことを特徴とする集積回路装置。 - 振動子を発振させることで発振信号を生成する発振回路と、
前記発振回路の発振周波数の温度補償を行う温度補償回路と、
前記発振信号に基づいてクロック信号を出力する出力回路と、
電源電圧に基づいて第1レギュレート電源電圧を生成して前記温度補償回路に供給する第1レギュレーターと、
前記電源電圧に基づいて第2レギュレート電源電圧を生成して前記出力回路に供給する第2レギュレーターと、
グランド電圧が供給されるグランドパッドと、
を含み、
前記グランドパッドと前記第1レギュレーターとの距離は、前記グランドパッドと前記第2レギュレーターとの距離よりも短いことを特徴とする集積回路装置。 - 振動子を発振させることで発振信号を生成する発振回路と、
前記発振回路の発振周波数の温度補償を行う温度補償回路と、
前記発振信号に基づいてクロック信号を出力する出力回路と、
電源電圧に基づいて第1レギュレート電源電圧を生成して前記温度補償回路に供給する第1レギュレーターと、
前記電源電圧に基づいて第2レギュレート電源電圧を生成して前記出力回路に供給する第2レギュレーターと、
を含み、
前記発振回路は、集積回路装置の第1辺、前記第1辺に交差する第2辺、前記第1辺の対辺である第3辺及び前記第2辺の対辺である第4辺のうちの前記第1辺に沿って配置され、
前記出力回路は、前記第2辺に沿って配置され、
前記第2レギュレーターは、前記第1辺と前記第2辺が交差するコーナー部に配置され、
前記第1辺から前記第3辺に向かう方向を第1方向とし、前記第2辺から前記第4辺に向かう方向を第2方向としたときに、前記温度補償回路及び前記第1レギュレーターは、前記出力回路の前記第2方向に配置されることを特徴とする集積回路装置。 - 振動子を発振させることで発振信号を生成する発振回路と、
前記発振回路の発振周波数の温度補償を行う温度補償回路と、
前記発振信号に基づいてクロック信号を出力する出力回路と、
電源電圧に基づいて第1レギュレート電源電圧を生成して前記温度補償回路に供給する第1レギュレーターと、
前記電源電圧に基づいて第2レギュレート電源電圧を生成して前記出力回路に供給する第2レギュレーターと、
を含み、
集積回路装置の第1辺から前記第1辺の対辺である第3辺に向かう方向を第1方向とし、前記第1辺に交差する第2辺から前記第2辺の対辺である第4辺に向かう方向を第2方向としたときに、
前記第2レギュレーターと前記出力回路は、前記第1方向に沿って配置され、
前記温度補償回路と前記第1レギュレーターは、前記出力回路の前記第2方向において前記第1方向に沿って配置されることを特徴とする集積回路装置。 - 請求項5に記載の集積回路装置において、
前記電源電圧が供給される電源パッドを含み、
前記電源パッドは、前記第2レギュレーターと前記出力回路との間に配置されることを特徴とする集積回路装置。 - 請求項5又は6に記載の集積回路装置において、
前記第2レギュレーターは、前記第2レギュレート電源電圧を前記発振回路に供給し、
前記発振回路は、前記第2レギュレーターの前記第2方向に配置されることを特徴とする集積回路装置。 - 請求項5乃至7のいずれか一項に記載の集積回路装置において、
前記温度補償回路を制御する制御回路を含み、
前記制御回路は、前記温度補償回路の前記第2方向に配置されることを特徴とする集積回路装置。 - 請求項5乃至8のいずれか一項に記載の集積回路装置において、
前記振動子の一端に電気的に接続される第1パッドと、
前記振動子の他端に電気的に接続される第2パッドと、
前記クロック信号が出力されるクロックパッドと、
を含み、
前記第1パッド及び前記第2パッドは、前記第1辺に沿って配置され、
前記クロックパッドは、前記第2辺に沿って配置されることを特徴とする集積回路装置。 - 請求項5乃至9のいずれか一項に記載の集積回路装置において、
温度検出電圧を前記温度補償回路に出力する温度センサーを含み、
前記温度センサーは、前記発振回路の前記第2方向に配置されることを特徴とする集積回路装置。 - 請求項1乃至10のいずれか一項に記載の集積回路装置において、
電圧設定情報を記憶する記憶部を含み、
前記第1レギュレーターは、固定電圧の前記第1レギュレート電源電圧を生成し、
前記第2レギュレーターは、前記電圧設定情報に基づき電圧が可変に設定される前記第2レギュレート電源電圧を生成することを特徴とする集積回路装置。 - 請求項1乃至11のいずれか一項に記載の集積回路装置において、
前記温度補償回路は、多項式近似によるアナログ方式の温度補償を行う回路であることを特徴とする集積回路装置。 - 請求項1乃至12のいずれか一に記載の集積回路装置において、
前記出力回路は、LVDS、PECL、HCSL及び差動のCMOSのうちの少なくとも1つの信号形式で前記クロック信号を出力することを特徴とする集積回路装置。 - 請求項1乃至13のいずれか一項に記載の集積回路装置において、
前記出力回路は、
前記発振信号の波形整形を行って、前記発振信号に対応する矩形波の信号を出力する波形整形回路を含み、
前記波形整形回路が、前記第2レギュレーターからの前記第2レギュレート電源電圧が供給されて動作することを特徴とする集積回路装置。 - 請求項1乃至14のいずれか一項に記載の集積回路装置と、
前記振動子と、
を含むことを特徴とする発振器。 - 請求項1乃至14のいずれか一項に記載の集積回路装置と、
前記クロック信号により動作する処理装置と、
を含むことを特徴とする電子機器。 - 請求項1乃至14のいずれか一項に記載の集積回路装置と、
前記クロック信号により動作する処理装置と、
を含むことを特徴とする移動体。
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