JP7310892B2 - 情報処理装置 - Google Patents

情報処理装置 Download PDF

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Publication number
JP7310892B2
JP7310892B2 JP2021538525A JP2021538525A JP7310892B2 JP 7310892 B2 JP7310892 B2 JP 7310892B2 JP 2021538525 A JP2021538525 A JP 2021538525A JP 2021538525 A JP2021538525 A JP 2021538525A JP 7310892 B2 JP7310892 B2 JP 7310892B2
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Prior art keywords
matrix
submatrix
sparse
vector
unit
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Japanese (ja)
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JPWO2021024300A1 (https=
JPWO2021024300A5 (https=
Inventor
裕太 井手口
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NEC Corp
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NEC Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)
JP2021538525A 2019-08-02 2019-08-02 情報処理装置 Active JP7310892B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/030484 WO2021024300A1 (ja) 2019-08-02 2019-08-02 情報処理装置

Publications (3)

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JPWO2021024300A1 JPWO2021024300A1 (https=) 2021-02-11
JPWO2021024300A5 JPWO2021024300A5 (https=) 2022-03-31
JP7310892B2 true JP7310892B2 (ja) 2023-07-19

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JP2021538525A Active JP7310892B2 (ja) 2019-08-02 2019-08-02 情報処理装置

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JP (1) JP7310892B2 (https=)
WO (1) WO2021024300A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118520206A (zh) * 2023-02-20 2024-08-20 华为技术有限公司 一种数据处理方法、系统及相关设备
CN117436370B (zh) * 2023-12-06 2024-03-19 山东省计算中心（国家超级计算济南中心） 面向流体力学网格生成的超定矩阵方程并行方法及系统
CN117609677B (zh) * 2023-12-08 2024-06-18 上海交通大学 一种稀疏矩阵乘法加速方法、fpga、计算系统及存储介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016066329A (ja) 2014-09-26 2016-04-28 日本電気株式会社 情報処理装置、情報処理方法、及び、コンピュータ・プログラム
WO2017154946A1 (ja) 2016-03-09 2017-09-14 日本電気株式会社 情報処理装置、情報処理方法、データ構造およびプログラム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6064808A (en) * 1997-08-01 2000-05-16 Lucent Technologies Inc. Method and apparatus for designing interconnections and passive components in integrated circuits and equivalent structures by efficient parameter extraction
US11392829B1 (en) * 2018-05-02 2022-07-19 Nvidia Corporation Managing data sparsity for neural networks
US10620951B2 (en) * 2018-06-22 2020-04-14 Intel Corporation Matrix multiplication acceleration of sparse matrices using column folding and squeezing

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016066329A (ja) 2014-09-26 2016-04-28 日本電気株式会社 情報処理装置、情報処理方法、及び、コンピュータ・プログラム
WO2017154946A1 (ja) 2016-03-09 2017-09-14 日本電気株式会社 情報処理装置、情報処理方法、データ構造およびプログラム

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US20220253507A1 (en) 2022-08-11
WO2021024300A1 (ja) 2021-02-11

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