JP6808460B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP6808460B2 JP6808460B2 JP2016231339A JP2016231339A JP6808460B2 JP 6808460 B2 JP6808460 B2 JP 6808460B2 JP 2016231339 A JP2016231339 A JP 2016231339A JP 2016231339 A JP2016231339 A JP 2016231339A JP 6808460 B2 JP6808460 B2 JP 6808460B2
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- Japan
- Prior art keywords
- insulating film
- semiconductor substrate
- semiconductor device
- insulating
- hole
- Prior art date
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
- H10F39/026—Wafer-level processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/811—Interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0265—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias characterised by the sidewall insulation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016231339A JP6808460B2 (ja) | 2016-11-29 | 2016-11-29 | 半導体装置及びその製造方法 |
| US15/800,567 US10388592B2 (en) | 2016-11-29 | 2017-11-01 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016231339A JP6808460B2 (ja) | 2016-11-29 | 2016-11-29 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018088487A JP2018088487A (ja) | 2018-06-07 |
| JP2018088487A5 JP2018088487A5 (https=) | 2019-12-26 |
| JP6808460B2 true JP6808460B2 (ja) | 2021-01-06 |
Family
ID=62192831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016231339A Active JP6808460B2 (ja) | 2016-11-29 | 2016-11-29 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US10388592B2 (https=) |
| JP (1) | JP6808460B2 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10679924B2 (en) | 2018-03-05 | 2020-06-09 | Win Semiconductors Corp. | Semiconductor device with antenna integrated |
| JP2020155591A (ja) * | 2019-03-20 | 2020-09-24 | 株式会社東芝 | 半導体装置 |
| DE102019107760A1 (de) | 2019-03-26 | 2020-10-01 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur herstellung einer verbindungsstruktur und halbleiterbauelement |
| US11973006B2 (en) * | 2019-10-11 | 2024-04-30 | Semiconductor Components Industries, Llc | Self-aligned contact openings for backside through substrate vias |
| EP3813101B1 (en) * | 2019-10-25 | 2026-03-25 | ams AG | Method of producing a semiconductor body with a trench |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0222845A (ja) * | 1988-07-12 | 1990-01-25 | Toshiba Corp | 半導体装置の製造方法 |
| US5851603A (en) * | 1997-07-14 | 1998-12-22 | Vanguard International Semiconductor Corporation | Method for making a plasma-enhanced chemical vapor deposited SiO2 Si3 N4 multilayer passivation layer for semiconductor applications |
| JP3926083B2 (ja) * | 2000-03-07 | 2007-06-06 | 三菱電機株式会社 | 半導体装置、液晶表示装置、半導体装置の製造方法、液晶表示装置の製造方法 |
| DE10145724A1 (de) * | 2001-09-17 | 2003-04-10 | Infineon Technologies Ag | Verfahren zum Herstellen einer Halbleiterstruktur unter Verwendung einer Schutzschicht und Halbleiterstruktur |
| US20060290001A1 (en) * | 2005-06-28 | 2006-12-28 | Micron Technology, Inc. | Interconnect vias and associated methods of formation |
| JP4380718B2 (ja) | 2007-03-15 | 2009-12-09 | ソニー株式会社 | 半導体装置の製造方法 |
| JP5259197B2 (ja) | 2008-01-09 | 2013-08-07 | ソニー株式会社 | 半導体装置及びその製造方法 |
| JP2010161215A (ja) * | 2009-01-08 | 2010-07-22 | Sharp Corp | 半導体装置及びその製造方法 |
| JP5885904B2 (ja) | 2009-08-07 | 2016-03-16 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| US8525343B2 (en) * | 2010-09-28 | 2013-09-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device with through-silicon via (TSV) and method of forming the same |
| JP2012222141A (ja) | 2011-04-08 | 2012-11-12 | Elpida Memory Inc | 半導体チップ |
| US8816505B2 (en) * | 2011-07-29 | 2014-08-26 | Tessera, Inc. | Low stress vias |
| JP5984134B2 (ja) | 2012-05-15 | 2016-09-06 | ローム株式会社 | 半導体装置およびその製造方法、電子部品 |
| JP6309243B2 (ja) | 2013-10-30 | 2018-04-11 | ラピスセミコンダクタ株式会社 | 半導体装置およびその製造方法 |
| US9633930B2 (en) * | 2014-11-26 | 2017-04-25 | Kookmin University Industry Academy Cooperation Foundation | Method of forming through-hole in silicon substrate, method of forming electrical connection element penetrating silicon substrate and semiconductor device manufactured thereby |
| JP6335132B2 (ja) | 2015-03-13 | 2018-05-30 | 東芝メモリ株式会社 | 半導体装置、および、半導体装置の製造方法 |
| JP6682327B2 (ja) | 2016-04-01 | 2020-04-15 | キヤノン株式会社 | 電子デバイス、その製造方法及びカメラ |
| JP7009111B2 (ja) * | 2017-08-17 | 2022-01-25 | キヤノン株式会社 | 半導体装置及びその製造方法 |
-
2016
- 2016-11-29 JP JP2016231339A patent/JP6808460B2/ja active Active
-
2017
- 2017-11-01 US US15/800,567 patent/US10388592B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US10388592B2 (en) | 2019-08-20 |
| JP2018088487A (ja) | 2018-06-07 |
| US20180151475A1 (en) | 2018-05-31 |
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