JP6598166B2 - Phase change material and phase change type memory device - Google Patents

Phase change material and phase change type memory device Download PDF

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JP6598166B2
JP6598166B2 JP2017556030A JP2017556030A JP6598166B2 JP 6598166 B2 JP6598166 B2 JP 6598166B2 JP 2017556030 A JP2017556030 A JP 2017556030A JP 2017556030 A JP2017556030 A JP 2017556030A JP 6598166 B2 JP6598166 B2 JP 6598166B2
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祐司 須藤
祥吾 畑山
怜史 進藤
淳一 小池
雄太 齊藤
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • HELECTRICITY
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    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching

Description

本発明は、一般に、メモリ素子材料に適した相変化材料及びその材料を用いた相変化型メモリ素子に関し、特に、相変化に要する駆動エネルギーを低減することが可能な相変化材料、およびその材料を用いた相変化型メモリ素子に関する。   The present invention generally relates to a phase change material suitable for a memory element material and a phase change memory element using the material, and more particularly to a phase change material capable of reducing drive energy required for a phase change, and the material. The present invention relates to a phase change type memory device using the above.

近年、電子機器の急速な市場拡大に伴い、既存不揮発性Flashメモリの性能向上が要求されており、Flashメモリの性能を大きく上回る次世代型の不揮発性メモリの開発が盛んに行われている。次世代不揮発性メモリとして、磁気抵抗メモリ(MRAM:agnetoresistive andom ccess emory)、強誘電体メモリ(FeRAM:Ferroelectric andom ccess emory)、相変化型メモリ(PCRAM:hase hange andom ccess emory)、抵抗変化型メモリ(ReRAM:Resistive andom ccess emory)などが盛んに研究開発されている。中でも、PCRAMは、単純なメモリセル構造を有するため、製造コストの他、集積度の面においても他のメモリに比し優れている。In recent years, with the rapid market expansion of electronic devices, there is a demand for improving the performance of existing nonvolatile flash memories, and the development of next-generation nonvolatile memories that greatly exceed the performance of flash memories has been actively conducted. As a next-generation nonvolatile memory, magnetoresistive memory (MRAM: M agnetoresistive R andom A ccess M emory), ferroelectric memory (FeRAM: Fe rroelectric R andom A ccess M emory), phase-change memory (PCRAM: P hase C hange R andom a ccess M emory) , resistance-change memory (ReRAM: Re sistive R andom a ccess M emory) and the like have been researched and developed actively. In particular, since PCRAM has a simple memory cell structure, it is superior to other memories in terms of integration as well as manufacturing cost.

PCRAMの情報記録層には相変化材料が用いられており、相変化材料のアモルファス相と結晶相間の相変化に伴う電気抵抗変化を利用して、情報を記録する。   A phase change material is used for the information recording layer of the PCRAM, and information is recorded by utilizing a change in electrical resistance accompanying a phase change between the amorphous phase and the crystal phase of the phase change material.

アモルファス相状態の相変化材料は、結晶化温度Tc以上へ加熱することにより結晶相状態へと変化し、また、結晶相状態の相変化材料は、結晶化温度Tcよりも高い融点Tm以上へ加熱後、急冷することによりアモルファス相状態へ変化する。   The phase change material in the amorphous phase state is changed to the crystal phase state by heating to a temperature higher than the crystallization temperature Tc, and the phase change material in the crystal phase state is heated to the melting point Tm higher than the crystallization temperature Tc. Then, it changes to an amorphous phase state by rapid cooling.

相変化材料のアモルファス相と結晶相間の相変化には、電気パルスによるジュール熱を利用し、例えば、融点Tm以上にジュール加熱してその後急冷しアモルファス相とすることによりリセット状態[0]とし、結晶化温度Tc以上かつ融点Tm未満にジュール加熱して結晶相とすることによりセット状態[1]として情報を記録する。   For the phase change between the amorphous phase and the crystalline phase of the phase change material, Joule heat by an electric pulse is used, for example, Joule heating to a melting point Tm or higher, followed by rapid cooling to an amorphous phase to obtain a reset state [0], Information is recorded as a set state [1] by heating to a crystal phase by Joule heating above the crystallization temperature Tc and below the melting point Tm.

現在、PCRAM用相変化材料としては、DVD−RAMに用いられているGeSbTe(GST)が広く検討されている(例えば非特許文献1、2参照)。Currently, Ge 2 Sb 2 Te 5 (GST) used for DVD-RAM is widely studied as a phase change material for PCRAM (see, for example, Non-Patent Documents 1 and 2).

一方で、更なるPCRAMの微細化による大容量化と共に、作動保障温度の向上(高温データ保持性の改善)やデータ書換えに伴う消費電力の低減が求められている。   On the other hand, along with further increase in capacity due to further miniaturization of PCRAM, there is a demand for improvement of operation guarantee temperature (improvement of high temperature data retention) and reduction of power consumption accompanying data rewriting.

特許文献1では、GeSbTe化合物を相変化材料として用いた不揮発性メモリが開示されている。しかしながら、非特許文献1に示されているように、GeSbTe化合物のアモルファス相の結晶化温度Tcは約150℃程度と低い。それ故、アモルファス相の熱的安定性が低く、高温データ保持性が脆弱であり得るため、作動保障温度が十分でない。   Patent Document 1 discloses a nonvolatile memory using a GeSbTe compound as a phase change material. However, as shown in Non-Patent Document 1, the crystallization temperature Tc of the amorphous phase of the GeSbTe compound is as low as about 150 ° C. Therefore, since the thermal stability of the amorphous phase is low and the high temperature data retention property may be fragile, the operation guarantee temperature is not sufficient.

高結晶化温度を有する相変化材料として、特許文献2にはSbとTeを主成分とし、追加元素として少なくとも1種類の元素を追加した相変化材料が開示されており、追加元素として、B、C、N、Ag、In、PおよびGeが記述されている。すなわち特許文献2には、SbとTeを主成分とし、追加元素として少なくとも1種の元素を追加した相変化材料において、160℃以上の結晶化温度および2.5eV以上の結晶化の活性化エネルギーが得られることが開示されている。特許文献2の実施例には、Sb75Te25合金に追加元素としてN、Ge、B、PおよびAgを含有した相変化材料が記述されている。しかしながら、特許文献2に記載の相変化材料は、光記録媒体用の相変化記録材料として開発されたものであり、アモルファス相と結晶相との電気抵抗に関する記述については一切ない。As a phase change material having a high crystallization temperature, Patent Document 2 discloses a phase change material in which Sb and Te are main components and at least one kind of element is added as an additional element. C, N, Ag, In, P and Ge are described. That is, Patent Document 2 discloses that a crystallization temperature of 160 ° C. or higher and a crystallization activation energy of 2.5 eV or higher in a phase change material containing Sb and Te as main components and at least one additional element as an additional element. Is disclosed. The example of Patent Document 2 describes a phase change material containing N, Ge, B, P, and Ag as additional elements in an Sb 75 Te 25 alloy. However, the phase change material described in Patent Document 2 has been developed as a phase change recording material for optical recording media, and there is no description regarding the electrical resistance between the amorphous phase and the crystalline phase.

また、上述したGeSbTe化合物をはじめとする既存の相変化材料は、結晶相の方がアモルファス相よりも電気抵抗が低い(通常、相変化材料では、結晶相はアモルファス相に比べて3桁以上電気抵抗が低い)。一般的に知られているように、ジュール発熱量Qは、Q=IRtで表される。ここで、Iは電流、Rは電気抵抗、tは時間である。従って、PCRAMメモリ素子を考えた場合、アモルファス相は高い電気抵抗を有するため、ジュール加熱により結晶化温度Tc以上へ加熱し結晶相へ相変化させる際の駆動電流は小さくて済む。それ故、アモルファス相状態から結晶相状態への書換え消費電力は小さい。一方で、結晶相をアモルファス相へ相変化させるためには結晶化温度Tcよりも高い温度である融点Tm以上に加熱しなければならず、また、結晶相は低い電気抵抗を有するため、融点Tm以上に加熱するために大きな駆動電流が必要であり消費電力が高くなってしまう欠点がある。In addition, existing phase change materials such as the GeSbTe compound described above have a lower electrical resistance in the crystalline phase than in the amorphous phase (usually, in the phase change material, the crystalline phase is more than three orders of magnitude more electrically than the amorphous phase. Low resistance). As is generally known, the Joule heating value Q is represented by Q = I 2 Rt. Here, I is current, R is electrical resistance, and t is time. Therefore, when considering the PCRAM memory element, since the amorphous phase has a high electric resistance, the drive current when the phase is changed to the crystalline phase by heating to the crystallization temperature Tc or higher by Joule heating can be small. Therefore, the power consumption for rewriting from the amorphous phase state to the crystalline phase state is small. On the other hand, in order to change the crystalline phase to the amorphous phase, it must be heated to a melting point Tm or higher, which is a temperature higher than the crystallization temperature Tc, and since the crystalline phase has a low electrical resistance, the melting point Tm There is a drawback that a large drive current is required for heating as described above, resulting in high power consumption.

特許文献3では、高温データ保持性およびデータ書換え消費電力を低減する相変化材料として、GeTe100−x−y(ここで式中、Mは、Al、Si、Cu、In及びSnからなる群から選択した1種類の元素を示し、xは5.0−50.0(at.%)、yは4.0−45.0(at.%)の範囲内で、40(at.%)≦x+y≦60(at.%)となるように選択されている)相変化材料およびそれを用いた相変化メモリ素子が開示されている。GeTe100−x−y相変化材料は、従来材よりも高い結晶化温度(Tc≧190℃)を有するため高温データ保持性に優れる。また、組成によっては510℃程度の低い融点Tmを持つため、相変化材料をアモルファス化するために過度の加熱が必要でなく、GeSbTe化合物(Tm≒620℃)といった従来相変化材料に比してデータ書換え消費電力の低減が可能である。しかしながら、GeSbTe化合物と同様に、結晶相の電気抵抗はアモルファス相のそれよりも3桁以上低く、依然として結晶相状態からアモルファス状態へ相変化させるために大きな駆動電流が必要であり、データ書換え消費電力の低減は十分であるとは言えない。In Patent Document 3, as the phase change material to reduce the high-temperature data retention and data rewriting power, Ge x M y Te 100- x-y ( wherein in the formula, M, Al, Si, Cu, an In and Sn 1 represents an element selected from the group consisting of: x is in the range of 5.0-50.0 (at.%), Y is in the range of 4.0-45.0 (at.%), And 40 (at ..)), and phase change memory elements using the same are disclosed. The phase change material is selected to satisfy:.%) ≦ x + y ≦ 60 (at.%). Ge x M y Te 100-x -y phase change material is excellent in high-temperature data retention because of its high crystallization temperature than conventional materials (Tc ≧ 190 ℃). In addition, since it has a low melting point Tm of about 510 ° C. depending on the composition, excessive heating is not necessary to make the phase change material amorphous, compared with a conventional phase change material such as a GeSbTe compound (Tm≈620 ° C.). Data rewriting power consumption can be reduced. However, like the GeSbTe compound, the electrical resistance of the crystalline phase is three orders of magnitude lower than that of the amorphous phase, and a large drive current is still required to change the phase from the crystalline phase to the amorphous state. This is not sufficient.

以上のように、既に提案されている相変化材料には、PCRAMメモリ素子の材料として要求される、1)高温データ保持能力が高いこと、さらに、2)データ書換え時の消費電力が小さいこと、を満足する、十分に実用化に耐えうる材料は存在しない。   As described above, the phase change material that has already been proposed is required as a material for the PCRAM memory element. 1) High-temperature data retention capability, and 2) Low power consumption during data rewriting, There is no material that satisfies the requirements and can be sufficiently put into practical use.

特許第3896576号公報Japanese Patent No. 3896576 特開2000−343830号公報JP 2000-343830 A 特許第5403565号公報Japanese Patent No. 5403565

N.Yamada et al.J.「Rapid−phase transitions of GeTe−Sb2Te3 pseudobinary amorphous thin films for an optical disk memory」Appl.Phys.69(5)(1991)p2849N. Yamada et al. J. et al. “Rapid-phase transitions of GeTe-Sb2Te3 pseudo-amorphous thin films for an optical disk memory” Appl. Phys. 69 (5) (1991) p2849 寺尾元康、「相変化メモリ−(PRAM)」応用物理第75巻第9号(2006)p1098Motoyasu Terao, “Phase Change Memory (PRAM)” Applied Physics Vol. 75, No. 9 (2006), p1098

本発明は、上述した従来型の相変化材料の問題点を改善する目的でなされたものであり、実用性に優れた相変化型メモリ素子を得るために適した新規組成を有する相変化材料、およびそれを用いた相変化型メモリ素子を提供することを課題とする。   The present invention was made for the purpose of improving the above-described problems of the conventional phase change material, and has a novel composition suitable for obtaining a phase change memory element excellent in practicality, It is another object of the present invention to provide a phase change memory device using the same.

PCRAMの高温データ保持性能の観点からは、相変化材料のアモルファス相の結晶化温度Tcが十分に高い必要がある。また、PCRAMのデータ書換え消費電力の観点からは、特に、融点Tm以上への加熱が必要となる「結晶相からアモルファス相への相変化」にかかる駆動エネルギー(駆動電流)を低減する事が重要である。先に示したQ=IRtの関係より、同じジュール発熱量Qを得ようとした場合、電気抵抗Rが高い方が少ない電流Iで済む。即ち、相変化型メモリ素子において、結晶相からアモルファス相への相変化にかかる駆動エネルギーを低減するためには、相変化材料の結晶相の電気抵抗が十分に高い必要がある。From the viewpoint of the high-temperature data retention performance of PCRAM, the crystallization temperature Tc of the amorphous phase of the phase change material needs to be sufficiently high. In addition, from the viewpoint of data rewriting power consumption of PCRAM, it is particularly important to reduce the driving energy (driving current) required for “phase change from crystalline phase to amorphous phase”, which requires heating to the melting point Tm or higher. It is. From the relationship of Q = I 2 Rt described above, when trying to obtain the same Joule heat generation amount Q, a smaller electric current I is required when the electric resistance R is higher. That is, in the phase change memory element, the electric resistance of the crystal phase of the phase change material needs to be sufficiently high in order to reduce the driving energy required for the phase change from the crystal phase to the amorphous phase.

しかしながら、上述したように、現在開発されている一般的な相変化材料では、アモルファス相の抵抗値が結晶相の抵抗値よりも大きく、また、データの読み取り精度を上げるためには、アモルファス相と結晶相間の電気抵抗比が10以上必要であるとも言われている。その結果、現在の相変化材料では、一般に結晶相の抵抗値が小さく、これが、PCRAMのデータ書換え消費電力の削減要求に対して大きなネックとなっている。However, as described above, in the general phase change material currently developed, the resistance value of the amorphous phase is larger than the resistance value of the crystal phase, and in order to increase the data reading accuracy, It is also said that an electric resistance ratio between crystal phases of 10 2 or more is necessary. As a result, in the current phase change material, the resistance value of the crystal phase is generally small, and this is a big bottleneck for the demand for reducing the data rewriting power consumption of PCRAM.

ところが、本発明者らが研究を進めた結果、結晶相の抵抗値がアモルファス相の抵抗値よりも大きい相変化材料があることを見出した。この、一般の相変化材料とは相間の抵抗値の大小関係が逆転している材料を利用することによって、PCRAMのデータ書換え消費電力の大幅な削減が可能となる。さらに本発明者らは、相変化材料それ自体で測定したアモルファス相と結晶相間の電気抵抗比がそれ程大きくなくても、該材料を用いて相変化型メモリ素子を形成した場合、アモルファス相と結晶相間の電気抵抗比が2桁、即ち10以上となり得ることを見出した。このことは、この相変化型メモリ素子がデータ読み取りに対して十分な信頼性を有しうることを示している。However, as a result of studies by the present inventors, it has been found that there are phase change materials in which the resistance value of the crystal phase is larger than the resistance value of the amorphous phase. By using a material in which the magnitude relation of the resistance value between phases is reversed from that of a general phase change material, it is possible to significantly reduce the data rewriting power consumption of the PCRAM. Furthermore, the present inventors have found that even when the electrical resistance ratio between the amorphous phase and the crystalline phase measured by the phase change material itself is not so large, when the phase change type memory element is formed using the material, the amorphous phase and the crystalline phase are formed. found that electrical resistance ratio of the interphase is obtained as two digits, i.e. 10 more. This indicates that the phase change memory element can have sufficient reliability for data reading.

上記の知見に基づいて鋭意研究の結果、本発明者らは、Cr、GeおよびTeを主成分とする材料においてアモルファス相が得られ、高い結晶化温度を有すると共に、結晶相の方がアモルファス相よりも高い電気抵抗を有することを見出した。   As a result of diligent research based on the above findings, the present inventors have obtained an amorphous phase in a material mainly composed of Cr, Ge and Te, have a high crystallization temperature, and the crystalline phase is more amorphous. It was found to have a higher electrical resistance.

従って、本発明の第一態様では、Cr、Ge及びTeを主成分とし、結晶相における抵抗値がアモルファス相における抵抗値よりも大きい、相変化材料を提供する。   Therefore, the first aspect of the present invention provides a phase change material having Cr, Ge, and Te as main components and having a resistance value in a crystalline phase larger than a resistance value in an amorphous phase.

上記第一態様において、Crを全体の15(at.%)以上含むようにしても良い。また、第一態様の相変化材料は、アモルファス相から結晶相に転移する結晶化温度が270℃以上であっても良い。さらに、N、O、Al、Si、CuおよびSbからなる群から選択した少なくとも1種類の元素を追加元素Mとして全体の0.01−5.0(at.%)含んでいても良い。   In the first aspect, 15% (at.%) Or more of Cr may be included. The phase change material according to the first aspect may have a crystallization temperature at which transition from the amorphous phase to the crystalline phase is 270 ° C. or higher. Further, at least one element selected from the group consisting of N, O, Al, Si, Cu, and Sb may be included as an additional element M in an amount of 0.01 to 5.0 (at.%) As a whole.

上記第一態様に係る相変化材料は、前記Cr、Ge、Te間には、一般化学式、
CrGeTe100−x−y
で示される関係が存在し、xは15.0−25.0(at.%)、yは15.0−25.0(at.%)の範囲内で、34.0(at.%)≦x+y≦48.0(at.%)となるように選択されていても良い。また、前記追加元素Mを、
(CrGeTe100−x−y100−z
の形で含み、ここでzは、0.01−5.0(at.%)となるように選択されていても良い。
The phase change material according to the first aspect has a general chemical formula between the Cr, Ge, and Te.
Cr x Ge y Te 100-xy
In the range of 15.0-25.0 (at.%), Y is in the range of 15.0-25.0 (at.%), And 34.0 (at.%). ≦ x + y ≦ 48.0 (at.%) May be selected. In addition, the additional element M is
M z (Cr x Ge y Te 100-xy ) 100-z
Where z may be selected to be 0.01-5.0 (at.%).

本発明の第二の態様では、基板と、前記基板上に第一の態様に係る相変化材料で形成されたメモリ層と、前記メモリ層に通電するための第1、第2の電極層を備える、相変化型メモリ素子が提供される。   In a second aspect of the present invention, a substrate, a memory layer formed of the phase change material according to the first aspect on the substrate, and first and second electrode layers for energizing the memory layer are provided. A phase change memory device is provided.

本発明に係る相変化材料では、結晶化温度が270℃以上と高い。従って、この材料のアモルファス相の熱的安定性は極めて高い。また、これらの材料では、結晶相の電気抵抗の方がアモルファス相の電気抵抗よりも高い。それ故、ジュール熱により結晶相からアモルファス相へ相変化させる際の消費電力が小さい。その結果、この材料を用いて実用性の高い相変化型メモリ素子を構成する事が可能となる。   In the phase change material according to the present invention, the crystallization temperature is as high as 270 ° C. or higher. Therefore, the thermal stability of the amorphous phase of this material is very high. In these materials, the electrical resistance of the crystal phase is higher than the electrical resistance of the amorphous phase. Therefore, the power consumption when changing the phase from the crystalline phase to the amorphous phase by Joule heat is small. As a result, it is possible to configure a highly practical phase change type memory element using this material.

本発明の種々の実施形態に係る相変化材料の組成とその物理特性を表にして示す図であり、Tcは結晶化温度、Ramoはアモルファス相の電気抵抗、Rcryは結晶相の電気抵抗、ΔRは、結晶相の電気抵抗をアモルファス相の電気抵抗で除した値を示す。FIG. 4 is a table showing the composition and physical characteristics of phase change materials according to various embodiments of the present invention, where Tc is the crystallization temperature, Ramo is the electrical resistance of the amorphous phase, Rcry is the electrical resistance of the crystal phase, and ΔR. Indicates a value obtained by dividing the electrical resistance of the crystal phase by the electrical resistance of the amorphous phase. 本発明の種々の実施形態に係る相変化材料薄膜の電気抵抗の温度依存性を示すグラフである。6 is a graph showing temperature dependence of electrical resistance of phase change material thin films according to various embodiments of the present invention. 図1に示す実施例10において得られたキッシンジャープロットを示すグラフである。It is a graph which shows the Kissinger plot obtained in Example 10 shown in FIG. 図3のグラフから求めた故障時間tと温度との関係を示すグラフである。Is a graph showing the relationship between the time to failure t F and temperature obtained from the graph of FIG. 実施例10の組成を有する材料に追加元素を添加した時の結晶化温度を表にして示す図である。It is a figure which shows the crystallization temperature when an additional element is added to the material which has a composition of Example 10 as a table | surface. 図1に示す実施例10について得られた、W電極/相変化材料間のコンタクト比抵抗に及ぼす熱処理温度の影響を示すグラフである。It is a graph which shows the influence of the heat processing temperature which it obtained about Example 10 shown in FIG. 1 and has on the contact specific resistance between W electrode / phase change material. 本発明の一実施形態に係る相変化型メモリ素子の概略断面図である。1 is a schematic cross-sectional view of a phase change memory device according to an embodiment of the present invention. 実施例10を用いて作製した図7に示すメモリ素子のメモリ動作を示すグラフである。10 is a graph showing a memory operation of the memory element shown in FIG. 7 manufactured using Example 10. 実施例10の試料の温度260℃及び290℃におけるTEM写真を示す。The TEM photograph in the temperature of 260 degreeC and 290 degreeC of the sample of Example 10 is shown. 実施例10の試料の温度350℃及び380℃におけるTEM写真を示す。The TEM photograph in the temperature of 350 degreeC and 380 degreeC of the sample of Example 10 is shown.

本発明者らは、高い結晶化温度が得られ、結晶相が高い電気抵抗を有する材料を追求すべく、種々の実験を行った結果、以下に示す特徴を有する材料において、本発明の目的を達成することができることを見出した。本発明者らが行った実験結果の一部を、後段で説明する図1に示している。なお、以下に示す実施形態では、相変化材料の結晶化温度Tcが270℃以上でかつ結晶相の電気抵抗がアモルファス相よりも高い材料を、本発明の目的を達成する相変化材料であるとした。   As a result of various experiments conducted by the inventors in pursuit of a material having a high crystallization temperature and a crystal phase having a high electric resistance, the object of the present invention is achieved in a material having the following characteristics. I found that I can achieve it. A part of the result of the experiment conducted by the present inventors is shown in FIG. 1 described later. In the embodiment described below, the phase change material having a crystallization temperature Tc of 270 ° C. or higher and an electric resistance of the crystal phase higher than that of the amorphous phase is a phase change material that achieves the object of the present invention. did.

この相変化材料は、図1に示すように、Cr、Ge、Teを主成分とし、結晶相の抵抗値がアモルファス相の抵抗値より高く、及び/または結晶化温度Tcが270℃より高い材料である。また、一般化学式、
CrGeTe100−x−y
で示される組成を有し、xは15.0−25.0(at.%)、yは15.0−25.0(at.%)の範囲内で、34.0(at.%)≦x+y≦48.0(at.%)となるように選択されていても良い。
As shown in FIG. 1, this phase change material is composed mainly of Cr, Ge, and Te, the resistance value of the crystal phase is higher than the resistance value of the amorphous phase, and / or the crystallization temperature Tc is higher than 270 ° C. It is. In addition, the general chemical formula,
Cr x Ge y Te 100-xy
And x is in the range of 15.0-25.0 (at.%), Y is in the range of 15.0-25.0 (at.%), And 34.0 (at.%). ≦ x + y ≦ 48.0 (at.%) May be selected.

Crを15.0(at.%)−25.0(at.%)とする理由は、15.0(at.%)未満では、結晶相の電気抵抗が低く、十分な消費電力低減効果が得られなくなり、25.0(at.%)を超えると、結晶化温度が低くなり、アモルファス相の熱的安定性が得られなくなるからである。Geを15.0(at.%)−25.0(at.%)とする理由は、15.0(at.%)未満では、アモルファス相の方が結晶相よりも高い電気抵抗比を有し、25.0(at.%)を超えると、結晶化温度が低くなり、また、アモルファス相の電気抵抗が結晶相に比して非常に大きくなってしまうからである。また、CrとGeの合計が34.0(at.%)−48.0(at.%)とする理由は、34.0(at.%)未満では、結晶相の電気抵抗が低く、十分な消費電力低減効果が得られなくなり、また、48.0(at.%)を超えると、結晶化温度が低くなり、また、結晶相の電気抵抗がアモルファス相に比して小さくなるからである。   The reason why Cr is 15.0 (at.%) To 25.0 (at.%) Is that if it is less than 15.0 (at.%), The electric resistance of the crystal phase is low, and a sufficient power consumption reduction effect is obtained. This is because if it is not obtained and exceeds 25.0 (at.%), The crystallization temperature becomes low and the thermal stability of the amorphous phase cannot be obtained. The reason why Ge is 15.0 (at.%) To 25.0 (at.%) Is that the amorphous phase has a higher electric resistance ratio than the crystalline phase if it is less than 15.0 (at.%). If it exceeds 25.0 (at.%), The crystallization temperature becomes low, and the electrical resistance of the amorphous phase becomes very large compared to the crystalline phase. Also, the reason why the total of Cr and Ge is 34.0 (at.%)-48.0 (at.%) Is that the electrical resistance of the crystal phase is sufficiently low if it is less than 34.0 (at.%). This is because the effect of reducing power consumption cannot be obtained, and if it exceeds 48.0 (at.%), The crystallization temperature is lowered, and the electrical resistance of the crystal phase is smaller than that of the amorphous phase. .

さらに追加元素として、N、O、Al、Si、CuおよびSbからなる群から選択した少なくとも1種類の元素Mを、
(CrGeTe100−x−y100−z
の形で含み、ここでzは、0.01−5.0(at.%)となるように選択してもよい。
Further, as an additional element, at least one element M selected from the group consisting of N, O, Al, Si, Cu, and Sb,
M z (Cr x Ge y Te 100-xy ) 100-z
Where z may be selected to be 0.01-5.0 (at.%).

N、O、Al、Si、CuおよびSbを0.01−5.0(at.%)追加することで結晶化温度を上昇させる事が可能である。0.01at.%未満では、結晶化温度を上昇させる効果が十分に発揮されず、5.0at.%を超えると、NおよびOの場合、Crを主成分とする窒化物や酸化物が形成されてしまい相変化を生じなくなり、また、Al、Si、CuおよびSbの場合、相変化に寄与しない化合物相が生成してしまい、アモルファス/結晶間の相変化の繰り返し特性に悪影響を及ぼすからである。   By adding 0.01-5.0 (at.%) Of N, O, Al, Si, Cu and Sb, the crystallization temperature can be increased. 0.01 at. If it is less than%, the effect of increasing the crystallization temperature is not sufficiently exhibited, and 5.0 at. If it exceeds 50%, in the case of N and O, a nitride or oxide containing Cr as a main component is formed and no phase change occurs, and in the case of Al, Si, Cu and Sb, it does not contribute to the phase change. This is because a compound phase is generated and adversely affects the repetitive characteristics of the phase change between amorphous and crystal.

本発明相変化材料を基板上に形成することにより、不揮発性相変化型メモリ素子が得られる。特に、前記不揮発性メモリ素子は、絶縁層と、絶縁層上に形成された相変化材料層を有し、該相変化材料層を挟んで、あるいはその両端に形成された電極層を含み、該相変化材料層の露出部が絶縁層により覆われていることが望ましい。電極層として、W、TiN、TiW、Al、Cuなどが挙げられる。   By forming the phase change material of the present invention on a substrate, a nonvolatile phase change memory element can be obtained. In particular, the nonvolatile memory element includes an insulating layer and a phase change material layer formed on the insulating layer, and includes an electrode layer sandwiched between or at both ends of the phase change material layer, Desirably, the exposed portion of the phase change material layer is covered with an insulating layer. Examples of the electrode layer include W, TiN, TiW, Al, and Cu.

本発明材料の製造方法としては、CrGeTe100−x−y(x:15.0−25.0(at.%)、y:15.0−25.0(at.%)、34.0(at.%)≦x+y≦48.0(at.%))となる組成範囲内で各種ターゲットを用いた物理蒸着法(スパッタリング等)により各種基板上に成膜する。ターゲットには、純Cr、純Ge、純Teあるいは各2元合金(Cr−Ge、Cr−Te、Ge−Te合金)を用いた多元スパッタリングにより成膜出力を変化させ濃度を調整し成膜する、あるいは予め成分調整した3元合金ターゲット(Cr−Ge−Te合金)を用いて成膜する。また、必要に応じて、Al、Si、CuおよびSbから選択した1種又は2種以上の各種純ターゲットを用いた多元スパッタリング、あるいは予め成分調整した合金ターゲットを用いて、適宜成膜出力を調整することにより成分調整し成膜する。また、NおよびOの追加については、Nガス、OガスあるいはN/O混合ガス流量を調節しながら反応性物理蒸着を行い成膜する事ができる。ここで、成膜時における基板温度は必要に応じて室温−500℃まで変える事ができる。基板温度が作製する材料の結晶化温度よりも低い場合は、材料はアモルファス相を呈し、基板温度が結晶化温度よりも高い場合は、材料は結晶相を呈する。The production method of the present invention materials, Cr x Ge y Te 100- x-y (x:. 15.0-25.0 (at%), y:. 15.0-25.0 (at%), 34.0 (at.%) ≦ x + y ≦ 48.0 (at.%)), A film is formed on various substrates by physical vapor deposition (sputtering or the like) using various targets. The target is formed by changing the film formation output and adjusting the concentration by multi-source sputtering using pure Cr, pure Ge, pure Te or each binary alloy (Cr—Ge, Cr—Te, Ge—Te alloy). Alternatively, a film is formed using a ternary alloy target (Cr—Ge—Te alloy) whose components are adjusted in advance. Also, if necessary, the film deposition output is adjusted as appropriate using multi-source sputtering using one or more pure targets selected from Al, Si, Cu and Sb, or an alloy target whose components have been adjusted in advance. Thus, the components are adjusted to form a film. As for the addition of N and O, the film can be formed by reactive physical vapor deposition while adjusting the flow rate of N 2 gas, O 2 gas or N 2 / O 2 mixed gas. Here, the substrate temperature during film formation can be changed from room temperature to 500 ° C. as required. When the substrate temperature is lower than the crystallization temperature of the material to be manufactured, the material exhibits an amorphous phase, and when the substrate temperature is higher than the crystallization temperature, the material exhibits a crystalline phase.

図1は、本発明の種々の実施例に係る相変化材料の物理特性の実測値を表にして示す図である。以下に図1を参照しながら本発明をさらに詳細に説明する。なお、図1では、本発明の理解を容易にするために、本発明の範囲とは異なる組成を有する比較例1−11を示してある。図の実施例1−12に示す材料は、基本的に、CrGeTe100−x−yの組成を有する。ここで、34.0(at.%)≦x+y≦48.0(at.%)である。図1の表では、Cr、GeおよびTeの原子濃度(at.%)を示しているが、この中には、成膜原料中に不可避的に含まれる不純物も含まれている。通常、このような不可避的不純物は数ppmから数十ppmのオーダーであり、従って成膜後の相変化材料の物理特性に対して大きな影響を与えるものではない。FIG. 1 is a table showing measured values of physical properties of phase change materials according to various embodiments of the present invention. Hereinafter, the present invention will be described in more detail with reference to FIG. In addition, in FIG. 1, in order to make an understanding of this invention easy, the comparative example 1-11 which has a composition different from the range of this invention is shown. The material shown in Example 1-12 in the figure basically has a composition of Cr x Ge y Te 100-xy . Here, 34.0 (at.%) ≦ x + y ≦ 48.0 (at.%). In the table of FIG. 1, atomic concentrations (at.%) Of Cr, Ge, and Te are shown, but this includes impurities inevitably contained in the film forming raw material. Usually, such inevitable impurities are on the order of several ppm to several tens of ppm, and therefore do not have a great influence on the physical properties of the phase change material after film formation.

物理特性を測定する試料は、実施例1−12、比較例1−11の組成を有する薄膜を、RFスパッタリング装置を用いて基板上に200nm成膜して形成した。ターゲットは純元素Cr、Ge、Teを用い、各ターゲットの成膜出力を変え、各種組成のアモルファス相薄膜を作成した。   As a sample for measuring physical properties, a thin film having the composition of Example 1-12 and Comparative Example 1-11 was formed to a thickness of 200 nm on a substrate using an RF sputtering apparatus. Pure elements Cr, Ge, and Te were used as targets, and the film formation output of each target was changed to prepare amorphous phase thin films having various compositions.

図1に各組成を有する材料の、結晶化温度Tc(℃)、アモルファス相の電気抵抗Ramo(Ω)、結晶相の電気抵抗Rcry(Ω)、結晶相とアモルファス相の電気抵抗比ΔRを示した。ここで、Ramoは、二端子法において、60℃まで加熱した時のアモルファス相の電気抵抗値とした。また、昇温し結晶化した後の試料を冷却し、60℃になった時の結晶相の電気抵抗値をRcryと定義した。また、電気抵抗比ΔRは、「アモルファス相の60℃での電気抵抗値」と「結晶相の60℃での電気抵抗値」の比とした。   FIG. 1 shows the crystallization temperature Tc (° C.), the amorphous phase electrical resistance Ramo (Ω), the crystalline phase electrical resistance Rcry (Ω), and the electrical resistance ratio ΔR between the crystalline phase and the amorphous phase of the material having each composition. It was. Here, Ramo was the electrical resistance value of the amorphous phase when heated to 60 ° C. in the two-terminal method. Further, the sample after the temperature was raised and crystallized was cooled, and the electric resistance value of the crystal phase when the temperature reached 60 ° C. was defined as Rcry. The electric resistance ratio ΔR was a ratio of “the electric resistance value of the amorphous phase at 60 ° C.” and “the electric resistance value of the crystal phase at 60 ° C.”.

図2に、二端子法を用いた昇温過程での電気抵抗測定(昇温速度:9.2℃/分)において得られた電気抵抗‐温度曲線の例を示す。図2の曲線AおよびBに実施例2および実施例10の試料、また、曲線CおよびDに比較例1および比較例6の試料について得られた昇温時における電気抵抗変化を示した。実施例10の試料の挙動について説明する。アモルファス相は低い電気抵抗を示し、温度上昇に伴って電気抵抗は緩やかに減少していき、250℃−290℃の間で大きく電気抵抗が低下する。この時、温度に対する電気抵抗変化が最も大きい温度を結晶化温度Tcと定義できる。その後、電気抵抗は上昇し、降温過程においては半導体的な電気抵抗の温度依存性を示しながら電気抵抗が上昇していく。実施例2も同様な挙動を示す。   FIG. 2 shows an example of an electrical resistance-temperature curve obtained in electrical resistance measurement (temperature increase rate: 9.2 ° C./min) during the temperature increase process using the two-terminal method. Curves A and B in FIG. 2 show changes in electrical resistance at the time of temperature increase obtained for the samples of Example 2 and Example 10 and curves C and D for the samples of Comparative Example 1 and Comparative Example 6. The behavior of the sample of Example 10 will be described. The amorphous phase exhibits a low electric resistance, and the electric resistance gradually decreases as the temperature rises, and the electric resistance greatly decreases between 250 ° C. and 290 ° C. At this time, the temperature at which the electrical resistance change with respect to the temperature is the largest can be defined as the crystallization temperature Tc. Thereafter, the electrical resistance rises, and the electrical resistance rises while showing the temperature dependence of the semiconductor electrical resistance in the temperature lowering process. Example 2 shows a similar behavior.

図1に示すように、実施例1−12の相変化材料は、いずれも270℃以上の結晶化温度を有し、アモルファス相の熱的安定性が高い事が理解される。   As shown in FIG. 1, it is understood that all of the phase change materials of Examples 1-12 have a crystallization temperature of 270 ° C. or higher, and the thermal stability of the amorphous phase is high.

また、図1のΔRに示すように、実施例1−12の試料はいずれもΔR>1を有し、結晶相の方がアモルファス相よりも高い電気抵抗を有する事が分かる。ここで、ΔRが1より大きくなる、即ち、結晶相の方が電気抵抗が高くなる原因として、本発明材料の結晶相が半導体的性質を有している事が挙げられる。この事は、図1の実施例2および10で示すように、材料を結晶化後、冷却すると電気抵抗が上昇する事から理解できる。つまり、本発明材料の結晶相は、アモルファス相(半導体的性質)よりも高い電気抵抗を有する半導体に結晶化するためΔRが1よりも多くなると考えられる。   Further, as shown by ΔR in FIG. 1, all of the samples of Example 1-12 have ΔR> 1, and it can be seen that the crystal phase has higher electrical resistance than the amorphous phase. Here, the reason why ΔR is larger than 1, that is, the electrical resistance of the crystalline phase is higher is that the crystalline phase of the material of the present invention has semiconducting properties. This can be understood from the fact that the electrical resistance increases when the material is cooled after crystallization, as shown in Examples 2 and 10 of FIG. That is, the crystal phase of the material of the present invention is crystallized into a semiconductor having a higher electric resistance than the amorphous phase (semiconductor property), so that ΔR is considered to be larger than 1.

一方、比較例1−11について見ると、結晶化温度は比較的高いものの、結晶化に伴い電気抵抗は急峻に低下する事が分かる(図2:曲線CおよびD)。また、図1より、ΔR<1であり、いずれの比較例もアモルファス相の方が結晶相よりも高い電気抵抗を有する。図1の比較例1に示すように、Ge−Teといった従来の相変化材料の結晶相は、冷却に伴い電気抵抗は低下する傾向を示し、金属的な振る舞いをしている事が分かる。即ち、従来の相変化材料では、半導体的性質を示すアモルファス相から金属的性質を示す結晶相へと転移することにより電気抵抗が劇的に低下する。また、比較例2〜11に示すCr−Ge−Teからなる材料についても、従来の相変化材料と同様に、結晶相の電気抵抗が低いことから、データ書き換え時の消費電力を低減する効果に乏しい。   On the other hand, in Comparative Example 1-11, although the crystallization temperature is relatively high, it can be seen that the electrical resistance sharply decreases with crystallization (FIG. 2: curves C and D). Further, from FIG. 1, ΔR <1, and in any of the comparative examples, the amorphous phase has higher electrical resistance than the crystalline phase. As shown in Comparative Example 1 of FIG. 1, it can be seen that the crystal phase of a conventional phase change material such as Ge-Te tends to decrease in electrical resistance with cooling and behaves like a metal. That is, in the conventional phase change material, the electrical resistance is drastically lowered by transition from an amorphous phase exhibiting semiconducting properties to a crystalline phase exhibiting metallic properties. In addition, the material made of Cr—Ge—Te shown in Comparative Examples 2 to 11 also has the effect of reducing power consumption during data rewriting because the electrical resistance of the crystal phase is low as in the case of the conventional phase change material. poor.

次に、実施例10について、アモルファスが結晶化する際の活性化エネルギーを、昇温速度を変化(9℃/分−50℃/分)させて測定した結晶化温度から、次に示すキッシンジャープロット法により求めた。
ln(α/(Tc))=−Ea/kTp+Const.
ここでα:昇温速度、Tp:熱流ピーク温度、Ea:活性化エネルギー、k:ボルツマン定数である。
Next, the Kissinger plot shown below from the crystallization temperature obtained by measuring the activation energy for crystallization of Example 10 while changing the heating rate (9 ° C./min−50° C./min). Obtained by law.
ln (α / (Tc) 2 ) = − Ea / kTp + Const.
Here, α: temperature rising rate, Tp: heat flow peak temperature, Ea: activation energy, k: Boltzmann constant.

図3は実施例10について、キッシンジャープロットを行った結果を示すものであり、本結果から結晶化の活性化エネルギーは3.8eVと大きな値を示し、活性化エネルギーの観点からも、優れたアモルファス相の熱的安定性を有していることが確認される。   FIG. 3 shows the result of Kissinger plot for Example 10. From this result, the activation energy for crystallization shows a large value of 3.8 eV, and from the viewpoint of activation energy, excellent amorphous It is confirmed that the phase has thermal stability.

通常、アモルファス相は、結晶化温度Tc以下においても、長時間保持することにより結晶化する。相変化材料における結晶化温度Tc以下でのアモルファス相の結晶化は、PCRAMデバイスの故障を意味する。将来的には、自動車分野など高温環境下での使用を目論み、PCRAMデバイスの作動保証温度は125℃で10年以上とされている。そこで、実施例10について結晶化の活性化エネルギーと結晶化温度から、次式に示すOzawa法により、故障時間を10年間とした時の作動可能温度(言い換えれば、10年間での最大作動保証温度)を求めた。ここで、本実験では、アモルファス相がある温度にて10%結晶化してしまった時間を故障時間とした。
=θnexp(Ea/RTi)
θn=(Ea/αR)p(Ea/RT10%
ここでt:故障時間、Ea:活性化エネルギー、Ti:故障時間における温度、α:昇温速度、R:気体定数、T10%:ある昇温速度において10%結晶化する時の温度である。また、p(Ea/RT10%)関数は次式で示される。
logp(Ea/RT10%)=−2.315-0.4567(Ea/RT10%
Usually, the amorphous phase is crystallized by holding it for a long time even at a temperature below the crystallization temperature Tc. Crystallization of the amorphous phase below the crystallization temperature Tc in the phase change material means failure of the PCRAM device. In the future, it is intended to be used in a high temperature environment such as the automobile field, and the guaranteed operation temperature of the PCRAM device is 125 ° C. and more than 10 years. Therefore, the working temperature when the failure time is 10 years (in other words, the maximum guaranteed operating temperature in 10 years) from the activation energy and crystallization temperature of Example 10 according to the Ozawa method shown in the following formula. ) Here, in this experiment, the time during which the amorphous phase was crystallized at a certain temperature by 10% was defined as the failure time.
t F = θnexp (Ea / RTi)
θn = (Ea / αR) p (Ea / RT 10% )
Where t F : failure time, Ea: activation energy, Ti: temperature at failure time, α: heating rate, R: gas constant, T 10% : temperature at which 10% crystallization occurs at a certain heating rate is there. The p (Ea / RT 10% ) function is represented by the following equation.
logp (Ea / RT 10% ) = -2.315-0.4567 (Ea / RT 10% )

図4は実施例10についてOzawa法を用いた結果を示すものであり、縦軸は故障時間、横軸は1/kTを示している。ここで、kはボルツマン定数、Tは温度である。この図より、各結晶化温度でのデータ点を10年まで外挿し、その時の温度を見積もる事で、作動保証温度を評価することができる。本結果より、実施例10の試料は、約190℃の作動保証温度を有することが分かる。この温度は、2011年以降の作動保証温度の要求値である、125℃で10年という値を超えており、本試料が熱的安定性にも優れている事が分かる。   FIG. 4 shows the result of using the Ozawa method for Example 10, where the vertical axis indicates the failure time and the horizontal axis indicates 1 / kT. Here, k is Boltzmann's constant and T is temperature. From this figure, the guaranteed operating temperature can be evaluated by extrapolating the data points at each crystallization temperature up to 10 years and estimating the temperature at that time. From this result, it can be seen that the sample of Example 10 has an operation guarantee temperature of about 190 ° C. This temperature exceeds the value of 10 years at 125 ° C., which is the required value of the operation guarantee temperature after 2011, and it can be seen that this sample is also excellent in thermal stability.

図5には、実施例10(結晶化温度:270℃)の試料に追加元素を添加した時の結晶化温度を示した。この場合、追加元素Mは、
(CrGeTe100−x−y100−z
の形で含まれ、zは、0.01−5.0(at.%)となるように選択される。例えば実施例13は、図1に示す実施例10の材料にNを、zが2.0(at.%)となるように添加した材料を示す。実施例14−実施例20も同様に、実施例10の材料に、図示の追加元素Mを図示の濃度だけ添加した材料を示す。図5から明らかなように、N、O、Al、Si、CuおよびSbのいずれか一種以上の元素を実施例10の材料に添加する事により、結晶化温度が上昇する事が分かる。なお、その他の実施例材1−9、11及び12については実験を行っていないが、実施例10の場合と同様の傾向があるとの蓋然的な推測が可能である。従って、本発明の材料に、必要に応じて追加元素を添加することで、アモルファス相の熱的安定性を高める事が可能となる。
FIG. 5 shows the crystallization temperature when an additional element was added to the sample of Example 10 (crystallization temperature: 270 ° C.). In this case, the additional element M is
M z (Cr x Ge y Te 100-xy ) 100-z
And z is selected to be 0.01-5.0 (at.%). For example, Example 13 shows a material obtained by adding N to the material of Example 10 shown in FIG. 1 so that z becomes 2.0 (at.%). Similarly, Example 14 to Example 20 show a material obtained by adding the illustrated additional element M to the material of Example 10 in the concentration shown in the drawing. As is clear from FIG. 5, it can be seen that the crystallization temperature is increased by adding one or more elements of N, O, Al, Si, Cu and Sb to the material of Example 10. In addition, although it did not experiment about the other Example materials 1-9, 11, and 12, it is possible to estimate that there is a tendency similar to the case of Example 10. Therefore, it is possible to increase the thermal stability of the amorphous phase by adding additional elements to the material of the present invention as necessary.

続いて、本発明相変化材料を用いたメモリ特性について行った実施例について説明する。通常、相変化型メモリは、電極を通して電気パルスを印加し、相変化材料をジュール加熱して相変化させる。また、その相変化により得られる電気抵抗比が大きければ大きいほど、データの読み取り精度は向上する。近年、メモリの高集積化に伴い、メモリセル構造の微細化が重要になっているが、微細化に伴ってメモリデバイスの全電気抵抗は、相変化材料それ自体の電気抵抗値ではなく、電極/相変化材料間のコンタクト抵抗値によって支配される。そこで、実施例10について、CTLM法を用いて電極としてWを用い、W/相変化材料のコンタクト比抵抗を測定した。(なお、CTLM法については、例えば、E.K.Chua et al.Appl.Phys.Lett.101(2012)012107参照。)   Subsequently, examples of the memory characteristics using the phase change material of the present invention will be described. In general, a phase change memory applies an electric pulse through an electrode and joule heats the phase change material to change the phase. In addition, the larger the electrical resistance ratio obtained by the phase change, the higher the data reading accuracy. In recent years, miniaturization of memory cell structures has become important with the high integration of memories, but with miniaturization, the total electrical resistance of memory devices is not the electrical resistance value of the phase change material itself, but the electrode / Dominated by contact resistance between phase change materials. Therefore, for Example 10, W was used as an electrode using the CTLM method, and the contact specific resistance of the W / phase change material was measured. (For the CTLM method, see, for example, EK Chua et al. Appl. Phys. Lett. 101 (2012) 012107.)

図6は実施例10について、CTLM法によりコンタクト比抵抗を測定した結果を示す図である。縦軸はコンタクト比抵抗、横軸は試料の加熱温度を表している。図示するように、150℃、270℃、290℃、350℃、380℃の5種類の温度を選択し、試料をそれぞれの温度まで加熱した後、室温においてコンタクト比抵抗を測定した。本結果より、結晶化が進行するに伴ってコンタクト比抵抗値は上昇し、380℃まで加熱した試料では、150℃まで加熱した試料に対し二桁以上の抵抗比が得られることが分かる。このことは、実用相変化型メモリとして十分なデータ読み取り信頼性が得られることを示している。   FIG. 6 is a diagram showing the results of measuring the contact specific resistance of Example 10 by the CTLM method. The vertical axis represents the contact specific resistance, and the horizontal axis represents the heating temperature of the sample. As shown in the figure, five types of temperatures of 150 ° C., 270 ° C., 290 ° C., 350 ° C., and 380 ° C. were selected, and after heating the sample to each temperature, the contact specific resistance was measured at room temperature. From this result, it can be seen that as the crystallization progresses, the contact specific resistance value increases, and in the sample heated to 380 ° C., a resistance ratio of two digits or more is obtained compared to the sample heated to 150 ° C. This indicates that sufficient data reading reliability can be obtained as a practical phase change memory.

続いて、実施例10に示す試料を用いて、図7に示すメモリセルを作製し、パルス電圧印加によるメモリスイッチング動作を調査した。ここで、図7は、本実験にて用いた相変化型不揮発性メモリセル構造の断面図を示している。図において、1はSiO/Si基板、2は基板1上に形成した下部電極層、3は図1に示す実施例10の材料で形成された相変化材料層、4は相変化材料層3の表面の一部を被覆するSiO層、5は相変化材料層3に接触してSiO層4上に形成された上部電極層、を示している。なお、上下の電極層2、5は、本実験ではWによって形成した。Subsequently, the memory cell shown in FIG. 7 was manufactured using the sample shown in Example 10, and the memory switching operation by applying the pulse voltage was investigated. Here, FIG. 7 shows a cross-sectional view of the phase change nonvolatile memory cell structure used in this experiment. In the figure, 1 is a SiO 2 / Si substrate, 2 is a lower electrode layer formed on the substrate 1, 3 is a phase change material layer formed of the material of Example 10 shown in FIG. 1, and 4 is a phase change material layer 3. SiO 2 layer 5 covering a part of the surface of the upper electrode layer 5 is an upper electrode layer formed on the SiO 2 layer 4 in contact with the phase change material layer 3. Note that the upper and lower electrode layers 2 and 5 were made of W in this experiment.

図8は、作製したメモリデバイスに対して、パルス電圧を印加した時の電気抵抗変化を示すものである。初期状態は、低い電気抵抗を示すアモルファス状態であり、その抵抗値は、2.1×10Ωであった。そこに、パルス幅20nsで0.4Vの電圧を印加した所、結晶化が生じ、1.4×10Ωへと電気抵抗が増加した。0.4V以上の電圧を印加しても高い電気抵抗状態を維持するが、パルス幅20nsで1.5Vの電圧を印加した所、アモルファス化が生じ、電気抵抗が5.5×10Ωへと減少する事が分かった。この値は初期状態とほぼ同様の値である。このことから、本発明材料は、電気パルスを用いたジュール加熱により、情報の書き込み・消去が可能である事が確認された。FIG. 8 shows changes in electrical resistance when a pulse voltage is applied to the manufactured memory device. The initial state was an amorphous state showing a low electric resistance, and the resistance value was 2.1 × 10 5 Ω. When a voltage of 0.4 V was applied thereto with a pulse width of 20 ns, crystallization occurred, and the electrical resistance increased to 1.4 × 10 8 Ω. Even if a voltage of 0.4 V or more is applied, the high electric resistance state is maintained, but when a voltage of 1.5 V is applied with a pulse width of 20 ns, amorphization occurs and the electric resistance is reduced to 5.5 × 10 5 Ω. It turned out to decrease. This value is almost the same value as in the initial state. From this, it was confirmed that the material of the present invention can write and erase information by Joule heating using electric pulses.

図9および図10の(a)−(d')に、実施例10の試料を複数の温度に加熱して撮ったTEM(透過型電子顕微鏡)写真を示す。これらのTEM写真は、実施例10の試料が温度によってアモルファス相から結晶相へと変化していることを示すものである。図9の(a)は、結晶化温度Tc(270℃)の直前である260℃で撮ったTEM写真であり、試料がアモルファス相を示していることが分かる。(b)は、結晶化温度Tcの直後である290℃で撮ったTEM写真であり、(b)の拡大図である(b’)から明らかなように、この温度では実施例10の試料はアモルファス相から結晶相へと変化していることが分かる。図10の(c)は、実施例10の試料をさらに高い温度350℃まで加熱した状態のTEM写真、(c’)はその拡大図である。(d)は、実施例10の試料を温度380℃まで加熱した状態のTEM写真、(d’)はその拡大図である。図(b’)、(c’)および(d’)より明らかなように、試料10を結晶化温度Tcを超えてさらに加熱していくと、温度上昇と共に結晶粒が粗大化していくことが分かる。実施例10の材料は、結晶相において電気抵抗が上昇するという稀な挙動を示すが、その特異な挙動を示す温度域においても、組織的には通常の結晶粒粗大化が生じていることが分かる。   FIGS. 9 and 10 (a) to (d ′) show TEM (transmission electron microscope) photographs taken by heating the sample of Example 10 to a plurality of temperatures. These TEM photographs show that the sample of Example 10 changes from an amorphous phase to a crystalline phase with temperature. FIG. 9A is a TEM photograph taken at 260 ° C. just before the crystallization temperature Tc (270 ° C.), and it can be seen that the sample shows an amorphous phase. (B) is a TEM photograph taken at 290 ° C. immediately after the crystallization temperature Tc, and as is clear from the enlarged view (b ′) of (b), at this temperature, the sample of Example 10 is It turns out that it has changed from the amorphous phase to the crystalline phase. (C) of FIG. 10 is a TEM photograph in which the sample of Example 10 is heated to a higher temperature of 350 ° C., and (c ′) is an enlarged view thereof. (D) is a TEM photograph of the sample of Example 10 heated to a temperature of 380 ° C., and (d ′) is an enlarged view thereof. As is clear from FIGS. (B ′), (c ′) and (d ′), when the sample 10 is further heated beyond the crystallization temperature Tc, the crystal grains become coarser as the temperature rises. I understand. The material of Example 10 shows a rare behavior in which the electrical resistance increases in the crystal phase. However, even in the temperature range where the unique behavior is observed, normal grain coarsening occurs structurally. I understand.

本発明の相変化材料は、高い結晶化温度を有し、アモルファス相より高い電気抵抗を有する結晶相が得られるという効果を有する。従って、該相変化材料を用いる事により、高温データ保持性や低消費電力を有する不揮発性半導体メモリに利用する事ができる。また、半導体メモリのみならず、GSTと同様、結晶相およびアモルファス相におけるレーザー光の反射率を利用したDVD−RAM等の光記録媒体などに使用する事ができる。本発明は、前記の実施例によってなんら限定されるものではない。すなわち、本発明の技術思想の範囲における他の例、態様等を当然含むものである。   The phase change material of the present invention has an effect that a crystal phase having a high crystallization temperature and an electric resistance higher than that of an amorphous phase can be obtained. Therefore, by using the phase change material, it can be used for a nonvolatile semiconductor memory having high temperature data retention and low power consumption. Further, it can be used not only for a semiconductor memory but also for an optical recording medium such as a DVD-RAM using the reflectance of laser light in a crystalline phase and an amorphous phase as in GST. The present invention is not limited to the above-described embodiments. That is, other examples, aspects, and the like within the scope of the technical idea of the present invention are naturally included.

1 SiO/Si基板
2 W下部電極層
3 相変化材料層
4 SiO誘電体層
5 W上部電極層
1 SiO 2 / Si substrate 2 W lower electrode layer 3 Phase change material layer 4 SiO 2 dielectric layer 5 W upper electrode layer

Claims (4)

Cr、Ge及びTeを主成分とし、結晶相における抵抗値がアモルファス相における抵抗値よりも大きく、前記Cr、Ge、Te間には、一般化学式、
CrxGeyTe100−x−y
で示される関係が存在し、xは15.0−25.0(at.%)、yは15.0−25.0(at.%)の範囲内で、34.0(at.%)≦x+y≦48.0(at.%)となるように選択されている、相変化材料。
The main component is Cr, Ge, and Te, and the resistance value in the crystal phase is larger than the resistance value in the amorphous phase .
CrxGeyTe100-xy
In the range of 15.0-25.0 (at.%), Y is in the range of 15.0-25.0 (at.%), And 34.0 (at.%). Phase change material selected to satisfy ≦ x + y ≦ 48.0 (at.%) .
請求項に記載の相変化材料であって、アモルファス相から結晶相に転移する結晶化温度が270℃以上である、相変化材料。 The phase change material according to claim 1 , wherein the crystallization temperature at which the amorphous phase transitions to the crystalline phase is 270 ° C. or higher. 請求項1又は2に記載の相変化材料であって、N、O、Al、Si、CuおよびSbからなる群から選択した少なくとも1種類の元素を追加元素Mとして全体の0.01−5.0(at.%)含む、相変化材料。 3. The phase change material according to claim 1, wherein at least one element selected from the group consisting of N, O, Al, Si, Cu, and Sb is added as an additional element M for a total 0.01-5. Phase change material containing 0 (at.%). 基板と、前記基板の上部に請求項1乃至の何れか1項に記載の相変化材料で形成したメモリ層と、前記メモリ層に通電するための第1、第2の電極層と、を備える、相変化型メモリ素子。 A substrate, a memory layer formed of the phase change material according to any one of claims 1 to 3 on the substrate, and first and second electrode layers for energizing the memory layer. A phase change memory element.
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