JP6507860B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6507860B2 JP6507860B2 JP2015111773A JP2015111773A JP6507860B2 JP 6507860 B2 JP6507860 B2 JP 6507860B2 JP 2015111773 A JP2015111773 A JP 2015111773A JP 2015111773 A JP2015111773 A JP 2015111773A JP 6507860 B2 JP6507860 B2 JP 6507860B2
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- 239000004065 semiconductor Substances 0.000 title claims description 133
- 238000004519 manufacturing process Methods 0.000 title claims description 50
- 229910052751 metal Inorganic materials 0.000 claims description 161
- 239000002184 metal Substances 0.000 claims description 161
- 238000010438 heat treatment Methods 0.000 claims description 57
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 46
- 239000010936 titanium Substances 0.000 claims description 33
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 32
- 229910052719 titanium Inorganic materials 0.000 claims description 30
- 238000005121 nitriding Methods 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 24
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 24
- 229910052721 tungsten Inorganic materials 0.000 claims description 24
- 239000010937 tungsten Substances 0.000 claims description 24
- 238000004544 sputter deposition Methods 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 description 66
- 239000011229 interlayer Substances 0.000 description 62
- 230000008569 process Effects 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 9
- 238000005530 etching Methods 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 125000004429 atom Chemical group 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 208000028659 discharge Diseases 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 125000001153 fluoro group Chemical group F* 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- WPPDFTBPZNZZRP-UHFFFAOYSA-N aluminum copper Chemical compound [Al].[Cu] WPPDFTBPZNZZRP-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- -1 titanium halide compound Chemical class 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
- H01L23/53252—Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
- H01L23/53266—Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
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- Computer Hardware Design (AREA)
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- Ceramic Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Description
まず、実施の形態1にかかる半導体装置の製造方法により作製(製造)される半導体装置の一例として、基板おもて面上に層間絶縁膜を介して形成されるおもて面電極とのコンタクトをトレンチコンタクトとする場合を例に説明する。図1は、実施の形態1にかかる半導体装置の製造方法により製造される半導体装置の一例を示す断面図である。図1に示す実施の形態1にかかる半導体装置は、半導体基板(半導体チップ)1に形成したトレンチ3内にバリアメタル6を介してプラグ(電極の取り出し部分)7を埋め込むことでトレンチ3の内壁におもて面電極8とのコンタクトを形成したトレンチコンタクトを備える。具体的には、例えばシリコン(Si)基板などの半導体基板1のおもて面上には、BPSG等の層間絶縁膜(絶縁膜)2が設けられている。なお、半導体基板1は、半導体基板(出発基板)の上面に半導体層をエピタキシャル成長させたエピタキシャル基板でもよい。
次に、実施の形態2にかかる半導体装置の製造方法により作製(製造)される半導体装置の一例を説明する。図8は、実施の形態2にかかる半導体装置の製造方法により製造される半導体装置の一例を示す断面図である。実施の形態2にかかる半導体装置の製造方法により作製される半導体装置が実施の形態1にかかる半導体装置の製造方法により作製される半導体装置と異なる点は、半導体基板1にトレンチ3を形成しないことである。すなわち、コンタクトホール2aには、半導体基板1のおもて面が露出される。
2 層間絶縁膜
2a コンタクトホール
3 トレンチ
4 第1金属膜
5 第2金属膜
6 バリアメタル
7 プラグ
8 おもて面電極
d トレンチの深さ
t1 層間絶縁膜の厚さ
t2 第1金属膜の厚さ
t3 第2金属膜の厚さ
t4 おもて面電極の厚さ
w トレンチの幅
Claims (8)
- 半導体基板の表面に絶縁膜を形成する第1工程と、
前記絶縁膜を深さ方向に貫通して前記半導体基板に達するコンタクトホールを形成する第2工程と、
前記絶縁膜の表面から前記半導体基板の前記コンタクトホールに露出する半導体部の表面にわたって、チタンからなる第1金属膜を形成する第3工程と、
スパッタリングにより、前記第1金属膜の表面に、窒化チタンからなる第2金属膜を形成する第4工程と、
熱処理により前記第1金属膜をシリサイド化する第5工程と、
前記第1金属膜および前記第2金属膜内に未反応のまま残るチタン原子をプラズマ窒化処理により窒化する第6工程と、
前記第5工程および前記第6工程の後、前記コンタクトホールの内部の前記第2金属膜の内側にタングステンからなるプラグを埋め込む第7工程と、
前記絶縁膜上の前記第2金属膜の表面から前記プラグの表面にわたってアルミニウムを主成分とする表面電極を形成する第8工程と、
を含み、
前記第5工程では、前記第1金属膜および前記第2金属膜内のチタン原子が前記絶縁膜内の酸素原子と反応しない温度で前記熱処理を行うことを特徴とする半導体装置の製造方法。 - 前記第6工程では、前記熱処理よりも低い温度で前記プラズマ窒化処理を行うことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記第5工程では、500℃以上650℃以下の温度で前記熱処理を行うことを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 前記第5工程では、前記熱処理として高速熱処理を行うことを特徴とする請求項1〜3のいずれか一つに記載の半導体装置の製造方法。
- 前記第3工程および前記第4工程は連続して行うことを特徴とする請求項1〜4のいずれか一つに記載の半導体装置の製造方法。
- 前記第3工程では、スパッタリングにより前記第1金属膜を形成することを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。
- 前記第2工程の後、前記第3工程の前に、前記半導体部にトレンチを形成する工程をさらに含み、
前記第3工程では、前記絶縁膜の表面から前記トレンチの内壁にわたって前記第1金属膜を形成し、
前記第7工程では、前記コンタクトホールおよび前記トレンチの内部の前記第2金属膜の内側に前記プラグを埋め込むことを特徴とする請求項1〜6のいずれか一つに記載の半導体装置の製造方法。 - 前記半導体基板はシリコン基板であることを特徴とする請求項1〜7のいずれか一つに記載の半導体装置の製造方法。
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JP2015111773A JP6507860B2 (ja) | 2015-06-01 | 2015-06-01 | 半導体装置の製造方法 |
US15/150,785 US9570346B2 (en) | 2015-06-01 | 2016-05-10 | Method of manufacturing semiconductor device |
CN201610304631.1A CN106206273A (zh) | 2015-06-01 | 2016-05-10 | 半导体装置的制造方法 |
CN202110598426.1A CN113436969A (zh) | 2015-06-01 | 2016-05-10 | 半导体装置的制造方法 |
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US8487410B2 (en) * | 2011-04-13 | 2013-07-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through-silicon vias for semicondcutor substrate and method of manufacture |
US11222818B2 (en) * | 2018-07-13 | 2022-01-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Formation method of semiconductor device structure with metal-semiconductor compound region |
JP7283036B2 (ja) | 2018-07-13 | 2023-05-30 | 富士電機株式会社 | 半導体装置および製造方法 |
TWI814888B (zh) * | 2019-08-15 | 2023-09-11 | 聯華電子股份有限公司 | 一種製作半導體元件的方法 |
CN113327888B (zh) * | 2020-02-28 | 2022-11-22 | 长鑫存储技术有限公司 | 半导体结构的制造方法 |
JP2021150526A (ja) * | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体装置、半導体記憶装置、及び、半導体装置の製造方法 |
KR20210156014A (ko) * | 2020-06-17 | 2021-12-24 | 삼성전자주식회사 | 메모리 소자 및 이를 포함하는 시스템 |
JP2022016842A (ja) | 2020-07-13 | 2022-01-25 | 富士電機株式会社 | 半導体装置 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63229814A (ja) * | 1987-03-19 | 1988-09-26 | Nec Corp | 半導体集積回路の製造方法 |
JPS6441240A (en) * | 1987-08-07 | 1989-02-13 | Nec Corp | Semiconductor integrated circuit device |
JP2919552B2 (ja) * | 1990-05-07 | 1999-07-12 | 沖電気工業株式会社 | 半導体素子の電極配線形成方法 |
JPH06204170A (ja) * | 1993-01-07 | 1994-07-22 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JP2937688B2 (ja) | 1993-04-28 | 1999-08-23 | 株式会社東芝 | 半導体装置 |
US5747116A (en) * | 1994-11-08 | 1998-05-05 | Micron Technology, Inc. | Method of forming an electrical contact to a silicon substrate |
US5545592A (en) * | 1995-02-24 | 1996-08-13 | Advanced Micro Devices, Inc. | Nitrogen treatment for metal-silicide contact |
JPH10112446A (ja) * | 1996-07-29 | 1998-04-28 | Sony Corp | コンタクト形成方法およびこれを用いた半導体装置 |
JPH1064848A (ja) * | 1996-08-13 | 1998-03-06 | Toshiba Corp | 半導体装置の製造装置および製造方法 |
JPH11145085A (ja) | 1997-11-05 | 1999-05-28 | Sony Corp | タングステン・プラグの形成方法 |
US6218297B1 (en) * | 1998-09-03 | 2001-04-17 | Micron Technology, Inc. | Patterning conductive metal layers and methods using same |
JP4366805B2 (ja) * | 2000-01-24 | 2009-11-18 | 東京エレクトロン株式会社 | 埋め込み方法 |
TW541659B (en) * | 2002-04-16 | 2003-07-11 | Macronix Int Co Ltd | Method of fabricating contact plug |
CN1275313C (zh) * | 2002-05-15 | 2006-09-13 | 旺宏电子股份有限公司 | 制造接触插塞的方法 |
US6927162B1 (en) * | 2004-02-23 | 2005-08-09 | Advanced Micro Devices, Inc. | Method of forming a contact in a semiconductor device with formation of silicide prior to plasma treatment |
WO2007110959A1 (ja) | 2006-03-29 | 2007-10-04 | Fujitsu Limited | 半導体装置の製造方法 |
JP5321022B2 (ja) * | 2008-12-04 | 2013-10-23 | ソニー株式会社 | 半導体装置の製造方法および半導体装置 |
US8476127B2 (en) * | 2010-10-28 | 2013-07-02 | Texas Instruments Incorporated | Integrated lateral high voltage MOSFET |
JP2011176372A (ja) * | 2011-06-09 | 2011-09-08 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
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