JP6391013B2 - Synchronous message transmission apparatus, time synchronization system, and synchronous message transmission method - Google Patents

Description

  The present invention relates to a synchronous message transmission device, a time synchronization system, and a synchronous message transmission method.

  In asynchronous networks such as Ethernet (registered trademark), IEEE 1588v2 (Precision Time Protocol, hereinafter referred to as PTP) is known as time synchronization means. In PTP, the Grandmaster Clock (GMC) uses extremely accurate time information obtained from GNSS (Global Navigation Satellite System (s), etc.) in a format specified by PTP. The time synchronization packet is engraved and transmitted to the slave that is the time synchronization target device. The slave receives a packet from the GMC and performs a calculation determined by the PTP rules, thereby obtaining frequency, phase, and absolute time information synchronized with the GMC.

When the time synchronization between the GMC and the slave is performed by PTP, the delay and fluctuation of the transmission time in the network and the fluctuation of the transmission interval of the time synchronization packet in the GMC cause the time synchronization accuracy to deteriorate.
Among these, regarding the delay and fluctuation of the transmission time in the network, a countermeasure using a transparent clock (TC) or a boundary clock (Boundary Clock, BC) has been proposed in IEEE 1588v2.

In relation to improving the accuracy of time synchronization, the time synchronization system described in Patent Document 1 performs processing other than time synchronization with a time synchronization processing unit that performs time synchronization processing by communicating time synchronization packets. A main processing unit, and a master that has a different IP address assigned to the time synchronization processing unit and the main processing unit, and when communicating with the main processing unit among the masters, a normal packet communication is performed to the IP address of the main processing unit. When performing time-synchronized communication, a plurality of slaves that communicate time-synchronized packets to the IP address of the time-synchronization processing unit are connected between the master and the slave, and packets communicated for each IP address are distributed, And a relay device provided with a first buffer and a second buffer for each IP address.
According to Japanese Patent Laid-Open No. 2004-260, this configuration improves time synchronization accuracy by reducing variations in network delay even when packets are concentrated.

JP 2013-143748 A

  In order to improve the accuracy of time synchronization between the GMC and the slave, countermeasures are also required for fluctuations in the transmission interval of time synchronization packets in the GMC. The fluctuation of the transmission interval of the time synchronization packet in the GMC is caused by, for example, the scheduling granularity in the CPU that generates the packet, the CPU load, and the like.

  The present invention provides a synchronization message transmission device, a time synchronization system, and a synchronization message transmission method that can reduce fluctuations in the transmission interval of time synchronization packets in a GMC (Grand Master Clock Device).

  According to the first aspect of the present invention, the synchronous message transmitting device is a synchronous message transmitting device for transmitting a synchronous message including time information, and includes a synchronous message generating unit for generating the synchronous message, and other than the synchronous message A general message generation unit that generates a general message, and a transmission unit that transmits the synchronization message and the general message. The synchronization message generation unit is lower than the general message generation unit. Is provided.

  Of the data used for generating the synchronization message, a global profile storage unit for storing a global profile that is data having the same value in all the synchronization messages transmitted by the same synchronization message transmitting device, and generation of the synchronization message For each time synchronization target device, an SMID profile, which is data sent from the same synchronization message transmission device and having the same value in a synchronization message transmitted to the same time synchronization target device, is used for each time synchronization target device. An SMID profile storage unit for storing, and an SMID table storage unit for storing an SMID table indicating data having different values for each time synchronization message among data used for generating the synchronization message, and generating the synchronization message Department of Global Profile Generated based on the global profile read from the storage unit, the SMID profile read from the SMID profile storage unit for the time synchronization target device that is the target of synchronization message transmission, and the SMID table read from the SMID table storage unit A synchronization message may be generated in combination with data.

  A scheduler unit that determines whether or not it is a transmission timing of the synchronization message, and the transmission unit transmits the synchronization message when the scheduler unit determines that it is a transmission timing of the synchronization message, and the scheduler unit , It may be provided in a lower layer than the general message generator.

  A first counter that counts every interval defined as a minimum value of a synchronization message transmission interval for the same time synchronization target device; and a minimum value of a synchronization message transmission interval for the same time synchronization target device. A second counter that counts every interval further divided by a number, and the scheduler unit determines whether it is time to send a synchronization message to a time synchronization target device indicated by the second counter. The determination may be made based on the value, and the sending unit may send the synchronization message when it is determined that the scheduler unit is ready to send the synchronization message.

  When the scheduler unit determines that the timing of sending the synchronization message is reached, if the general message is being sent, the sending unit interrupts the sending of the general message and sends the synchronization message. May be.

  The sending unit may suppress sending of a new general message when the scheduler unit determines that it is the sending timing of the synchronization message.

  When the sending unit determines that the timing of sending the synchronization message is determined by the scheduler unit, the sending unit suppresses sending of a new synchronization message and a general message, and a specified time specified as a time required for sending the general message has elapsed. Then, the synchronization message may be sent out.

  As a mode in which the sending unit sends the synchronization message, when the scheduler unit determines that it is the sending timing of the synchronization message, if the general message is being sent, the sending of the general message is interrupted, When it is determined that the mode for sending a synchronization message and the scheduler unit is the timing for sending a synchronization message, the mode for suppressing the sending of a new general message and the scheduler unit is determined to be the timing for sending a synchronization message, Any one of at least two modes out of the modes for sending out the synchronization message after the stipulated time specified as the time required for sending out the general message is suppressed after sending out the new synchronization message and the general message. You can accept the selection of .

  According to the second aspect of the present invention, a time synchronization system includes a synchronization message transmission device and a time synchronization target device, and the synchronization message transmission device transmits a synchronization message including time information. A synchronization message generation unit that generates the synchronization message, a general message generation unit that generates a general message that is a message other than the synchronization message, a transmission unit that transmits the synchronization message and the general message, The synchronization message generation unit is provided in a lower layer than the general message generation unit, and the time synchronization target device is configured to perform synchronization based on the synchronization message transmitted by the synchronization message transmission device. Synchronize the time with the message sending device.

  According to a third aspect of the present invention, a synchronous message transmission method is a synchronous message transmission method of a synchronous message transmission device that transmits a synchronous message including time information, the synchronous message generating step for generating the synchronous message; A general message generating step for generating a general message that is a message other than the synchronous message, and a sending step for transmitting the synchronous message and the general message, wherein the synchronous message generating step includes: It is executed in a lower layer than the generation unit.

  According to the present invention, fluctuations in the transmission interval of time synchronization packets in GMC can be reduced.

It is a schematic block diagram which shows the apparatus structure of the time synchronization system in one Embodiment of this invention. It is explanatory drawing which shows the hierarchical structure in the IEEE1588v2 time synchronous process. It is a schematic block diagram which shows the structural example of the conventional grand master clock apparatus. It is explanatory drawing which shows the example of the delay and fluctuation | variation in the synchronous message which the conventional grandmaster clock apparatus sends out. It is explanatory drawing which shows the hierarchical structure in the time synchronous process of the embodiment. It is a schematic block diagram which shows the structural example of the grandmaster clock apparatus in the same embodiment. It is explanatory drawing which shows the example of the delay in the synchronous message which the grandmaster clock apparatus in the same embodiment sends out. It is explanatory drawing which shows the format of the synchronous message of IEEE1588v2. It is explanatory drawing which shows the example of the data structure of the global profile which the global profile memory | storage part in the same embodiment memorize | stores. It is explanatory drawing which shows the example of the data structure of the SMID profile which the SMID profile memory | storage part in the same embodiment memorize | stores. It is explanatory drawing which shows the example of the data structure of the SMID table which the SMID table memory | storage part in the same embodiment memorize | stores. It is a schematic block diagram which shows the function structure of the MAC part in the embodiment. It is explanatory drawing which shows the example of the data structure of the synchronous message in the embodiment. 4 is an explanatory diagram illustrating an example of a synchronization message transmission interval in a network in which a plurality of slave devices exist in the embodiment. FIG. It is explanatory drawing which shows the example of the data structure of the SMID table in the embodiment. It is explanatory drawing which shows the example of operation | movement of the scheduler in the same embodiment. It is explanatory drawing which shows the example of the data flow at the time of the synchronous message transmission in the same embodiment. In the embodiment, it is explanatory drawing which shows the example of the operation | movement which a Sync transmission part performs in the case of a forced discard system. FIG. 6 is an explanatory diagram illustrating an example of an operation performed by a Sync transmission unit in the case of the high priority transmission method in the embodiment. In the embodiment, in the case of a transmission time reservation method, it is explanatory drawing which shows the example of the operation | movement which a Sync transmission part performs. In the same embodiment, it is explanatory drawing which shows how much transmission waiting occurs with a transmission time reservation system.

Hereinafter, although embodiment of this invention is described, the following embodiment does not limit the invention concerning a claim. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.
FIG. 1 is a schematic configuration diagram showing a device configuration of a time synchronization system in one embodiment of the present invention. In the figure, the time synchronization system 1 includes a grandmaster clock device 100, an antenna 200, a transparent clock device 300, and one or more slave devices 400.

The grand master clock device 100 and the transparent clock device 300 are connected via a network 810. The transparent clock device 300 and the slave device 400 are also connected via the network 810. The transparent clock device 300 and the slave device 400 may be connected via an L2 switch 820 in addition to the network 810. In the relationship between the grand master clock device 100 and the slave device 400, the transparent clock device 300, the L2 switch 820, and the network 810 are included in the communication path 800 that connects the grand master clock device 100 and the slave device 400.
The antenna 200 receives positioning information obtained from the positioning system 900, and the antenna 200 is connected to the grand master clock device 100.

The network 810 is an asynchronous communication network such as a communication network based on Ethernet (registered trademark).
The positioning system 900 is a positioning system using a satellite (Global Navigation Satellite System; GNSS, Global Navigation Satellite System). Examples of the positioning system 900 include GPS (Global Positioning System), QZSS (Quasi Zenith Satellite System), or GLONASS (Global Navigation Satellite System), but are not limited thereto. The positioning system 900 is a system that performs triangulation based on high-precision time and satellite navigation information as the principle of positioning, and always sets the time so that the time coincides with several cesium atomic clocks installed on the ground. The information is corrected. In the time synchronization system 1, the positioning system 900 is used as a time source. Specifically, the time synchronization system 1 detects time using highly accurate time information transmitted by an artificial satellite of the positioning system 900.

The antenna 200 receives positioning information transmitted by the satellite of the positioning system 900 and outputs the obtained positioning information to the grand master clock device 100.
The grand master clock device 100 is a time synchronization source that is the center of the time synchronization system 1, detects the time based on the positioning information received from the positioning system 900 via the antenna 200, and based on the detected time, Time information in the form of a synchronous packet is generated and transmitted to each slave device 400. The grand master clock device 100 transmits time information to the slave device 400 for the purpose of synchronizing the time of the slave device 400 that is the target of time synchronization with the time of the positioning system 900. Transmission is also referred to as transmission. The grand master clock device 100 corresponds to an example of a synchronous message transmission device.

Both the transparent clock device 300 and the L2 switch 820 relay communication between the grand master clock device 100 and the slave device 400.
The transparent clock device 300 receives the time synchronization packet from the grand master clock device 100 and transmits it to the destination slave device 400. At that time, the transparent clock device 300 subtracts the reception time from the transmission time to calculate a delay time in the transparent clock device 300, and writes (stamps) the calculated delay time in the time synchronization packet. The slave device 400 that has received the time synchronization packet performs correction based on the delay time written in the time synchronization packet, so that the transmission time delay (delay) or fluctuation (jitter) in the transparent clock device 300 with respect to time synchronization is performed. The influence of can be reduced.
On the other hand, the L2 switch 820 is a general multi-port switch and does not perform processing such as identification of a time synchronization packet. The time required for the time synchronization packet to pass through the L2 switch 820 contributes to the delay and fluctuation of the transmission time in the communication path 800.

  The slave device 400 is a time synchronization target device in the time synchronization system 1. The slave device 400 performs processing for synchronizing the time in the slave device 400 with the time in the grand master clock device 100 using the time synchronization packet received from the grand master clock device 100 via the communication path 800. The time inside the device referred to here is obtained by correcting the clock provided in the device with a time synchronization packet.

The apparatus configuration shown in FIG. 1 is the same as the apparatus configuration in the conventional time synchronization system. In this embodiment, it is not necessary to add a special device, and the internal configuration of the grand master clock device 100 is different from that of the conventional time synchronization system, as will be described later.
In addition, in order to identify the slave device 400 that is the target of time synchronization, the grand master clock device 100 gives the slave device 400 an SMID (SYNC message ID). The SMID is an integer serial number having a unique value for each slave device 400.
However, the SMID is not stored in the slave device 400, and is stored in the grand master clock device 100 so that the grand master clock device 100 identifies the slave device 400.

In the present embodiment, a case where a maximum of 500 slave devices 400 can be registered in the grand master clock device 100 will be described as an example. The grand master clock device 100 assigns 0 to 499 SMIDs to 500 slave devices 400.
However, the number of slave devices 400 that can be registered in the grand master clock device 100 is not limited to 500 or less. When the grand master clock device 100 performs time synchronization for 1000 slaves, the SMID can be easily scaled up by increasing the SMID bit by 1 bit as compared to the case of 500 slaves. When a single grand master clock device 100 synchronizes a large number of slave devices 400 with time, the configuration of the communication path 800 becomes complicated, and the L2 switch 820 other than the switch that supports time synchronization, such as the transparent clock device 300, has multiple stages. It should be noted that there is a possibility of being caught.

  The connection relationship between the grand master clock device 100 and the slave device 400 is not limited to that shown in FIG. For example, the grand master clock device 100 and the slave device 400 may be connected on a one-to-one basis. Further, the grand master clock device 100 and the slave device 400 may be simply connected via the network 810, not via the transparent clock device 300 or the L2 switch 820.

Here, with reference to FIGS. 2 to 4, the fluctuation of the transmission interval of the time synchronization packet in the grand master clock device by the IEEE 1588v2 time synchronization process will be described. In general, the grandmaster clock device operates according to the IEEE 1588v2 time synchronization process.
FIG. 2 is an explanatory diagram showing a hierarchical structure in the IEEE 1588v2 time synchronization process. In the figure, a grand master clock device 1100 and a slave device 1400 are shown, and the grand master clock device 1100 and the slave device 1400 are connected by a communication path 1800.

  Both the grand master clock device 1100 and the slave device 1400 operate according to a protocol having a five-layered structure. The five hierarchical structures are a physical layer (PHY layer), a media access controller (MAC) layer, an Internet protocol (IP) layer, a user datagram protocol (UDP) layer in order from the bottom. It is a Precision Time Protocol (PTP) layer. The media access controller layer includes a time stamp unit (TSU).

  The grand master clock device 1100 is a time synchronization source, and the slave device 1400 is a time synchronization target. In both the grand master clock device 1100 and the slave device 1400, the PTP layer, which is a protocol necessary for time synchronization, is located in the uppermost layer, and processing is usually performed by a CPU (Central Processing Unit). The time synchronization packet is also transmitted to the lower layer at a timing scheduled at regular intervals in the processing of the PTP layer.

The UDP layer and the IP layer are both protocol stack layers and are implemented in an OS (Operating System). Since the time synchronization packet generated in the PTP layer is a UDP packet, it is normally transmitted to the lower layer via the UDP layer and the IP layer.
The MAC layer performs processing such as adding MAC address information to the PTP packet encapsulated by the protocol stack of the PTP layer, UDP layer, and IP layer, FCS (Frame Check Sequence) calculation processing, etc., and interface with the physical layer Function as. The time stamp unit included in the MAC layer implements time stamping, which is an important element of the PTP layer.

One of the advantages of IEEE 1588v2 over other time synchronization systems is that it has a time stamp unit in the MAC layer. As a result, the PTP packet issued from the PTP layer is not affected by delay or jitter in the PTP layer, UDP layer, and IP layer higher than the MAC layer with respect to time stamping.
On the other hand, in the conventional grand master clock device, the packet transmission timing is affected by delay (delay) and fluctuation (jitter) in the PTP layer, UDP layer, and IP layer. This point will be described with reference to FIG.

FIG. 3 is a schematic block diagram showing a configuration example of a conventional grand master clock device.
In the figure, a grand master clock device 1100 includes a GNSS synchronous frequency oscillator (GNSSDO) 1110, a physical layer chip (PHY) 1120, a media access controller (Media) (MAC) unit 1130, and a crystal resonator 1150. A main memory 1160 and a CPU (Central Processing Unit) 1170. The GNSS synchronous frequency oscillator 1110 includes a GNSS receiver 1111, a clock adjuster 1112, and a crystal resonator 1113. The MAC unit 1130 includes a reception time stamp unit (RTSU) 1131, a reception FIFO (First-in First-out) 1132, a transmission FIFO 1133, a transmission time stamp unit (Transmit Timestamp Unit; TTSU) 1137, A Precision Time Counter Unit (PRTCU) 1142. The CPU 1170 includes a hardware (HW) access unit 1171, a driver 1172, an OS (Operating System) kernel 1173, a GNSS management daemon (GNSSD) 1174, a protocol stack 1175, a delayreq transmission processing unit 1176, and a sync transmission processing. A section 1177, a scheduler 1178, and a memory controller 1181.

The CPU 1170 implements each unit in the CPU 1170 by reading and executing a program from a storage device included in the grand master clock device 1100. On the other hand, the GNSS synchronous frequency oscillator 1110, the physical layer chip 1120, and the MAC unit 1130 are configured by hardware.
The physical layer chip 1120 executes physical layer processing, the MAC unit 1130 executes MAC layer processing, and the CPU 1170 executes IP layer, UDP layer, and PTP layer processing.

The grand master clock device 1100 is connected to an antenna (ANT) 1200 for receiving positioning information from the positioning system. Specifically, the antenna 1200 is connected to the GNSS synchronous frequency oscillator 1110 via a coaxial cable, and outputs time information extracted from the received positioning information to the GNSS synchronous frequency oscillator 1110.
The GNSS synchronous frequency oscillator 1110 notifies ToD (Time Of Day, time information of year / month / day / hour / minute / second), 1 PPS (accurate every second) from the GNSS signal obtained from the antenna 1200. Pulse signal) and a 125 megahertz (MHz) frequency signal are obtained and provided inside the grand master clock device 1100.

  The GNSS receiver 1111 extracts time information and GNSS navigation information from the GNSS signal received by the antenna 1200. Based on the GNSS navigation information and the time information periodically sent from the GNSS, the GNSS receiver 1111 uses the triangulation principle to determine the current position of the satellite (the relative position between the satellite and the grand master clock device 1100). ). When the current position is determined, the GNSS receiver 1111 performs time information conversion.

  Since the time information included in the GNSS is periodically corrected by a cesium atomic clock arranged on the ground, the time information obtained from the GNSS signal indicates a very accurate time. It can be considered that the time information obtained from the GNSS signal is synchronized with the only absolute time in the world. Since the time information is information on the frequency and the phase at the same time, the clock adjuster 1112 corrects the crystal resonator 1113 in response to the input of a pulse every second. As a result, the clock adjuster 1112 corrects the frequency of the crystal resonator 1113 so that it coincides with high accuracy to 125 MHz. In this embodiment, the case where 125 MHz is used as the fundamental frequency has been described as an example, but the fundamental frequency such as 10 MHz or 25 MHz can be replaced with a predetermined frequency.

In the MAC unit 1130, the reception time stamp unit 1131 writes the reception time in the reception packet (the packet received by the grand master clock device 1100) (the reception time stamp is stamped).
The reception FIFO 1132 temporarily stores the reception packet.
The transmission FIFO 1133 temporarily stores transmission packets (packets transmitted by the grand master clock device 1100).
The transmission time stamp unit 1137 writes the transmission time in the transmission packet (ie, stamps the transmission time stamp).

The crystal resonator 1150 is a crystal resonator having a frequency accuracy lower than that of the crystal resonator 1113. The crystal resonator 1150 is used as a reference clock for the CPU 1170.
The main memory 1160 is configured using a storage device provided in the grand master clock device 1100, and stores various information.

In the CPU 1170, the hardware access unit 1171 connects the bus and the driver 1172, and the driver 1172 controls the hardware. The bus is generally provided by a PCI bus or a local bus.
The CPU 1170 performs ToD acquisition and transmission / reception packet handling via the hardware access unit 1171. In handling transmission / reception packets, the CPU 1170 outputs the main memory address instructed from the OS kernel 1173 to the main memory controller 1181 for the transmission packets, and reads the transmission packet information from the main memory 1160. Then, the CPU 1170 outputs the read transmission packet information to the MAC unit 1130. Contrary to the case of the transmission packet, the CPU 1170 accumulates the packet received from the MAC unit 1130 at the main memory address designated by the OS kernel 1173 in the main memory 1160.

  Here, in the transmission / reception packet processing, a method of directly executing the main memory 1160, the main memory controller 1181, and the MAC unit 1130 without using the arithmetic unit of the CPU 1170 by using DMA (direct memory access) is mainstream. In the grand master clock device 1100 shown in FIG. 3, a DMA is built in the memory controller 1181, and transmission / reception packet processing is performed using this DMA.

The OS kernel 1173 is the center of an operating system such as Linux (registered trademark), UNIX (registered trademark), and Windows, and controls the scheduler 1178 that manages the execution of various processes and allocates memory space.
The GNSSD 1174 is a control daemon that controls the GNSS synchronous frequency oscillator 1110. Based on the ToD information obtained from the GNSS, the time adjustment of the precision time counter unit 1142 of the MAC unit 1130 is more than the second granularity, and the GNSS synchronous frequency. The state of the oscillator 1110 is monitored. Specifically, the GNSSD 1174 performs time adjustment based on the previous time adjustment (correction of oscillation of the crystal resonator 1113) performed by the GNSS synchronous frequency oscillator 1110. The GNSSD 1174 manages state changes such as the crystal resonator 1113 in the GNSS synchronous frequency oscillator 1110 being in a free-running state (Holdover) depending on the reception status of the GNSS radio wave, etc., and the referenced process from each process To implement.

  The protocol stack 1175 performs processing of each layer of UDP and IP. The protocol stack 1175 can be compiled and implemented with the OS kernel 1173, or can be additionally introduced. In order to reduce the burden on the user of implementing the protocol stack 1175, a standard protocol is generally compiled and implemented together with the OS kernel 1173.

The scheduler 1178 performs execution management of various processes as described above.
The Sync transmission processing unit 1177 determines the ID of the slave device to be transmitted to the scheduler 1178 based on the synchronization interval (Sync interval) that is negotiated with the slave device 1400 in advance using the PTP protocol. (Hereinafter referred to as slave ID) is registered. The scheduler 1178 refers to the slave ID area (area where the ID of the slave device is registered) with a certain granularity (for example, 500 us), and if there is a slave ID, transmits the slave ID to the sync transmission processing unit 1177. The Sync transmission processing unit 1177 generates a synchronization message (Synchronous message (Sync message)) related to the slave ID as a time synchronization packet and outputs it to the protocol stack 1175 together with additional information.

  Here, the granularity of the scheduler 1178 can be a major problem for the time synchronization system. For example, in a time synchronization system that sends out synchronization messages with a granularity of 500 us, if you want to send out 128 synchronization messages per second, the correct interval is 1/128 = 7,812 microseconds (μs), which is around 500 us A numerical value of 8,000 microseconds or 7,500 microseconds. Both 8,000 microseconds and 7,500 microseconds are different from the correct interval of 7,812 microseconds, and this difference causes jitter.

Further, the fact that the CPU 1170 is not synchronized with the high-accuracy crystal resonator 1113 that is synchronized with the time extracted from the GNSS can also cause a jitter or delay in one direction. Further, since the CPU 1170 is executing various processes, there is no guarantee that the Sync transmission process (synchronization message transmission process) can be started at the time designated by the scheduler 1178. Further, when the sync transmission timing (synchronization message transmission timing) has arrived, if transmission processing of a packet of a general message other than the synchronization message has already been performed, it is necessary to wait for the end of the transmission processing.
Here, the general message indicates a message other than the synchronization message, such as a management message or a delay resp message described later, for example, which is transmitted by the CPU 1170.

  When the grandmaster clock device 1100 receives a delayreq message from the slave device, the delayreq transmission processing unit 1176 records the reception time and records the recorded reception time in the delayrep message. Then, the Delayreq transmission processing unit 1176 performs processing of transmitting a delay resp message (delay resp message) to the slave device that has transmitted the delay req message in a format stipulated by IEEE 1588v2. The delay resp message is used by the slave device to calculate the network delay time.

As described above, there are many fluctuation factors in the CPU process, and it is difficult to maintain an accurate Sync interval (synchronization message transmission interval). On the other hand, the MAC unit 1130 uses the reception FIFO 1132 and the transmission FIFO 1133 and the precision time counter unit 1142 which is an accurate time source equivalent to GNSS to accurately process the PTP packet at the reception time stamp unit 1131 and the transmission time stamp unit 1137. Stamp the correct time.
The physical layer chip (PHY) 1120 communicates with the slave device 1400 via the network.

FIG. 4 is an explanatory diagram showing an example of delay and fluctuation in a synchronization message transmitted by a conventional grand master clock device. In the figure, the horizontal axis represents the time, and the time on the right side in the figure indicates the later time. Further, each part in the synchronous message transmission path is shown in the vertical direction of the figure.
In FIG. 4, the Sync transmission processing unit 1177 negotiates with the slave device 1400 as transmitting a synchronization message at regular intervals of every second (1 PPS), and the synchronization message ID is transmitted to the scheduler 1178 at a timing of every second. Write.
Note that FIG. 4 shows an example in which the synchronization message transmission interval is 1 PPS, so the granularity problem described with reference to FIG. 3 is not mentioned.

Since the scheduler 1178 operates with a low-precision crystal resonator 1150 that is a reference clock of the CPU, the operation of the scheduler 1178 has fluctuation with respect to the absolute time axis. In other words, due to a clock error caused by the crystal unit 1150, the transmission timing of the synchronization message indicated by the scheduler 1178 may include an error with respect to the one second interval.
Next, when the scheduler 1178 detects the transmission timing of the synchronization message, the sync transmission processing unit 1177 writes the synchronization message at the transmission timing in the main memory 1160. At this time, a delay due to writing to the main memory 1160 occurs. In addition, when another process accesses the same main memory while writing a synchronization message, jitter may occur.

  The synchronization message stored in the main memory 1160 is stamped with an accurate transmission time from the grand master clock device 1100 by the TTSU 1137 in the MAC 1130 operating with the high-precision crystal resonator 1113. Then, the synchronization message in which the sending time is stamped is sent from the grand master clock device 1100.

Here, when the network delay is expressed as Δdelayi (i is a positive integer), the arrival time of the packet reaching the slave device 1400 is “Δdelay1 + 100 ns”, “Δdelay2 + 300, 500 ns”,. To disperse. In particular, when the fluctuation of the network delay is small, the fluctuation component generated in the grand master clock device 1100 greatly affects the arrival interval of the synchronization message.
Further, when the problem of the granularity problem described with reference to FIG. 3 occurs, the accuracy of the arrival interval of the synchronization message to the slave device 1400 further decreases.

  FIG. 5 is an explanatory diagram showing a hierarchical structure in the time synchronization process of the present embodiment. In the figure, a grand master clock device 100 and a slave device 400 are shown, and the grand master clock device 100 and the slave device 400 are connected by a communication path 800.

  Further, the grand master clock device 100 and the slave device 400 operate according to a protocol having a five-layer structure. The five hierarchical structures are a physical layer (PHY layer), a media access controller (MAC) layer, an Internet protocol (IP) layer, a user datagram protocol (UDP) layer in order from the bottom. It is a Precision Time Protocol (PTP) layer. The media access controller layer includes a time stamp unit (TSU).

The grand master clock device 100 is a time synchronization source, and the slave device 400 is a time synchronization target. The slave device 400 processes PTP, which is a protocol necessary for time synchronization, using the CPU in the highest layer.
On the other hand, the grand master clock device 100 executes the process of sending the synchronization message in a process in the MAC layer based on the interval specified by the profile from the CPU, information on the slave device 400, and the like. In this way, the grand master clock device 100 executes the synchronization message sending process separately from the CPU.

  Since PTP is a UDP packet, it is normally transmitted to a lower layer via a UDP and IP protocol stack implemented in the OS. On the other hand, when specializing in synchronous messages, the size and field position of the packet are constant for all slave devices 400, the destination address is different for each slave device 400, and the sequence number, UDP checksum, etc. are unique at the time of transmission. It becomes data to be determined.

In the MAC layer, the grand master clock device 100 stores information output from each protocol stack of PTP, UDP, and IP as a profile. At that time, the MAC layer stores the global profile, the SMID profile (synchronous message profile), and the SM table (synchronous message table). As will be described later, the global profile is a collection of certain data for all slave devices 400. Further, the SMID profile is a collection of different data for each slave device 400. The SMID table is a collection of data uniquely determined at the time of transmission (data having different values for each synchronization message).
Then, the grand master clock device 100 eliminates the fluctuation of the transmission timing due to the processing in the CPU layer by transmitting the synchronization message at the time scheduled by the extremely high precision clock originating from GNSS in the MAC layer, Synchronous message transmission is realized only with a certain delay.

FIG. 6 is a schematic block diagram illustrating a configuration example of the grand master clock device according to the present embodiment.
In the figure, a grand master clock device 100 includes a GNSS synchronous frequency oscillator (GNSSDO) 110, a physical layer chip (PHY) 120, a media access controller (MAC) unit 130, a crystal resonator 150, A main memory 160 and a CPU (Central Processing Unit) 170. The GNSS synchronous frequency oscillator 110 includes a GNSS receiver 111, a clock adjuster 112, and a crystal resonator 113. The MAC unit 130 includes a reception time stamp unit (RTSU) 131, a reception FIFO (First-in First-out) 132, a transmission FIFO 133, a Sync profile storage unit 134, a Sync generation unit 135, a Sync, and the like. The transmitter 136 includes a transmission time stamp unit (TTSU) 137, a scheduler 141, and a precision time counter unit (PRTCU) 142. A more detailed configuration of the MAC unit 130 will be described later.
The CPU 170 includes a hardware (HW) access unit 171, a driver 172, an OS (Operating System) kernel 173, a GNSS management daemon (GNSSD) 174, a protocol stack 175, a Delayreq transmission processing unit 176, and a Sync registration process. A unit 177 and a memory controller 181.

The CPU 170 implements each unit in the CPU 170 by reading and executing a program from a storage device included in the grand master clock device 100. On the other hand, the GNSS synchronous frequency oscillator 110, the physical layer chip 120, and the MAC unit 130 are configured by hardware.
In addition, the physical layer chip 120 executes physical layer processing, the MAC unit 130 executes MAC layer processing, and the CPU 170 executes IP layer, UDP layer, and PTP layer processing.

The configuration and function of the GNSS synchronous frequency oscillator 110 are the same as the configuration and function of the GNSS synchronous frequency oscillator 1110 shown in FIG.
In the MAC unit 130, the functions of the reception timestamp unit 131 and the transmission timestamp unit 137 are the same as the functions of the reception timestamp unit 1131 and the transmission timestamp unit 1137 in FIG.
The functions of the crystal unit 150 and the main memory 160 are the same as the functions of the crystal unit 1150 and the main memory 1160 in FIG.
The CPU 170 is the same as the CPU 1170 of FIG. 3 except that it includes a Sync registration processing unit 177 instead of the Sync transmission processing unit 1177 and the scheduler 1178 of FIG. The CPU 170 also executes the scheduler function of the OS. However, the CPU scheduler is not shown in FIG. 6 because the function is not directly used for sending the synchronization message. The CPU 170 corresponds to an example of a general message generation unit, and generates a general message as with the CPU 1170 in FIG.

The sync registration processing unit 177 notifies the MAC unit 130 via the hardware access unit 171 of the synchronization message interval and the destination address negotiated with the slave device 400. This eliminates the need to use the scheduler function of the CPU 170 when sending the synchronization message. For this reason, in the transmission of the synchronization message, the transmission timing fluctuation caused by the low-precision crystal resonator 150 and the transmission timing fluctuation caused by the scheduler granularity do not occur.
Further, when the CPU 170 is released from the periodic synchronous message transmission process, it is possible to spend a lot of time for other processes such as the GNSSD process and the Delayreq transmission process, and the performance of the apparatus can be expected to be improved. The function of the Delayreq transmission processing unit 176 is the same as the function of the Delayreq transmission processing unit 1176 in FIG.

  The MAC unit 130 receives an instruction from the sync registration processing unit 177 and stores the sync characteristics for each slave device 400 in the sync profile storage unit 134. Specifically, the MAC unit 130 acquires the Sync interval (synchronization message transmission interval), the address information reaching the slave device 400, and each element constituting the synchronization message, and acquires the three elements in the Sync profile storage unit 134. Disassemble into elements and store. The three elements will be described later.

  The MAC unit 130 further includes a scheduler 141, which has an SMID as will be described later. The SMID counts up at intervals of 15,625 nanoseconds obtained by dividing 7,812,500 nanoseconds by 500.

The scheduler 141 counts up the SMID after receiving 1 PPS, which is a pulse per second, and determines whether or not there is a synchronization message to be transmitted at the current time by comparing the nextInterval in the SMID_table with the SYNCID counter. When it is determined that nextInterval is equal to SYNCID counter, the scheduler 141 outputs a sync transmission pulse (Transmit pulse) to the Sync transmission unit 136.
The scheduler 141 corresponds to an example of a scheduler unit.

The sync generation unit 135 presents to the sync transmission unit 136 a synchronization message that is generated by merging three elements constituting the synchronization message, which is set in advance by the sync registration processing unit 177 of the CPU 170, to generate the synchronization message. The Sync generation unit 135 corresponds to an example of a synchronization message generation unit.
The Sync sending unit 136 sends out a synchronization message by one of the three methods described later. The Sync sending unit 136 corresponds to an example of a sending unit.

  Note that the part that transmits the synchronization message is not limited to the MAC unit 130. For example, you may make it comprise the part which transmits a synchronous message in FPGA different from the MAC part 130. FIG. In this case, the physical layer chip, FPGA, and MAC are configured in order from the lower layer, and the time stamp is stamped by the FPGA.

FIG. 7 is an explanatory diagram illustrating an example of a delay in the synchronization message transmitted by the grand master clock device according to the present embodiment. In the figure, the horizontal axis represents the time, and the time on the right side in the figure indicates the later time. Further, each part in the synchronous message transmission path is shown in the vertical direction of the figure.
In FIG. 7, the Sync registration processing unit 177 negotiates with the slave device 400 as sending out a synchronization message at equal intervals of every second (1 PPS), and the Sync profile storage unit 134 of the MAC unit 130 stores the transmission interval, Register the elements that make up the synchronization message. The processing that the CPU 170 performs regarding the transmission of the synchronization message is limited to the registration processing in the Sync profile storage unit 134. As a result, the CPU 170 can concentrate on executing other processes necessary for PTP processing and device management.

  Transmission of a synchronization message in 1PPS is registered in the SYNC profile storage unit 134, and the profile is managed in units of SMID (Sync message ID) to be described later. In the MAC unit 130, an internal logic circuit is operated by a high-precision crystal resonator 113 originating from GNSS. The MAC unit 130 periodically monitors the SMID and, when there is an SMID to be transmitted, assembles a synchronization message and performs transmission.

  The Sync sending unit 136 performs a sync message sending process based on one of three rules described later. In particular, in the forced discard method and the transmission time reservation method, which will be described later, a synchronization message can be transmitted every second. Therefore, the fluctuation component of the synchronization message transmission timing in the grand master clock device 100 is eliminated, and the synchronization message can be transmitted to the slave device 400 using only the delay component and fluctuation component in the communication path. In particular, when the delay component Δdelayi (i is a positive integer) in the communication path is constant, the synchronization message reaches the slave device 400 at regular intervals. In this way, by eliminating the fluctuation component in the CPU, it is possible to improve the time accuracy and shorten the time synchronization time in the slave device 400.

FIG. 8 is an explanatory diagram showing the format of an IEEE 1588v2 synchronization message. In the figure, 32 bits (bits), that is, 4 bytes (BYTE) are shown in the horizontal direction, and are sent to the line from the leftmost bit.
Further, in the downward direction of the figure, a set of 32 bits is represented as continuous data, and is transmitted to the line in order from the data in the upper row to the data in the lower row.
Further, 1, 5, 9,... Described at the left end of the figure indicate the left end of the 32-bit set, that is, the byte position transmitted first to the network. For example, the leftmost bit in the first row from the top is included in the first byte, and the leftmost bit in the second row from the top is included in the fifth byte.

As shown in FIG. 8, the synchronization message does not include an FCS (Frame Check Sequence) and has a fixed length of 86 bytes. Although the length may be changed by VLAN tag or the like, the length is fixed in the grand master clock device 100.
The synchronization message is composed of a plurality of protocols.

  The Ether header is an area given to all packets that propagate Ethernet (registered trademark), and is a destination MAC address MAC-DA and a source MAC address (MAC address of the grand master clock device 100) MAC-SA. It is composed of EtherType indicating the continuing protocol type. In the case of a synchronous message, since it is IPv4, Ethertype = 0x0800 is fixed.

  IP header is IP version number (version, = 4), IP header length (length, = 5), service type (TOS), datagram length (data length, = 72), ID (random value), flag field (Flag), fragment offset (fragment offset, = 0x00), TTL (= 1), protocol number (protocol No, = 17: UDP), header checksum (header checksum, IP header checksum value, calculation method is Stipulated in RFC1071).

  The UDP header is a source (grand master clock device 100) UDP port number (UDP-SP, = 319: a fixed value defined in IEEE 1588v2), a destination (slave device 400) UDP port number (UDP-DP, = 319: Fixed value specified in IEEE 1588v2), UDP packet length (UDP-length, = 52), UDP checksum (UDP-checksum, UDP pseudo header 12 bytes + UDP header + UDP payload), one's complement It is a value calculated by the sum of. If the value of the UDP checksum is set to 0, the UDP checksum calculation is invalidated at the counterpart device and the check is not performed. In the implementation of the grand master clock device, since the time stamp changes in real time, it is easy to implement the UDP checksum area as 0, and it is often implemented in a grand master clock device or a software-based grand master clock device. It is not desirable to compromise the reliability of the most important time stamp in time synchronization due to some problem on the network or in the device. Therefore, the grand master clock device 100 calculates a UDP checksum for each packet and stores it in the UDP checksum area.

  The PTP header is a header format for a time synchronization packet defined by IEEE 1588v2, and includes a synchronization message. Transmitspecific is a 4-bit value that can be freely set by the administrator of the grandmaster clock device 100 for future expansion (default = 1). The message type (MessageType) is a synchronous message (= 0). This is because versionPTP assumes PTPv2 in the present application (= 2).

  The message length is fixed in the case of a synchronous message (= 44). In the domain number, the administrator of the grand master clock device sets the time synchronization group = domain to which the grand master clock device belongs. FlagField is a field for setting the characteristics of the grand master clock device, and is set by the administrator of the grand master clock device. The correction field is an area not used in the grand master clock device. The clockIdentity is an identifier that uniquely indicates the grand master clock device. In IEEE 1588v2, which is an effective area when there are a plurality of grand master clock devices on the network, a MACSA, that is, a MAC address that exists only on the network is used. It is specified that a total of 8 bytes is obtained by dividing every 3 bytes and inserting FF-FF between them. The source Port ID is an area indicating the number of the port of the grand master clock device. The sequence ID is a number assigned sequentially to the transmission of the synchronization message, and when viewed from a single slave device, it appears to increment by one. With this ID, it is possible to detect missing synchronization messages and take some measures. In addition, it is possible to delete a factor that hinders time synchronization such as ID reversal by route. controlField represents a synchronization message (= 0). logMessagePeriod is normally 0. In the case of a synchronous message, the synchronous message payload is composed of originTimestamp. The originTimestamp is composed of a 48-bit second area and a 32-bit nanosecond area. The originTimestamp is an area for recording an absolute time originating from GNSS when a synchronization message is sent from the grand master clock device 100. . As described above, it is necessary to send a lot of information in addition to the time information that is the information that the synchronization message wants to send. In FIG. 8, the information to be generated is classified into four types. The first is an area where all synchronization messages transmitted from the same grand master clock device have the same value. The second is an area that is sent from the same grand master clock device and has the same value in the synchronization message sent to the same slave device. The third is an area having a different value for each synchronization message. The fourth is a reserved area for future expansion.

FIG. 9 is an explanatory diagram illustrating an example of a data structure of a global profile stored in the sync profile storage unit 134 (global profile storage unit 134-1).
The global profile is a collection of data of regions (first regions) that have the same value in all the synchronization messages transmitted from the same grand master clock device among the regions shown in FIG.

The 48 bytes shown in FIG. 9 are always the same value (a value common to each synchronization message) including the reserved area (RSVD), and the sync profile storage unit 134 stores one global profile. Management with a single memory area is an effective means in terms of apparatus cost.
An exception is an ID (random value) area, and the value of the ID (random value) area is different for each packet. The value of the ID (random value) area is literally random, and it is not necessary to store a unique value in the global profile. However, in the example of FIG. 9, an area is reserved for use such as setting a seed value (initial value) for generating a random value. A known random value generation method can be used as a random value generation method for an ID (random value) region.

FIG. 10 is an explanatory diagram showing an example of the data structure of the SMID profile (SMID_profile) stored in the Sync profile storage unit 134 (SMID profile storage unit 134-2).
The SMID profile is data in a region (second region) that is sent from the same grand master clock device and has the same value in the synchronization message sent to the same slave device among the regions shown in FIG. Are summarized. In addition, as shown in FIG. 10, the reserve area | region (RSVD) is included.
The sync profile storage unit 134 stores the SMID profile for each slave device 400. The SMID profile shown in FIG. 10 is composed of 28 bytes. When 500 slave devices 400 are time-synchronized, the Sync profile storage unit 134 stores the SMID profile using an area of 28 × 500 = 14,000 bytes.

FIG. 11 is an explanatory diagram illustrating an example of a data structure of the SMID table (SMID_table) stored in the Sync profile storage unit 134 (SMID table storage unit 134-3).
The SMID table is a collection of data of areas (third areas) having different values for each synchronization message among the areas shown in FIG. In addition, as shown in FIG. 11, the reserve area | region (RSVD) is included.
The SMID table shown in FIG. 11 is composed of 8 bytes. When 500 slave devices 400 are time-synchronized, the sync profile storage unit 134 stores the SMID table using an area of 8 × 500 = 4,000 bytes.

  As described above, the storage capacity necessary for the Sync profile storage unit 134 to store the Global profile, the SMID profile, and the SMID table can be obtained by Expression (1).

      48 + 14,000 + 4,000 = 18,000 (bytes) (1)

  The area of about 18 kilobytes (k BYTE) is extremely small in the recent memory technology, and does not become an obstacle to mounting in an ASIC or FPGA.

  FIG. 12 is a schematic block diagram illustrating a functional configuration of the MAC unit 130. In the figure, a MAC unit 130 includes a reception time stamp unit (RTSU) 131, a reception FIFO 132, a transmission FIFO 133, a sync profile storage unit 134, a sync generation unit 135, a sync transmission unit 136, and a transmission time stamp unit. (TTSU) 137, SYNC message FIFO 139, scheduler 141, and precision time counter unit (PRTCU) 142. The Sync profile storage unit 134 includes a global profile storage unit 134-1, a SIMD profile storage unit 134-2, and an SMID table storage unit 134-3.

  The MAC unit 130 receives a high-accuracy 1 PPS (second pulse) originating from GNSS and a clock signal of 125 MHz. Each process in the MAC unit 130 operates at 125 MHz with extremely accurate timing. ToD is date and time information.

  The precision time counter unit 142 is a time source in the apparatus, and includes a Sec area that stores information of year, month, day, hour, minute, and second of the current time in 48 bits, and a subunit of 8 nanoseconds that is the reciprocal number of 125 megahertz. And an Nsec area for storing time information in 30 bits. The precision time counter unit 142 acquires ToD, determines second information, and counts up the Nsec region at 8 ns which is the reciprocal of 125 MHz. The precision time counter unit 142 has a mechanism for resetting the Nsec counter to 0 by 1 PPS pulse and finely adjusting Nsec every second. The second information and nanosecond information generated by the precision time counter unit 142 are notified to the reception time stamp unit (RTSU) 131 and the transmission time stamp unit (TTSU) 137, and are stamped in the original Timestamp area when the synchronization message is generated.

The sync profile storage unit 134 is configured by a DPRAM (dual port RAM). As a result, it is possible to eliminate waiting by the CPU 170 and each process of the MAC unit 130 accessing the Sync profile area 134 asynchronously. The Sync profile storage unit 134 is a memory space for storing the global profile, SMID profile <0-499>, and SMID table <0-499> described above with reference to FIGS. 9, 10, and 11. Specifically, the global profile storage unit 134-1 stores a global profile. The SMID profile storage unit 134-2 stores the SMID profile. The SMID table storage unit 134-3 stores an SMID table.
In accessing the sync profile storage unit 134, the CPU 170 designates an address (ADDR) and data (DATA) and writes each data. Data written by the CPU 170 is handled as a fixed value by each process of the MAC unit 130. In addition, it is possible to monitor the current transmission status of the synchronization message by using the read function.

  The reception FIFO 132 is a memory space that stores the PTP received by the physical layer chip 120 from the network 810 and packets other than PTP. The reception FIFO 132 stores the reception data that has arrived from the reception time stamp unit 131 in a FIFO format while DataEnable (a signal indicating that data is present) is asserted. In addition, the reception FIFO 132 has an EmptyFlag, and when there is data, the EmptyFlag 132 negates the EmptyFlag. Thereby, it can be transmitted to the CPU 170 that valid received data exists.

  The CPU 170 periodically monitors the EmptyFlag and performs a process of taking received DATA into the CPU 170 in synchronization with the CPU clock (using the low-precision crystal resonator 150). The data acquired by the CPU 170 may include various data other than PTP.

The transmission FIFO 133 is a memory space that stores a packet that the CPU 170 outputs to the MAC unit 130. The packet that the CPU 170 outputs to the MAC unit 130 is a packet other than the synchronization message (general message packet). The CPU 170 outputs transmission DATA to the transmission FIFO 133 when FullFlag is negated. On the other hand, when FullFlag is asserted, the CPU 170 does not perform packet transmission processing and stores data to be transmitted in the main memory or the like. The transmission FIFO 133 is also connected to the Sync transmission unit 136 through each path of EmptyFlag, ReadPulse, and transmission DATA.
When there is no synchronization message, the Sync sending unit 136 outputs ReadPulse (a signal for reading data from the FIFO), and executes reading of transmission data.

  The SYNC message FIFO 139 is an area in which only the synchronization message is stored, and stores the synchronization message generated by the sync generation unit 135. The synchronization message stored in the SYNC message FIFO 139 is always one or less. The SYNC message FIFO 139 is connected to the Sync sending unit 136 by EmptyFlag, ReadPulse, and transmission DATA. The SYNC message FIFO 139 sends transmission DATA according to ReadPulse after any time timing according to the rule of the Sync sending unit 136 when EmptyFlag (signal indicating no data) is asserted.

The scheduler 141 has a SYNC ID that counts up at 1 second / 128. SYNCID corresponds to SyncInterval in sending a synchronous message.
Further, the scheduler 141 includes an SMID that is a counter that counts up at a timing when one cycle of SYNCID is further divided into 500.

  Further, the scheduler 141 converts the SMID value into the SMID table address and the SMID profile address, and sets the address information in the Sync profile. The scheduler 141 reads nextInterval information, syncInterval, and sequenceID from the SMID table whose address is determined. If nextInterval matches SYNCID, the scheduler 141 determines that it is time to send a synchronization message, and outputs TransmitPulse to the Sync generation unit 135 and the Sync transmission unit 136. When nextInterval matches SYNCID, the scheduler 141 updates the value of nextInterval and the value of sequenceID. Specifically, the scheduler 141 updates the value of nextInterval at the next transmission timing calculated from the value of syncInterval. Further, the scheduler 141 writes a numerical value obtained by incrementing sequenceID by 1 in the SMID table.

  Here, nextInterval is information for corresponding to the synchronous message transmission interval set for each slave device 400. For the slave device 400 in which the synchronization message transmission interval is set to 128 PPS, the grand master clock device 100 may transmit the synchronization message at the same interval as the interval at which SyncID is incremented by one. On the other hand, for the slave device 400 in which the synchronization message transmission interval is set to 64 PPS, the grand master clock device 100 needs to transmit the synchronization message at the same interval as the interval at which SyncID is incremented by two.

Therefore, the scheduler 141 compares the next interval stored in the Sync profile storage unit 134 with the SMID for each slave device 400. When it is determined that the value of nextInterval is the same as the value of SMID, the scheduler 141 determines that the timing for sending the synchronization message has arrived.
Furthermore, the scheduler 141 calculates the next transmission timing from the syncInterval stored in the Sync profile storage unit 134 for each slave device 400, and writes it in the nextInterval. Since 128 PPS is the standard minimum interval, the calculation formula is 128 / SyncInterval, and the above calculation result is added to the current nextInterval value.
For example, in the case of the slave device 400 in which the synchronization message transmission interval is set to 64 PPS, 128 ÷ 64 = 2, and 2 is added to the value stored in nextInterval, and writing (updating) is performed in the nextInterval area.
Further, in the case of the slave device 400 in which the synchronization message transmission interval is set to 32 PPS, 128 ÷ 32 = 4, and 4 is added to the value stored in the nextInterval, and writing (updating) is performed in the nextInterval area.

When receiving the transmission pulse from the scheduler 141, the sync generation unit 135 reads data from the SMID table and the SMID profile. Since the address has already been determined by the scheduler 141, there is no need to read the address. Also, the Sync generation unit 135 reads a global profile common to all the synchronization messages, and assembles the synchronization message shown in FIG. The assembly process is completed with a simple field movement. Since a random value is expected for the ID area, the sync generation unit 135 inserts a random value using a random value generator. The random value generator used by the sync generation unit 135 may be any random value generator that can generate a random value, and a known random value generator can be used.
The sync generator 135 outputs the synchronization message to the SYNC message FIFO 139 immediately after the assembly of the synchronization message is completed.

  The Sync transmission unit 136 has a register area in which a synchronization message transmission rule can be set from the CPU 170. In this register, it is possible to set one of three types of transmission methods: (1) forced discard method (Discard), (2) high-priority transmission method (H. Priority), and (3) transmission time reservation method (Reserved). It is. For example, the administrator of the grand master clock device 100 sets the synchronization message transmission rule in consideration of the characteristics of the network to which the grand master clock device 100 is applied.

(1) In the forced discard method, when the synchronization message transmission timing arrives, transmission of packets other than all currently transmitted synchronization messages (general message packets; hereinafter referred to as CPU packets) is interrupted, and the synchronization message is transmitted. This is the transmission method. For packets for which transmission has been interrupted, discard processing is performed until the end of the packet.
This is a particularly effective method when the partner apparatus detects an error but can expect retransmission by an upper layer.
(2) In the high-priority transmission method, when the synchronization message transmission timing arrives, the CPU waits for the completion of the currently transmitted CPU packet and always transmits the synchronization message in the next transmission. Even if CPU packets are issued continuously, the synchronization message is transmitted with the highest priority.
(3) In the transmission time reservation method, paying attention to the fact that the maximum value of the CPU packet is determined to be 1518 bytes according to Ethernet (registered trademark), 1518 bytes before the synchronous message transmission timing (actually, IFG Since the FCS exists, transmission of a new CPU packet is suppressed at the time of 1542 octets (before octet time). As a result, the synchronization message can be reliably transmitted after 1542 octets have elapsed. Note that 1542 octets correspond to an example of a specified time specified as a time required for sending a general message. The CPU packet corresponds to an example of a synchronization message and a general message.
In the transmission time reservation method, the transmission interval of messages is always constant by starting the transmission of a synchronous message when 1542 octet time passes. In time synchronization, the arrival speed of a message is not a problem, and the interval between messages and the accuracy of the time stamp in the message are important. Therefore, the transmission time reservation method is effective. Further, since the transmission of the CPU packet is stopped only when there is a synchronization message in the transmission time reservation method, even when the synchronization message transmission interval (Sync interval) is long, such as when the number of slave devices 400 is small, the CPU message Can be sent efficiently.
Here, the maximum time required for sending a general message is defined as the specified time. However, the specified time is not limited to this and may be any time required for sending a general message. Even in this case, the synchronization message transmission interval is constant.

The reception time stamp unit 131 performs a process of stamping the time information obtained from the precision time counter unit 142 on the received time synchronization packet.
The transmission time stamp unit 137 performs processing for stamping the time information obtained from the precision time counter unit 142 for the time synchronization packet to be transmitted.
Both the reception time stamp unit 131 and the transmission time stamp unit 137 recognize the time synchronization packet and stamp the time information. Since the synchronization message is also a time synchronization packet, the transmission time stamp unit 137 stamps accurate time information on the synchronization message.

  The physical layer chip 120 performs conversion processing between the physical interface of the network 810 and the physical interface of the MAC unit 130.

FIG. 13 is an explanatory diagram showing an example of the data structure of the synchronization message. The MSB on the left side of the figure is data that is first transmitted to the network 810. The inter frame gap (IFG) is required to be at least 12 octets as defined by Ethernet (registered trademark). The inter frame gap is provided to separate frames.
The preamble + FSD is composed of a 7-octet preamble and a 1-octet FSD (frame start delimiter). preamble + FSD is a flag area indicating that the payload of the Ether packet starts thereafter.

  The IEEE 1588v2 synchronization message (Sync message) is an area in which a synchronization message having a format defined by IEEE 1588v2 is stored. The IEEE 1588v2 synchronization message is composed of a plurality of elements shown in FIG. 8 and transmits time information from the grand master clock device 100 to the slave device 400. The size of the IEEE 1588v2 synchronization message is a fixed length, and is 86 bytes when the synchronization message is configured by UDP.

  FCS is a frame check sequence, which is a checksum area that is uniquely calculated from the data area of an Ether packet. The FCS is provided so that the packet can be discarded when a failure occurs on the transmission path and the data area of the packet cannot be trusted. The FCS may be used as an index indicating the line quality.

  When all the elements of the synchronization message are combined, the size becomes 110 octets. Since 1 octet is composed of 8 bits, 110 octets are 880 bits. Here, in order to convert how much the 880 bits have an effect on the bandwidth, the packet occupation time when transmitting at the line rate of 10 gigabits per second (Gbps) and 1 gigabit per second is calculated. Is 88 nanoseconds and 1 gigabit per second is 880 nanoseconds. Here, it is noted that the synchronization message can be issued up to 128 times per second. 8265, and 1 second / 128 times = 7,812,500 nanoseconds. Therefore, when performing time synchronization with respect to a single slave device 400, a synchronization message can be transmitted without any problem at any line rate of 10 gigabits per second or 1 gigabit per second.

  FIG. 14 is an explanatory diagram illustrating an example of a synchronization message transmission interval in a network in which a plurality of slave devices 400 exist. In the figure, the worst case of the transmission interval of the synchronization message is shown. Specifically, an example in which the network bandwidth is most tight is shown. As described above, each synchronization message has a minimum interval of 7,812,500 nanoseconds. FIG. 14 shows a case where this synchronization message is sent to 500 slave devices 400.

  The 7,812,500 nanoseconds is further divided into 500, which is the number of slave devices 400. The transmission interval of the synchronization message that can be assigned to one slave device 400 is 7,812,500 nanoseconds / 500 = 15,625 nanoseconds. This 15,625 nanoseconds is defined as the minimum time interval for the synchronization message. Among the packet occupation times described with reference to FIG. 13, 15,625 nanoseconds> 880 nanoseconds even at 1 gigabit per second where the line speed is the slowest and the transmission time of one synchronization message is the longest. Therefore, when focusing on the synchronization message, the bandwidth can be secured. However, it is necessary to distribute the product of the number of slave devices 400 controlled by the grand master clock device 100 at a time × SYNC interval of each slave device 400 to an appropriate value according to the communication amount other than the synchronization message. The SYNC interval can be set for each slave device 400.

In FIG. 14, SyncID 0 is assigned to the first Sync slot at the beginning of one second, and SyncID is counted up to 127 at the maximum. The SyncID becomes 127 after becoming 127. In addition, an SMID is introduced to generate a timing for sending a synchronization message, and an area for storing information related to the slave device 400 is provided in association with each SMID.
The SMID takes a positive integer value from 0 to 499, and is configured to count up in 15,625 nanoseconds. Note that the synchronization message information for the same slave device 400 must be associated with the same SMID. For example, the manager of the grand master clock device 100 determines which SMID is used. In order to make the synchronization message interval constant, the SMID corresponding to one slave device 400 needs to be unique.
SyncID corresponds to an example of the first counter. The SMID corresponds to an example of the second counter.

FIG. 15 is an explanatory diagram showing an example of the data structure of the SMID table.
The SMID table includes an 11-bit area for registering the SMID, a SyncInterval area that is a transmission interval of the synchronization message, a NextInterval for determining the next transmission timing when the synchronization message corresponding to the SMID is transmitted, and one by one. And a sequence ID with which data is incremented. NextInterval is a value determined by 128 / SyncInterval, and is updated after sending the synchronization message. The sequenceID is written by incrementing the read value by one. In the slave device 400, this sequence ID is used to confirm that the SYNC message is not lost or the order is not reversed.

FIG. 16 is an explanatory diagram illustrating an example of the operation of the scheduler 141. The scheduler 141 is configured by hardware, and executes the processes in steps S101 to S110 in FIG. 16 and the processes in steps S120 to S130 in parallel.
When acquiring the pulse per second from the precision time counter unit 142, the scheduler 141 executes Step S101. In step S101, the scheduler 141 executes SyncID, SMID, SMID. Execute zero clear of the counters of the counters. SMID. The counter is a counter for detecting the timing for incrementing the SMID by one.

In step S102, the scheduler 141 determines whether or not the timing for transmitting the synchronization message has arrived. Specifically, the scheduler 141 performs SMID. It is determined whether the value of counter is 15,625 nanoseconds which is the time boundary of SMID. SMID. That the value of counter is a time boundary indicates that it is timing to transmit a synchronization message.
If it is determined that it is a time boundary (step S102: YES), the scheduler 141 increments the SMID by 1 in step S103. As a result, the process proceeds to the next SMID process.
In step S104, the scheduler 141 clears SMID.counter to 0 and generates SMIDpulse for the processing in step S120. This SMIDpulse indicates that the minimum cycle (128 PPS) for sending the synchronization message has elapsed. After step S104, the process proceeds to step S105.

On the other hand, in step S102, SMID. When it is determined that the counter has not reached 15,625 nanoseconds (step S102: NO), the scheduler 141 determines in step S110 that SMID. The counter is incremented by 1, and the process proceeds to step S102.
In step S105, the scheduler 141 determines whether or not the SMID has reached its maximum value of 499.

If it is determined that the SMID has not reached 499 (step S105: NO), the process proceeds to step S102 because there is still an unprocessed SMID.
On the other hand, if it is determined that the SMID has reached 499 (step S105: YES), it means that all SMID processing has been completed, so the scheduler 141 sets SMID = 0, that is, the initial value in step S106. To do.

In step S107, the scheduler 141 increments SyncID by 1. Thereby, the process proceeds to the next SyncID process.
In step S108, the scheduler 141 determines whether all SyncID processing has been completed. Specifically, the scheduler 141 determines whether or not SyncID is 127.
When it is determined that SyncID is 127 (step S108: YES), in step S109, the scheduler 141 sets SyncID = 0. After step S109, the process proceeds to step S102.
On the other hand, if it is determined in step S108 that the SyncID is other than 127 (step S108: No), the process proceeds to step S102 because there is a SyncID to be processed.

In step S120, the scheduler 141 determines whether SMIDpulse has occurred, that is, whether the synchronous message transmission timing has arrived.
When it is determined that the synchronization message transmission timing has arrived (step S120: YES), the process proceeds to step S121.
In step S121, the scheduler 141 converts the DPRAM address into a head address where the SMID is stored.

In step S122, the scheduler 141 acquires NextInterval based on the offset value for which the head address is determined.
In step S123, the scheduler 141 determines whether the NextInterval acquired in step S122 is the same as the SyncID. When it determines with it not being the same (step S123: No), it changes to step S120. As a result, the SMIDpulse wait state is entered.

On the other hand, when it is determined that SyncID and NextInterval are the same (step S123: Yes), it is the timing to send the synchronization message, and the process proceeds to step S124.
In step S124, the scheduler 141 reads SyncInterval from the SMID table.
In step S125, the scheduler 141 calculates 128 / SyncInterval in order to update the current NextInterval.

In step S126, the scheduler 141 writes a value obtained by adding 128 ÷ SyncInterval to NextInterval in the SMID table. If the value of NextInterval is greater than 127 as a result of addition, a value obtained by subtracting 128 from the value is written in the SMID table.
In step S127, the scheduler 141 reads sequenceID from the SMID table.
Since IEEE1588v2 defines that sequenceID is incremented by 1, in step S128, scheduler 141 performs sequenceID increment processing.

In step S129, the scheduler 141 writes the sequence ID back to the SMID table.
Since the processing related to the series of synchronization messages is completed as described above, in step S130, the scheduler 141 transmits the synchronization message transmission pulse to the sync generation unit, and the process proceeds to step S120.

FIG. 17 is an explanatory diagram showing an example of the flow of data when sending a synchronous message.
In the figure, a transmission FIFO 133 is a FIFO memory in which packets (CPU packets) other than the synchronization message among all transmission packets from the grand master clock device 100 are temporarily stored.
In each packet, in addition to packet information, SOF (start of frame) and EOF (end of frame) are attached to the front and back to clarify the break between packets.
TFIFO.EmptyFlag is a flag for notifying that the transmission FIFO 133 is empty.

TFIFO.ReadPulse is a 1-clock (CLK) pulse signal for reading the bit width (hereinafter, 1 line) on the read side of the FIFO. When sending data continuously, TFIFO.ReadPulse may be continuously asserted.
TFIFO. DATA is packet data other than EOF, SOF, or a synchronization message that is output one cycle after the pulse signal of TFIFO.ReadPulse.

The SYNC message FIFO 139 is an area for storing a synchronization message. Specifically, the synchronization message generated by the SYNC generation unit 135 is stored in the SYNC message FIFO 139.
SFIFO.EmptyFlag is a flag indicating the presence or absence of a synchronization message.
SFIFO. ReadPulse is a read pulse for performing the same operation as TFIFO.ReadPulse on the SYNC message FIFO.

SFIFO. DATA is one line of data constituting a synchronization message that is output after one cycle of the read pulse.
The Sync sending unit 136 has a Sync Transmit rule ID area for selecting one of (1) forced discarding method, (2) high priority sending method, and (3) transmission time reservation method. Then, the SYNC sending unit 136 reads packet data from either the transmission FIFO 133 or the SYNC message FIFO 139 according to the rule set in the Sync Transmit rule ID area. Then, the Sync transmission unit 136 outputs the transmission data and DataEnable indicating that the transmission data is valid to the transmission time stamp unit 137 which is a subsequent processing block.

FIG. 18 is an explanatory diagram illustrating an example of an operation performed by the Sync sending unit 136 in the case of the forced discard method.
In step S201, the sync sending unit 136 resets a counter and waits for a SYNC transmission start signal from the OS.
Next, the process proceeds to step S202, where the SYNC sending unit 136 sets DataEnable = 0. The above is the preprocessing.

In step S203, the SYNC sending unit 136 refers to SFIFO.EmptyFlag to determine whether there is a synchronization message. If it is determined that there is a synchronization message (step S203: Not Empty), the process proceeds to step S204, where the SFIFO. Select DATA.
In S205, SYNC sending unit 136 sets DataEnable = 1.
Thereafter, the process proceeds to step S203, and the transmission process is continued until the transmission of the synchronization message is completed.

On the other hand, when it is determined in step S203 that there is no synchronization message (step S203: Empty), the process proceeds to step S210, where TFIFO. It is determined whether or not the transmission FIFO 133 is empty with reference to the EmptyFlag.
When it is determined that the transmission FIFO 133 is empty (step S210: Empty), the process proceeds to step S202.

On the other hand, when it is determined that the transmission FIFO 133 is not empty (step S210: Not Empty), the process proceeds to step S211, and the SYNC transmission unit 136 transmits the transmission data = TFIFO. DATA.
In step S212, the SYNC sending unit 136 sets DATAEnable = 1 and executes packet transmission processing other than the synchronization message (that is, CPU packet transmission processing).

In step S213, the SYNC sending unit 136 refers to SFIFO.EmptyFlag to determine whether there is a synchronization message.
When it is determined that there is no synchronization message (step S213: Empty), the SYNC transmission unit 136 continues the packet transmission processing other than the synchronization message.
On the other hand, if it is determined that a synchronization message exists (step S213: Not Empty), the process branches to step S204 and step S213. In addition, the process after step S204 and the process after step S213 are performed by simultaneous parallel processing.

In step S214, the SYNC sending unit 136 discards the data in the transmission FIFO 133 (TFIFO.DATA = discard).
In step S215, the SYNC sending unit 136 continues the data read from the transmission FIFO 133.
In step S216, the SYNC sending unit 136 determines whether the data read from the transmission FIFO 133 is EOF (TFIFO.DATA = EOF).

When it determines with it being EOF (step S216: EOF), it changes to step S203.
On the other hand, when it determines with other than EOF (step S216: Not EOF), it changes to step S214. In this case, the discarding process is continued in the loop of steps S214 to S216 until one packet of data is read from the transmission FIFO 133 (until EOF).

FIG. 19 is an explanatory diagram illustrating an example of an operation performed by the Sync transmission unit 136 in the case of the high priority transmission method.
In step S301, the sync sending unit 136 resets a counter and waits for a SYNC transmission start signal from the OS.
In step S302, the SYNC sending unit 136 sets DataEnable = 0.

In step S303, the SYNC sending unit 136 performs SFIFO. It is determined whether a synchronization message exists with reference to EmptyFlag. When it is determined that the synchronization message exists (step S303: Not Empty), the synchronization message is transmitted in steps S304 to S305.
On the other hand, when it is determined in step S303 that there is no synchronization message (step S303: Empty), the process proceeds to step S310.

In step S310, the SYNC sending unit 136 performs TFIFO. It is determined whether data (synchronization message) exists in the transmission FIFO 133 with reference to the EmptyFlag. When it is determined that the transmission FIFO 133 is empty (no synchronization message exists) (step S310: Empty), the process proceeds to step S303.
On the other hand, when it is determined that data exists in the transmission FIFO 133 (step S310: Not Empty), a general message is sent out in steps S311, S312 and S313.

In step S313, the SYNC sending unit 136 performs TFIFO. It is determined whether it is EOF with reference to DATA. When it determines with it being EOF (step S313: EOF), it changes to step S302.
On the other hand, when it determines with other than EOF (step S313: Not EOF), it changes to step S310.

FIG. 20 is an explanatory diagram illustrating an example of an operation performed by the Sync sending unit 136 in the case of the transmission time reservation method.
In the transmission time reservation method, the synchronization message starts to be sent after waiting for 1542 octet time which is the maximum packet size of IPv4. In a wait state where a synchronization message exists, WaitFlag = 1. WaitFlag is evaluated only when transmission of a normal packet (CPU packet) is started. When WaitFlag = 1, the normal packet is in a transmission suppression state. On the other hand, evaluation of WaitFlag is not performed during transmission of a normal packet. In addition, in the transmission time reservation method, the first routine for monitoring the status of the synchronization message and the operation of the WaitFlag and the second routine for starting transmission if WaitFlag = 0 at the start of normal packet transmission are simultaneously performed. Executed.

  In the processing of FIG. 20, in each of step S401 and step S420, the sync sending unit 136 resets a counter and waits for a SYNC transmission start signal from the OS. Note that the START1 state in step S401 and the START2 state in step S420 are started simultaneously.

In step S402, the SYNC sending unit 136 sets DataEnable = 0.
In step S403, the SYNC sending unit 136 sets WaitFlag = 0.
In step S404, the SYNC transmission unit 136 performs SFIFO. Referring to EmptyFlag, it is determined whether or not a synchronization message exists.
When it is determined that a synchronization message exists (step S404: Not Empty), the process proceeds to step S405.

  On the other hand, when it is determined that there is no synchronization message (the SYNC message FIFO 139 is empty) (step S404: Empty), the process proceeds to step S404. That is, a loop process for re-evaluating step S404 is executed.

In step S405, the SYNC sending unit 136 substitutes SendWait = 1542, and the process proceeds to step S406.
In step S406, the SYNC sending unit 136 sets WaitFlag = 1 and advances the process to step S407.
In step S407, the SYNC sending unit 136 decrements SendWait by 1.
In step S408, the SYNC sending unit 136 determines whether SendWait is 0 or not. When it is determined that SendWait is not 0 (step S408: No), the process proceeds to step S407. In this case, the loop processing of steps S407 to S408 is executed until SendWait = 0.

When it is determined in step S408 that SendWait = 0 (step S408: Yes), the process proceeds to step S409.
In step S409, the SYNC sending unit 136 selects a synchronization message as transmission data (transmission data = SFIFO.DATA).
In step S410, the SYNC sending unit 136 sets DataEnable = 1.

In step S411, the SYNC sending unit 136 performs SFIFO. It is determined whether or not the transmission FIFO 133 is empty with reference to the EmptyFlag.
When it is determined that the transmission FIFO 133 is empty (step S411: Empty), the process proceeds to step S402.
On the other hand, if it is determined that the transmission FIFO 133 is not empty (there is a synchronization message) (step S411: Not Empty), the process proceeds to step S408. In this case, the transmission of the synchronization message is continued.

In step S421, the SYNC sending unit 136 performs TFIFO. It is determined whether or not the transmission FIFO 133 is empty with reference to the EmptyFlag.
When it is determined that the transmission FIFO 133 is empty (step S421: Empty), the process proceeds to step S421. That is, a loop process for re-evaluating step S421 is executed.

On the other hand, when it is determined that the transmission FIFO 133 is not empty (step S421: Not Empty), that is, when it is determined that a general message exists, the process proceeds to step S422.
In step S422, the SYNC sending unit 136 determines whether WaitFlag is 0 or not. When it is determined that WaitFlag is not 0 (WaitFlag = 1) (step s422: No), that is, when it is the waiting time for sending a synchronous message, the process proceeds to step S421.
When it is determined that WaitFlag = 0 (step S422: Yes), that is, when it is determined that it is not a synchronous message transmission waiting time, the process proceeds to step S423.
In step S423, the SYNC sending unit 136 transmits the TFIFO. Select DATA.
In step S424, DataEnable = 1.
Thereafter, in step S425, the SYNC sending unit 136 sets the TFIFO. It is determined whether DATA = EOF.
When it determines with it being EOF (step S425: EOF), it changes to step S426. On the other hand, when it determines with other than EOF (step S425: Not EOF), it changes to step S423. In this case, transmission of CPU packets (packets other than synchronization messages) is continued.
In step S426, the SYNC sending unit 136 sets DataEnable = 0, and the process proceeds to step S421.

FIG. 21 is an explanatory diagram showing how much transmission waiting occurs in the transmission time reservation method.
The constituent elements of the packet shown in the figure are the same as those in FIG.
In FIG. 21, the SMID slot length is a time interval that can be assigned to one synchronization message when it is assumed that 128 synchronization messages of 128 messages are transmitted to 500 slaves per second. SMID slot length = 15,625 ns indicates that the minimum value of the synchronization message transmission interval is 15,625 nanoseconds.
A packet of 1542 octets indicates a packet having a maximum packet length of IPv4. 1542 octets are 12336 bits, and when the line speed is 10 Gbps, the time required for transmission is 1234 nanoseconds. Further, when the line speed is 10 Gbps, the time required for transmitting the packet is 12336 nanoseconds. Both are shorter than 15625 nanoseconds and can be transmitted at a synchronous message transmission interval.

As described above, the Sync generation unit 135 that generates the synchronization message is provided in a lower layer than the CPU 170 that generates the general message.
As a result, the Sync generation unit 135 can generate a synchronization message without being affected by time fluctuations due to processing performed by the CPU 170, and can reduce fluctuations in the transmission interval of synchronization packets in the grandmaster clock device 100. it can.
In particular, after the MAC unit 130 executes ARP (Address Resolution Protocol), the sync generation unit 135 generates a synchronization message, thereby reducing the influence of ARP having a large fluctuation in execution time.

In addition, a scheduler 141 that determines whether or not it is a synchronous message transmission timing is provided in a lower layer than the CPU 170 that generates a general message.
Thereby, the scheduler 141 can detect the transmission timing of the synchronization message without being affected by the fluctuation of the time due to the processing performed by the CPU 170, and can reduce the fluctuation of the transmission interval of the synchronization packet in the grand master clock device 100. Can do.

In addition, the global profile storage unit 134-1 stores a global profile that is data having the same value in all the synchronization messages transmitted by the same grand master clock device 100 among the data used for generating the synchronization message. . The SMID profile storage unit 134-2 has the same value in the synchronization message transmitted from the same grand master clock device 100 and transmitted to the same slave device 400 among the data used for generating the synchronization message. The SMID profile that is data is stored for each slave device 400. The SMID table storage unit 134-3 stores an SMID table indicating data having different values for each simultaneous message among data used for generating a synchronization message. The sync generation unit 135 then reads the global profile read from the global profile storage unit 134-1, the SMID profile read from the SMID profile storage unit 134-2 for the slave device 400 that is the target of sending the synchronous message, and the SMID. A synchronization message is generated by combining data generated based on the SMID table read from the table storage unit 134-3. The data generated by the Sync generation unit based on the SMID table is data having a different value for each synchronization message, such as sequenceID in which the data is incremented by one as described with reference to FIG.
As described above, the Sync generation unit 135 can generate a synchronization message by a simple process of combining the global profile, the SMID profile, and the data generated based on the data read from the SMID table storage unit 134-3. .

Also, SyncID is counted (incremented by 1) at every interval defined as the minimum value of the synchronization message transmission interval for the same slave device 400. The SMID counts (increments by 1) every interval obtained by further dividing the minimum value of the synchronization message transmission interval for the same slave device 400 by the number of time synchronization target devices. Then, the scheduler 141 determines whether or not it is timing to send a synchronization message to the slave device 400 indicated by the SMID, based on the value of SyncID.
Accordingly, the scheduler 141 can detect the synchronization message transmission timing by a simple process of comparing the value of SyncID with the value associated with the slave device 400 indicated by the SMID.

In addition, when the sync sending unit 136 determines that the timing of sending the synchronization message is reached by the scheduler 141, if the general message that is a message other than the synchronization message is being sent, the sending of the general message is interrupted and the synchronization message is sent. Send a message.
As a result, the Sync sending unit 136 can send the synchronization message immediately when the sending timing of the synchronization message arrives, even if the general message is being sent. In this regard, the grand master clock device 100 can send a synchronization message without time fluctuation.

Also, if the sync sending unit 136 determines that the scheduler 141 is the sending timing of the synchronization message, the sync sending unit 136 suppresses new sending of a general message that is a message other than the synchronization message.
Thereby, the Sync sending unit 136 can send the synchronization message with priority even when there are a plurality of general messages to be sent. In this regard, the grand master clock device 100 can reduce fluctuations in the synchronization message transmission interval.

Further, when the sync sending unit 136 determines that the scheduler 141 is the sending timing of the synchronization message, the sync sending unit 136 suppresses sending of a new synchronization message and a general message, and a specified time defined as a time required for sending the general message. After the elapse, send a synchronization message.
As a result, the Sync sending unit 136 can always send a synchronous message from a state where no message is sent after a stipulated time specified as a time required for sending a message has elapsed. In this respect, the grand master clock device 100 can immediately send out the synchronization message when the sending timing of the synchronization message arrives, and can reduce fluctuations in the sending interval of the synchronization message.
Further, only when the scheduler 141 determines that it is a synchronous message transmission timing, the frequency of the transmission of the general message is limited in that the Sync transmission unit 136 suppresses the transmission of a new synchronous message and a general message. In this respect, the grand master clock device 100 can reduce a delay in sending a general message.

When the sync sending unit 136 sends the synchronization message as a mode, the scheduler 141 determines that it is the sending timing of the synchronization message. If the general message is being sent, the sending of the general message is interrupted and the synchronization message is sent. When it is determined that the message sending mode and the scheduler 141 are the sending timing of the synchronization message, the mode for suppressing the sending of a new general message and when the scheduler 141 judges that the sending timing of the synchronization message is the new synchronization message It is possible to select one of at least two modes out of the modes for sending out the synchronization message after the stipulated time specified as the time required for sending out the general message is suppressed by sending out the message and the general message. .
Thus, the user can select one of the above modes according to the operation status of the grand master clock device 100.

The present invention is applicable to various time synchronization scenes. For example, the present invention may be applied to the following.
1. 1. GMC device according to the present application used for time synchronization and frequency synchronization between mobile base stations. 2. GMC device according to the present application used for time and frequency synchronization of each sensor of the sensor network. 3. GMC device according to the present application used to synchronize the operation time of a protection relay device of a power substation. 4. GMC device according to the present application used for synchronizing the time and frequency of cameras, recording equipment, video and video signal transmission devices, management consoles, and server groups in the AV field such as audio and video. 5. GMC device according to the present application used for time and frequency synchronization in an in-vehicle network The GMC device described in the present application used for time and frequency synchronization in an environment in which centralized setting is executed and configured by a plurality of devices such as SDN and NFV

Note that a program for realizing all or part of the functions of the grand master clock device 100 is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into a computer system and executed. You may process each part by. Here, the “computer system” includes an OS and hardware such as peripheral devices.
Further, the “computer system” includes a homepage providing environment (or display environment) if a WWW system is used.
The “computer-readable recording medium” refers to a storage device such as a flexible medium, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Furthermore, the “computer-readable recording medium” dynamically holds a program for a short time like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. In this case, a volatile memory in a computer system serving as a server or a client in that case, and a program that holds a program for a certain period of time are also included. The program may be a program for realizing a part of the functions described above, and may be a program capable of realizing the functions described above in combination with a program already recorded in a computer system.

  The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and includes design changes and the like without departing from the gist of the present invention.

100 Grand Master Clock Device 110 GNSS Synchronous Frequency Oscillator 111 GNSS Receiver 112 Clock Adjuster 113 Crystal Oscillator 120 Physical Layer Chip 130 Media Access Controller 131 Reception Time Stamp Unit 132 Reception FIFO
133 Send FIFO
134 Sync Profile Storage Unit 134-1 Global Profile Storage Unit 134-2 SMID Profile Storage Unit 134-3 SMID Table Storage Unit 135 Sync Generation Unit 136 Sync Sending Unit 137 Transmission Timestamp Unit 139 Sync Message FIFO
141 Scheduler 142 Precision Time Counter Unit 150 Quartz Crystal 160 Main Memory 170 CPU
171 Hardware access unit 172 Driver 173 OS kernel 174 GNSS management daemon 175 Protocol stack 176 Delayreq transmission processing unit 177 Sync registration processing unit 181 Memory controller

Claims (10)

A synchronization message sending device for sending a synchronization message including time information,
A synchronization message generator for generating the synchronization message;
A general message generator that generates a general message that is a message other than the synchronization message;
A sending unit for sending the synchronization message and the general message;
With
The synchronization message generator is provided in a lower layer than the general message generator,
Synchronous message sending device. A global profile storage unit that stores a global profile that is data having the same value in all the synchronization messages transmitted by the same synchronization message transmission device among the data used to generate the synchronization message;
Of the data used to generate the synchronization message, the SMID profile, which is data sent from the same synchronization message sending device and having the same value in the synchronization message sent to the same time synchronization target device, A SMID profile storage unit for storing each synchronization target device;
Among the data used for generating the synchronization message, a SMID table storage unit that stores a SMID table indicating data that is different for each time synchronization message;
With
The synchronization message generator includes a global profile read from the global profile storage unit, a SMID profile read from the SMID profile storage unit for a time synchronization target device that is a synchronization message transmission target, and the SMID table storage unit. A synchronization message is generated by combining the data generated based on the SMID table read from
The synchronous message transmission apparatus according to claim 1. A scheduler unit for determining whether or not the synchronization message is transmitted;
The sending unit sends out the synchronization message when the scheduler unit determines that it is the sending timing of the synchronization message,
The scheduler unit is provided in a lower layer than the general message generation unit,
The synchronous message transmission device according to claim 1 or 2. A first counter that counts at intervals defined as the minimum value of the synchronization message transmission interval for the same time synchronization target device;
A second counter that counts for each interval further divided by the number of time synchronization target devices, the minimum value of the synchronization message transmission interval for the same time synchronization target device,
The scheduler unit determines whether it is time to send a synchronization message to the time synchronization target device indicated by the second counter based on the value of the first counter,
When the sending unit determines that it is time to send the synchronization message by the scheduler unit, the sending unit sends the synchronization message.
The synchronous message transmission apparatus according to claim 3.   The sending unit, when the scheduler unit determines that it is a sending timing of a synchronization message, interrupts the sending of the general message and sends the synchronizing message if the general message is being sent. The synchronous message transmission device according to claim 3 or claim 4.   5. The synchronous message transmission device according to claim 3, wherein the transmission unit suppresses transmission of a new general message when the scheduler unit determines that it is a synchronous message transmission timing.   When the sending unit determines that the timing of sending the synchronization message is determined by the scheduler unit, the sending unit suppresses sending of a new synchronization message and a general message, and a specified time specified as a time required for sending the general message has elapsed. 5. The synchronization message transmission apparatus according to claim 3, wherein the synchronization message is transmitted after the operation is performed.   As a mode in which the sending unit sends the synchronization message, when the scheduler unit determines that it is the sending timing of the synchronization message, if the general message is being sent, the sending of the general message is interrupted, When it is determined that the mode for sending a synchronization message and the scheduler unit is the timing for sending a synchronization message, the mode for suppressing the sending of a new general message and the scheduler unit is determined to be the timing for sending a synchronization message, Any one of at least two modes out of the modes for sending out the synchronization message after the stipulated time specified as the time required for sending out the general message is suppressed after sending out the new synchronization message and the general message. Or accepting a selection of claim 3 or Synchronous message transmission device according to Motomeko 4. A synchronization message sending device and a time synchronization target device;
The synchronous message sending device comprises:
A synchronization message sending device for sending a synchronization message including time information,
A synchronization message generator for generating the synchronization message;
A general message generator that generates a general message that is a message other than the synchronization message;
A sending unit for sending the synchronization message and the general message;
With
The synchronization message generator is provided in a lower layer than the general message generator,
The time synchronization target device is:
Based on the synchronization message sent by the synchronization message sending device, time synchronization with the synchronization message sending device is performed.
Time synchronization system. A synchronization message sending method of a synchronization message sending device for sending a synchronization message including time information,
A synchronization message generating step for generating the synchronization message;
A general message generation step of generating a general message that is a message other than the synchronization message;
A sending step for sending the synchronization message and the general message;
Have
The synchronization message generation step is executed in a lower layer than the general message generation step.
Synchronous message sending method.

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