JP6354283B2 - Semiconductor module and semiconductor device - Google Patents

Semiconductor module and semiconductor device Download PDF

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Publication number
JP6354283B2
JP6354283B2 JP2014087941A JP2014087941A JP6354283B2 JP 6354283 B2 JP6354283 B2 JP 6354283B2 JP 2014087941 A JP2014087941 A JP 2014087941A JP 2014087941 A JP2014087941 A JP 2014087941A JP 6354283 B2 JP6354283 B2 JP 6354283B2
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semiconductor
main electrode
semiconductor module
direction
semiconductor device
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JP2015207685A (en
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健太 江森
健太 江森
卓 下村
卓 下村
林 哲也
林  哲也
啓一郎 沼倉
啓一郎 沼倉
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日産自動車株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

  The present invention relates to a semiconductor module for power conversion and a semiconductor device in which a plurality of semiconductor modules are arranged close to each other.

  Conventionally, as a semiconductor module constituting a three-phase inverter, there is a 2-in-1 type semiconductor module in which a plurality of semiconductor elements such as IGBTs are packaged in one package with upper and lower arms. In this 2-in-1 type semiconductor module, the emitter electrode of the upper arm and the collector electrode of the lower arm are connected in the package.

  Conventionally, as disclosed in Patent Document 1, there is also a 1 in 1 type semiconductor module in which an upper arm and a lower arm are individually packaged.

Japanese Patent Application Laid-Open No. 2008-217176

  However, in the conventional 1 in 1 type semiconductor module described above, since the emitter electrode and the collector electrode are independently provided outside the module, there is a problem that the inductance is increased as compared with the 2 in 1 type semiconductor module. there were.

  Therefore, the present invention has been proposed in view of the above-described circumstances, and an object thereof is to provide a semiconductor module capable of reducing inductance even in a 1 in 1 type package.

  In order to solve the above-described problem, a semiconductor module and a semiconductor device according to one embodiment of the present invention include a vertical semiconductor element, a first main electrode connected to one main surface of the semiconductor element, and the semiconductor element. A second main electrode connected to the other main surface. The first main electrode supports and fixes the semiconductor element, the second main electrode is provided with an external connection terminal, extends in a direction different from the direction in which the connection terminal is provided, and extends to the side wall of the semiconductor module. ing.

  In the semiconductor module and the semiconductor device according to one aspect of the present invention, the current flowing through the second main electrode is arranged so as to flow in the opposite direction with respect to the other current, so that the inductance is reduced by the effect of canceling out the mutual inductance. be able to.

FIG. 1 is a cross-sectional view showing the structure of the semiconductor module according to the first embodiment of the present invention. FIG. 2 is a top view showing the structure of the semiconductor module according to the first embodiment of the present invention. FIG. 3 is a top view showing a structure of a semiconductor device in which two semiconductor modules according to the first embodiment of the present invention are arranged side by side. FIG. 4 is a cross-sectional view showing the structure of a semiconductor device in which two semiconductor modules according to the first embodiment of the present invention are arranged side by side. FIG. 5 is a circuit diagram showing a circuit configuration of a semiconductor device in which two semiconductor modules according to the first embodiment of the present invention are arranged side by side. FIG. 6 is a cross-sectional view showing the structure of a modification of the semiconductor module according to the first embodiment of the present invention. FIG. 7 is a cross-sectional view showing the structure of a modification of the semiconductor module according to the first embodiment of the present invention. FIG. 8 is a sectional view showing the structure of a modification of the semiconductor module according to the first embodiment of the present invention. FIG. 9 is a cross-sectional view showing the structure of a modified example of the semiconductor device in which two semiconductor modules according to the first embodiment of the present invention are arranged side by side. FIG. 10 is a cross-sectional view showing the structure of a semiconductor module according to the second embodiment of the present invention. FIG. 11 is a top view showing the structure of the semiconductor module according to the second embodiment of the present invention. FIG. 12 is a top view showing a structure of a semiconductor device in which two semiconductor modules according to the second embodiment of the present invention are arranged side by side. FIG. 13 is a cross-sectional view showing a structure of a semiconductor device in which two semiconductor modules according to the second embodiment of the present invention are arranged side by side. FIG. 14 is a cross-sectional view showing the structure of a modification of the semiconductor module according to the second embodiment of the present invention. FIG. 15 is a cross-sectional view showing the structure of a semiconductor device in which two semiconductor modules according to the third embodiment of the present invention are arranged side by side. FIG. 16 is a cross-sectional view showing the structure of a semiconductor device in which two semiconductor modules according to the third embodiment of the present invention are arranged side by side.

  Hereinafter, first to third embodiments to which the present invention is applied will be described with reference to the drawings.

[First Embodiment]
[Configuration of semiconductor module]
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor module according to this embodiment, and FIG. 2 is a top view. FIG. 1 is a cross-sectional view taken along line XX of FIG. 2, and FIG.

  As shown in FIGS. 1 and 2, the semiconductor module 1 according to the present embodiment includes a semiconductor element 3, a first main electrode 5, and a second main electrode 7.

  The semiconductor module 1 is a 1 in 1 type power semiconductor module that constitutes one of the upper and lower arms of the inverter, and is configured by sealing each of the above-described components with a resin 11. The resin 11 is preferably molded using a thermosetting resin such as epoxy by transfer molding, but may be sealed using PPS, gel, or the like. In the transfer molding method, since it is necessary to remove the mold after filling with resin and curing it, an angled taper 13 is formed on the side wall 21 of the semiconductor module 1. Thus, mass productivity can be improved by forming the semiconductor module 1 by resin-sealing by a transfer molding method.

  The semiconductor element 3 is a switching element such as a vertical IGBT or MOSFET in which current flows from the front surface to the back surface of the semiconductor substrate. When an IGBT is used as the switching element, a free-wheeling diode is required. However, if a MOSFET is used, the free-wheeling diode can be recirculated by a PN diode built in the element. Further, the semiconductor element 3 is electrically connected to the first main electrode 5 and the second main electrode 7 through the bonding material 9. The bonding material 9 may be any material that can be electrically connected, such as solder.

  In FIG. 2, two semiconductor elements 3 are provided. When both of these semiconductor elements 3 need to be connected to the signal terminals 15 by switching elements, the semiconductor elements 3 are arranged so that the bonding pads 19 of the respective semiconductor elements 3 face the same direction in which the signal terminals 15 are located. 3 is arranged. Thereby, when connecting between the bonding pad 19 and the signal terminal 15 by wire bonding, it can connect easily and the length of a wire can also be shortened. If the semiconductor element 3 is arranged in parallel to the signal terminal 15, the lengths of the wires connecting the signal terminal 15 and the bonding pad 19 can be made uniform. Furthermore, since the shape of the second main electrode 7 can be a simple square shape, the processing cost can be reduced.

  The first main electrode 5 is a die pad that supports and fixes the semiconductor element 3, is formed of a metal such as copper or aluminum, and is connected to one main surface of the semiconductor element 3. The first main electrode 5 is provided with a power terminal 17 which is a connection terminal to the outside, and is configured to allow a large current from the power source to flow. The lower surface of the first main electrode 5 is exposed from the resin 11, and this exposed portion is connected to a cooler via an insulating material. An insulating sheet or an insulating substrate may be used as the insulating material, and the cooler may be air-cooled or water-cooled.

  A signal terminal 15 is provided on the first main electrode 5. The signal terminal 15 is insulated from the first main electrode 5 by an insulating substrate (not shown), and is connected to the bonding pad 19 of the semiconductor element 3. As a connection method between the bonding pad 19 and the signal terminal 15, a wire bonding apparatus may be used to connect with a wire such as aluminum. The signal terminal 15 is for transmitting and receiving signals such as gate control, temperature sensing, and current sensing. FIG. 2 shows two signal terminals, but the number may be adjusted as necessary. . Further, since the signal terminal 15 needs to be connected to the control board of the inverter, the signal terminal 15 is exposed from the resin 11, but the exposed position is changed according to the position of the control board after securing the insulation distance from each part. be able to.

  The second main electrode 7 is formed of a metal such as copper or aluminum, and is connected to the other main surface of the semiconductor element 3. The second main electrode 7 is provided with a power terminal 18 which is a connection terminal to the outside, and is configured to allow a large current from the power source to flow. The shape of the second main electrode 7 extends in a direction different from the direction in which the power terminals 17 and 18 are provided, and extends to the side wall 21 of the semiconductor module 1. At this time, the second main electrode 7 extends as close to the surface of the side wall 21 as possible, and extends at least to the outside of the first main electrode 5. In addition, since the side wall 21 has a tapered shape, the second main electrode 7 is preferably formed so as to extend to a portion where the side wall 21 protrudes to the outermost side by the taper 13.

  Since the heat capacity can be ensured by widening the width of the second main electrode 7 in this manner, the thermal resistance can be reduced. Since the second main electrode 7 is not formed on the bonding pad 19, the step of connecting the bonding pad 19 and the signal terminal 15 with a wire is the step of connecting the semiconductor element 3 and the second main electrode 7. It can be done before or after. Therefore, the degree of freedom of the process can be improved.

[Configuration of semiconductor device]
Next, a configuration of a semiconductor device in which a plurality of the semiconductor modules described above are arranged close to each other will be described with reference to FIGS. FIG. 3 is a top view showing a configuration of a semiconductor device in which two semiconductor modules are arranged close to each other, and FIG. 4 is a cross-sectional view taken along line YY of FIG. In FIG. 3, the resin 11 is shown through.

  As shown in FIGS. 3 and 4, in the semiconductor device 100 according to the present embodiment, an upper arm and a lower arm of an inverter are individually configured by 1 in 1 type semiconductor modules 1A and 1B, and two semiconductor modules 1A and 1B are formed. The upper and lower arms are arranged close to each other.

  The power terminal 17P of the semiconductor module 1A is connected to the P side of the power source, and the power terminal 17N of the semiconductor module 1B is connected to the N side of the power source. Further, the power terminals 18A and 18B of the semiconductor modules 1A and 1B are connected to the output terminal of the inverter and supply power to a load such as a motor. A circuit diagram in this case is shown in FIG. In the case of configuring a three-phase inverter, the semiconductor device 100 having the configuration shown in FIGS. 3 and 4 is used as one upper and lower arm, and three of them are arranged to output UVW three-phase alternating current.

  In the arrangement shown in FIGS. 3 and 4, the semiconductor module 1B is rotated 180 degrees in a plane with respect to the semiconductor module 1A. With such an arrangement, in the two semiconductor modules 1A and 1B arranged close to each other, the side wall 21 in the direction in which the second main electrode 7 extends and extends faces each other. When a current is passed between the upper and lower arms, the current flowing through the second main electrode 7 of the semiconductor module 1A and the current flowing through the second main electrode 7 of the semiconductor module 1B flow in opposite directions. As a result, the inductance can be reduced by the effect of canceling out the mutual inductance.

  In addition, by setting the distance between the facing side walls 21 as an insulation distance, it is possible to arrange the shortest distance while ensuring a necessary insulation distance, so that the effect of inductance reduction by mutual inductance can be maximized. it can. The current flowing through the first main electrode 5 is also reversed between the semiconductor module 1A and the semiconductor module 1B, so that mutual inductance is generated and the inductance can be reduced.

  Further, since the semiconductor modules having the same structure are rotated by 180 degrees, the second main electrodes 7 of the upper and lower arms can be used by using one type of semiconductor module without changing the internal structure between the upper arm and the lower arm. The current that flows through can be reversed.

[Modification]
In the embodiment described above, the second main electrode 7 is directly connected to the semiconductor element 3 with the bonding material 9 such as solder. However, as shown in FIG. The two main electrodes 7 may be sandwiched and connected. By providing the column 23 in this manner, stress absorption and height adjustment of the second main electrode 7 can be performed.

  As another modification, in the above-described embodiment, the second main electrode 7 is not formed on the bonding pad 19. However, as shown in FIG. It may be formed to extend in the direction opposite to the side wall 21. As a result, the second main electrode 7 is formed on the bonding pad 19. Further, as shown in FIG. 8, the second main electrode 7 may be exposed from the resin 11. Thus, by exposing the 2nd main electrode 7 from the resin 11, the 2nd main electrode 7 can also be connected to a cooler via an insulating material, and both surfaces with the 1st main electrode 5 can be cooled. . Although not shown, the second main electrode 7 having the shape shown in FIG. 1 may be similarly exposed from the resin 11.

  Furthermore, as another modification, two semiconductor modules 1A and 1B are not installed on a plane as shown in FIG. 4, but on two slopes having a mountain shape as shown in FIG. Each may be arranged. At this time, the angle between the two slopes is set so that the two side walls 21 are parallel to each other. Thereby, since the distance between the semiconductor modules 1A and 1B can be made closer, the effect of canceling each other by the mutual inductance can be enhanced and the inductance can be further reduced.

[Effect of the first embodiment]
As described in detail above, in the semiconductor module 1 according to the present embodiment, the second main electrode extends in a direction different from the direction in which the connection terminals are provided, and extends to the side wall of the semiconductor module. Thus, if the side wall extending in the direction in which the second main electrode extends is arranged close to the current flowing portion such as the bus bar so that the current flows in the opposite direction, the mutual inductance is canceled out. The inductance can be reduced by the matching effect.

  Further, in the semiconductor module 1 according to the present embodiment, the side wall has a tapered shape, and the second main electrode extends to a portion where the side wall protrudes to the outermost side due to the tapered shape. As a result, the second main electrode can be brought closer to a portion where a current flows, such as a bus bar, so that the effect of canceling each other by the mutual inductance can be enhanced and the inductance can be further reduced.

  Furthermore, in the semiconductor module 1 according to the present embodiment, when the semiconductor module includes a plurality of semiconductor elements, the semiconductor elements are arranged so that the bonding pads of the plurality of semiconductor elements face the same direction. Thereby, the process of wire bonding which connects a bonding pad and a signal terminal can be performed easily.

  In the semiconductor module 1 according to this embodiment, the second main electrode is not formed on the bonding pad of the semiconductor element. Thereby, the process of connecting a bonding pad and a signal terminal can be implemented before and after the process of connecting a semiconductor element and a 2nd main electrode, and can improve the freedom degree of a process.

  Furthermore, in the semiconductor device 100 according to the present embodiment, in the two semiconductor modules arranged close to each other, the second main electrode is arranged so as to face the side wall in the direction in which the second main electrode extends and extends. Current flows in the opposite direction. Thereby, inductance can be reduced by the effect of mutual inductance canceling each other.

  In the semiconductor device 100 according to the present embodiment, the distance between the facing side walls in the two semiconductor modules arranged close to each other is defined as an insulation distance. Thereby, since it can arrange | position in the shortest distance, ensuring a required insulation distance, the effect of the inductance reduction by a mutual inductance can be maximized.

  Furthermore, in the semiconductor device 100 according to the present embodiment, two semiconductor modules arranged close to each other are arranged by being rotated 180 degrees in a plane. Thereby, the electric current which flows into the 2nd main electrode of each semiconductor module can be sent in the reverse direction by the semiconductor module of the same structure.

[Second Embodiment]
Next, a semiconductor module and a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings. In addition, the same number is attached | subjected to the component same as 1st Embodiment, and detailed description is abbreviate | omitted.

[Configuration of semiconductor module]
FIG. 10 is a cross-sectional view showing the configuration of the semiconductor module according to this embodiment, and FIG. 11 is a top view. 10 is a cross-sectional view taken along the line XX of FIG. 11, and FIG. 11 is a top view showing the resin 11 through.

  As shown in FIGS. 10 and 11, the semiconductor module 51 according to the present embodiment is different from the first embodiment in the shape of the second main electrode 57. That is, the second main electrode 57 extends in a direction different from the direction in which the power terminals 17 and 18 are provided and extends to the side wall 21, and also extends in the opposite direction to the side wall 25. The second main electrode 57 has a symmetrical shape with respect to the semiconductor element 3.

  Thus, by extending the second main electrode 57 from the side wall 21 to the side wall 25, the heat capacity can be increased and the thermal resistance can be reduced.

[Configuration of semiconductor device]
Next, a configuration of a semiconductor device in which a plurality of the semiconductor modules described above are arranged close to each other will be described with reference to FIGS. 12 is a top view showing a configuration of a semiconductor device in which two semiconductor modules are arranged close to each other, and FIG. 13 is a cross-sectional view taken along line YY of FIG. In FIG. 12, the resin 11 is shown through.

  As shown in FIGS. 12 and 13, in the semiconductor device 110 according to the present embodiment, the semiconductor module 51 </ b> B is rotated 180 degrees in a plane with respect to the semiconductor module 51 </ b> A as in the first embodiment. With such an arrangement, in the two semiconductor modules 51A and 51B arranged close to each other, the side wall 21 in the direction in which the second main electrode 57 extends and extends faces each other. When a current is passed between the upper and lower arms, the current flowing through the second main electrode 57 of the semiconductor module 51A and the current flowing through the second main electrode 57 of the semiconductor module 51B flow in opposite directions. As a result, the inductance can be reduced by the effect of canceling out the mutual inductance. Further, if the side walls 25 of the semiconductor modules 51A and 51B are arranged in the vicinity of a portion where current flows, such as a bus bar, and the current flows in the opposite direction, the inductance can be further reduced.

[Modification]
In the embodiment described above, the second main electrode 57 is not exposed from the resin 11, but the second main electrode 57 may be exposed from the resin 11 as shown in FIG. 14. Thus, by exposing the 2nd main electrode 57 from the resin 11, the 2nd main electrode 57 can also be connected to a cooler via an insulating material, and both surfaces with the 1st main electrode 5 can be cooled. . In particular, since the second main electrode 57 is formed from the side wall 21 to the side wall 25, the area is wide and the cooling efficiency can be further increased.

[Effects of Second Embodiment]
As described above in detail, in the semiconductor module 51 according to the present embodiment, the second main electrode extends in a direction different from the direction in which the connection terminals are provided, and also in a direction opposite to the extending direction. The second main electrode extends to the side wall of the semiconductor module. The second main electrode is symmetric with respect to the semiconductor element. Thereby, since the area of the 2nd main electrode expands, a thermal capacity can be increased and thermal resistance can be reduced.

[Third Embodiment]
Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to the drawings. In addition, the same number is attached | subjected to the component same as 1st and 2nd embodiment, and detailed description is abbreviate | omitted.

[Configuration of semiconductor device]
15 and 16 are cross-sectional views showing the configuration of a semiconductor device in which two semiconductor modules are arranged close to each other.

  As shown in FIG. 15, in the semiconductor device 120 according to the present embodiment, the semiconductor modules 1 </ b> A and 1 </ b> B described in the first embodiment are arranged close to each other in the upside down direction.

  Compared to the case where the semiconductor modules 1A and 1B are rotated 180 degrees in a plane as in the first embodiment described above, in this embodiment, the angle between the tapers 13 can be adjusted between the semiconductor modules 1A and 1B. The distance can be further reduced.

  In addition, the second main electrode 7 of the semiconductor module 1A is disposed not only near the second main electrode 7 but also the first main electrode 5 of the adjacent semiconductor module 1B. Therefore, if the current flowing through the first main electrode 5 also flows in the opposite direction to the current flowing through the second main electrode 7, the inductance can be further reduced by the effect of canceling out the mutual inductance.

  In the semiconductor device 130 shown in FIG. 16, the semiconductor modules 51 </ b> A and 51 </ b> B described in the second embodiment are arranged close to each other in the same manner as in FIG. 15.

[Effect of the third embodiment]
As described in detail above, in the semiconductor devices 120 and 130 according to the present embodiment, the two semiconductor modules arranged close to each other are arranged upside down. Thereby, the electric current which flows into the 2nd main electrode of each semiconductor module can be sent in the reverse direction by the semiconductor module of the same structure.

  The above-described embodiment is an example of the present invention. For this reason, the present invention is not limited to the above-described embodiment, and even if it is a form other than this embodiment, as long as it does not depart from the technical idea of the present invention, it depends on the design and the like. Of course, various modifications are possible.

1, 1A, 1B, 51, 51A, 51B Semiconductor module 3 Semiconductor element 5 First main electrode 7, 57 Second main electrode 9 Bonding material 11 Resin 13 Taper 15 Signal terminals 17, 17P, 17N, 18, 18A, 18B Power Terminal 19 Bonding pad 21, 25 Side wall 23 Pillar 100, 110, 120, 130 Semiconductor device

Claims (8)

  1. A semiconductor module,
    A vertical semiconductor element;
    A first main electrode connected to one main surface of the semiconductor element and supporting and fixing the semiconductor element;
    A second main electrode connected to the other main surface of the semiconductor element and provided with an external connection terminal;
    The second main electrode extends in a direction different from the direction in which the connection terminal is provided, and extends to a side wall of the semiconductor module .
    The semiconductor module is characterized in that a side wall of the semiconductor module has a tapered shape, and the second main electrode extends to a portion where the side wall protrudes outward by the tapered shape .
  2. 2. The semiconductor device according to claim 1 , wherein when the semiconductor module includes a plurality of the semiconductor elements, the semiconductor elements are arranged so that bonding pads of the plurality of semiconductor elements face the same direction. Semiconductor module.
  3. The second main electrode, the semiconductor module according to claim 1 or 2, characterized in that not formed on the bonding pads of the semiconductor device.
  4. The second main electrode extends in a direction different from the direction in which the connection terminals are provided, and extends in a direction opposite to the extending direction to the side wall of the semiconductor module. the semiconductor module according to claim 1 or 2, characterized in that it is symmetrical with respect to.
  5. A semiconductor device in which a plurality of semiconductor modules according to any one of claims 1 to 4 are arranged close to each other,
    The two semiconductor modules arranged close to each other are arranged facing the side wall in the direction in which the second main electrode extends and extends,
    2. A semiconductor device according to claim 1, wherein currents flow in opposite directions to the second main electrodes of the two semiconductor modules arranged close to each other.
  6. The semiconductor device according to claim 5 , wherein a distance between sidewalls facing each other between the two semiconductor modules arranged in close proximity is an insulation distance.
  7. 7. The semiconductor device according to claim 5 , wherein the two semiconductor modules arranged close to each other are arranged by being rotated 180 degrees in a plane.
  8. The semiconductor device according to claim 5 , wherein the two semiconductor modules arranged close to each other are arranged upside down.
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