JP6334594B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine capable of executing various lotteries by updating a random value at a predetermined cycle and acquiring the random value.

  Conventionally, in a pachinko gaming machine which is a kind of gaming machine, various lotteries and determinations relating to the game are performed using various random numbers. For example, like a pachinko gaming machine described in Patent Document 1, a big hit lottery is performed using a predetermined random number value. Specifically, in the pachinko gaming machine described in Patent Document 1, the random number for the big hit determination is generated by the random number update process executed by the main CPU of the main control circuit, and the random number is input to the start winning opening. Acquired when the ball is detected, the random number is used for the jackpot lottery.

JP 2006-305168 A

  By the way, some pachinko machines are equipped with a random number generator from the viewpoint of fraud countermeasures, and a lottery (determination) regarding various game states is performed using hardware random numbers generated by the random number generator. is there. However, in pachinko machines equipped with such a random number generator, not only in terms of fraud countermeasures, but also by using lottery using hardware random numbers to enhance the interest of various effects based on the lottery results Is expected.

  The present invention has been made in view of the above prior art, and its purpose is to make use of a lottery using hardware random numbers to improve the interest of various effects based on the lottery result. Is to provide.

A gaming machine that solves the above problems uses a start opening that can be given a start condition for a symbol variation game, a ball detection means that detects a game ball that has entered the start opening, and a first hardware random number. A lottery means for performing a big hit lottery for determining whether or not a special symbol is won, a lottery means for performing a lottery for determining whether or not a normal symbol is used, using a second hardware random number, and a predetermined clock frequency. A clock oscillator for generating a clock signal; and a first random number generator for generating the first hardware random number by periodically updating numerical data within a first numerical range based on the clock signal; A second random number generator for generating the second hardware random number by periodically updating numerical data within a second numerical range based on the clock signal, and the first random number generation Generator First random number acquisition means for acquiring a numerical value as the value of the first hardware random number, and a second random number for acquiring the numerical value generated by the second random number generator as the value of the second hardware random number And a CPU for performing arithmetic processing as the jackpot lottery means, the lottery means, the first random number acquisition means, and the second random number acquisition means, and for operation of the CPU. A ROM for storing a program; a RAM for temporarily storing data associated with arithmetic processing of the CPU; a random number generation circuit having the clock oscillator, the first random number generator, and the second random number generator; The CPU executes arithmetic processing at a predetermined control cycle, and the update cycle of the numerical data in the first random number generator and the second random number generator is the CP. The CPU executes a random number generation process for generating a software random number different from the first hardware random number and the second hardware random number, so that the first random number generation is performed. A first order changing means for changing the order of values for each update cycle of the numerical data generated by the generator in one cycle, and for each update cycle of the numerical data generated by the second random number generator in one cycle. Second order changing means for changing the order of the values, and by inputting the clock signal having a different oscillation frequency to the first random number generator and the second random number generator, In summary, the value generated by the random number generator is asynchronous with the value generated by the second random number generator .

A gaming machine that solves the above problems uses a start opening that can be given a start condition for a symbol variation game, a ball detection means that detects a game ball that has entered the start opening, and a first hardware random number. Whether or not to shift the lottery probability state of the big win lottery state from the high probability lottery state to the low probability lottery state using the big hit lottery means for performing the big hit lottery of whether or not the special symbol is a big hit and the second hardware random number Probability transition lottery means for performing probability transition lottery, a clock oscillator that generates a clock signal at a predetermined clock frequency, and updating numerical data periodically within a first numerical range based on the clock signal, A first random number generator for generating a first hardware random number and the second hardware random number by periodically updating numerical data within a second numerical range based on the clock signal. A second random number generator for generating, a first random number acquisition means for acquiring a numerical value generated by the first random number generator as a value of the first hardware random number, and a second random number generator Second random number acquisition means for acquiring the generated numerical value as the value of the second hardware random number, and the main control board includes the big hit lottery means, the probability transfer lottery means, and the first random number acquisition. And a CPU that performs arithmetic processing as the second random number acquisition means, a ROM that stores a program for operating the CPU, a RAM that temporarily stores data associated with the arithmetic processing of the CPU, the clock oscillator, A random number generation circuit having the first random number generator and the second random number generator, and the CPU executes a calculation process at a predetermined control period to generate the first random number generator. Instrument An update cycle of the numerical data in the second random number generator is shorter than a control cycle of the CPU, and the CPU is different from the first hardware random number and the second hardware random number. The first random number generator executes a random number generation process for generating a software random number, and inputs the clock signal having a different oscillation frequency to the first random number generator and the second random number generator. The gist is that the generated value and the value generated by the second random number generator are asynchronous.

  According to the present invention, by utilizing a lottery using hardware random numbers, it is possible to improve the interest of various effects based on the lottery result.

The front view which shows a game board. The block diagram which shows the electrical constitution of a pachinko gaming machine. The block diagram which shows the internal structure of the random number generation circuit of a main control board. The flowchart which shows a main process. The flowchart which shows a timer interruption process. The flowchart which shows a special symbol input process. The flowchart which shows a special symbol start process. The flowchart which shows a common figure input process. The flowchart which shows a common figure start process. In another example, the block diagram at the time of employ | adopting the 1st method for the 1st counter and the 2nd counter. In another example, the block diagram at the time of employ | adopting the 2nd method for the 1st counter and the 2nd counter. The block diagram at the time of employ | adopting the 3rd method in the 1st counter and the 2nd counter in another example. (A)-(c) is a schematic diagram which shows the example of the random pattern in another example. In another example, the block diagram at the time of employ | adopting the 1st method-the 3rd method for the 1st counter and the 2nd counter. The block diagram at the time of employ | adopting the 1st method and the 2nd method as a 1st counter in another example, and employ | adopting the 3rd method as a 2nd counter.

Hereinafter, an embodiment in which the present invention is embodied in a pachinko gaming machine will be described with reference to FIGS.
As shown in FIG. 1, an effect display device 11 having a liquid crystal display type image display unit GH is disposed almost at the center of a game board 10 of a pachinko gaming machine. The effect display device 11 includes an effect symbol variation game that is displayed by variably displaying a plurality of symbol sequences (three columns in this embodiment), and various displays executed in association with the effect symbol variation game. The effect is displayed as an image. In this embodiment, in the effect symbol variation game of the effect display device 11, a symbol combination (display result) composed of symbols of a plurality of columns (three columns in this embodiment) is derived. The effect symbol variation game of the effect display device 11 is performed using a decorative symbol (effect symbol) for diversifying display effects.

  A 7-segment type first special symbol display device 12 is disposed in the lower right part of the game board 10. A 7-segment second special symbol display device 13 is disposed on the right side of the first special symbol display device 12.

  In the 1st special symbol display device 12 and the 2nd special symbol display device 13, the special symbol change game which changes and displays a plurality of kinds of special symbols is performed. The special symbol is a notification symbol indicating the result of the internal lottery such as whether or not it is a big hit (big hit lottery). In the following description, the special symbol variation game performed on the first special symbol display device 12 is referred to as a “first special symbol variation game”, and the special symbol variation game performed on the second special symbol display device 13. This is called “second special symbol variation game”. In the following description, the term “special symbol variation game” simply means a first special symbol variation game and a second special symbol variation game.

  In the present embodiment, the first special symbol display device 12 and the second special symbol display device 13 select and select one special symbol corresponding to the lottery result of the jackpot lottery from a plurality of types of special symbols. The special symbol is displayed as a fixed stop. The plurality of types of special symbols are classified into a jackpot symbol that can recognize a jackpot and a missing symbol that can recognize a loss. In addition, when the big hit symbol is displayed on the first special symbol display device 12 or the second special symbol display device 13 in a fixed stop display, the big hit game is given to the player.

  In the present embodiment, the effect display device 11 displays eight types of numbers [1] to [8] as decorative designs in each column. And the display result according to the display result of the special symbol display apparatuses 12 and 13 is displayed on the effect display apparatus 11. FIG. Specifically, when the big hit symbol is fixedly stopped and displayed on the first special symbol display device 12 or the second special symbol display device 13, as a general rule, the effect display device 11 also has a big hit symbol combination (a big hit display result). The fixed stop is displayed. The jackpot symbol combination of the present embodiment is a symbol combination ([222] [777] or the like) in which the decorative symbols in all the rows are the same. Further, when the deviated symbols are displayed on the first special symbol display device 12 or the second special symbol display device 13 in a definite stop display, the deferred symbol combination (delay display result) is also displayed in the definite stop display on the effect display device 11. In the present embodiment, the out-of-order symbol combination is a symbol combination ([123] or the like) in which all the decorative symbols are different, or a symbol combination in which one row of decorative symbols is different from the other two rows of decorative symbols ([122] [767). ]).

  In the present embodiment, the decorative symbols in each column in the effect display device 11 are displayed in a variable manner along a predetermined change direction (vertical scroll direction) when the special symbol change game is started. When the decorative symbols in each column start to change (when the effect symbol variation game starts), the left column (left symbol) → the right column (right symbol) → the middle column as viewed from the player side in the effect display device 11 ( The decorative symbols that are variably displayed are temporarily stopped and displayed in the order of (middle symbols). Then, when the left symbol and the right symbol that are once stopped and displayed are the same, the reach state can be recognized from the symbol combination ([1 ↓ 1] etc., “↓” indicates changing). In the reach state, the decorative symbols of the specific columns (in the present embodiment, the left column and the right column) of the plurality of columns are temporarily stopped and displayed, and the columns other than the specific column (in the present embodiment, the middle column) This is a state in which the decorative symbols in the column) are variably displayed. The symbol combination that can recognize this reach state becomes the symbol combination of the reach by the decorative symbol.

  In addition, the display of the design (decorative design) in the effect display device 11 includes “change display”, “temporary stop display”, and “deterministic stop display”. The decorative pattern variation display in the effect display device 11 is a state (display) in which the decorative pattern type is changed and displayed. In addition, the temporary stop display of the decorative symbols on the effect display device 11 means that the decorative symbols stopped at a certain stop position in order to notify that the final stop has not been performed, perform a predetermined operation (for example, swinging up and down). Along with this, it is displayed in a stopped state. Also, the decorative symbol confirmation stop display in the effect display device 11 is a state in which the decorative symbol is confirmed and stopped without an action to notify that the decorative symbol has been confirmed and stopped (the special symbol variation game has ended). It is.

  The display of the symbols (special symbols) in the first special symbol display device 12 and the second special symbol display device 13 includes “variable display” and “deterministic stop display”. The special symbol variation display in the first special symbol display device 12 means that the special symbol type is changed, so that among the seven light emitters forming the seven-segment type first special symbol display device 12 At least one light emitter is blinking. The special symbol fixed stop display in the first special symbol display device 12 is a special symbol constituted by a combination of lighting and extinction of each light emitter forming the 7-segment type first special symbol display device 12. It is a state that has been. Similarly, the special symbol variation display in the second special symbol display device 13 means that the special symbol type is changed, so that the seven light-emitting elements forming the seven-segment type second special symbol display device 13 are displayed. In this state, at least one light emitter among the bodies is blinking. The special symbol fixed stop display in the second special symbol display device 13 is a special symbol constituted by a combination of lighting and extinction of each light emitter forming the 7-segment type second special symbol display device 13. It is a state that has been.

  Then, when the first special symbol variation game ends, the decorative symbol of the effect display device 11 and the special symbol of the first special symbol display device 12 are simultaneously displayed in a fixed stop state. Similarly, when the second special symbol variation game ends, the decorative symbol of the effect display device 11 and the special symbol of the second special symbol display device 13 are simultaneously displayed in a fixed stop state.

  Further, the pachinko gaming machine according to the present embodiment is configured such that the reach display can be executed by the effect display device 11. The reach effect is an effect performed in the effect symbol variation game after the reach symbol combination is stopped and displayed until the symbol combination (display result) composed of the decorative symbols is finally derived. . Therefore, the reach effect is an effect for expecting whether or not the special symbol variation game being executed is a big hit.

Above the effect display device 11, a decoration lamp SL is disposed as a light emitting means for performing a light emission effect by light emission (lighting or blinking) of a light emitter (LED, lamp, etc.).
Also, below the effect display device 11, a first start port 16 is provided as a start port having a first entrance 15 for a game ball to enter. Behind the first start port 16, a first start port switch SW1 (shown in FIG. 2) is disposed as a ball detection means for detecting a game ball that has entered (wins) the first start port 16. Yes. In the pachinko gaming machine of this embodiment, the start condition of the first special symbol variation game can be given by detecting the game ball that has entered the first start port 16 by the first start port switch SW1. Furthermore, by detecting the game balls that have entered the first start port 16 with the first start port switch SW1, a predetermined number (three in this embodiment) of game balls are paid out as prize balls.

  Also, below the first start port 16, a second start port 18 is provided as a start port having a second entrance port 17 for a game ball to enter. The second starting port 18 is a normal electric accessory, and includes an opening / closing blade 19 as an opening / closing member that performs an opening / closing operation by the operation of an opening / closing blade solenoid SOL1 (shown in FIG. 2). That is, in the present embodiment, the second start port 18 is an openable start port. The opening of the second start port 18 is expanded by opening the opening / closing blade 19 so that the game ball can easily enter the game. On the other hand, the opening of the opening / closing blade 19 is not expanded by the closing operation of the opening / closing blade 19. The ball is in a closed state where it is difficult to enter. That is, the opening / closing blade 19 opens the second entrance port 17 of the second start port 18 from the closed state (first state) where the game ball is difficult to enter from the closed state (second state). Variable). Further, a second start port switch SW2 (shown in FIG. 2) is disposed in the back of the second start port 18 as a ball detection means for detecting a game ball that has entered the second start port 18. . In the pachinko gaming machine of this embodiment, the start condition of the second special symbol variation game can be given by detecting the game ball that has entered the second start port 18 with the second start port switch SW2. Further, by detecting a game ball that has entered the second start port 18 by the second start port switch SW2, a predetermined number (in this embodiment, one) of game balls is paid out as a prize ball.

  Further, on the right side of the first special symbol display device 12, a first special symbol hold display device 20 including a plurality of (two in this embodiment) first special symbol hold light emitting units 20a and 20b is arranged. It is installed. The first special symbol hold display device 20 informs the player of the number of first start and hold balls for special symbols stored inside the machine (hereinafter referred to as “first hold stored number”). The first reserved memory number is incremented by 1 when a game ball enters the first start port 16 and is decremented by 1 when the first special symbol variation game is started. Therefore, when a game ball enters the first starting port 16 during the special symbol variation game, the first reserved memory number is further added and accumulated up to a predetermined upper limit number (“4” in the present embodiment). The Then, in the present embodiment, the two first special symbol reservation light emitting units 20a and 20b located on the left and right are turned on, blinking, or turned off according to the first number of reserved storage. The first reserved memory number indicates the number of first special symbol variation games whose execution is suspended.

  Further, on the right side of the second special symbol display device 13, a second special symbol hold display device 21 including a plurality (two in this embodiment) of the second special symbol hold light emitting units 21a and 21b is arranged. It is installed. The second special symbol hold display device 21 notifies the player of the stored number of second start hold balls for special symbols stored in the machine (hereinafter referred to as “second hold stored number”). The second reserved memory number is incremented by 1 when a game ball enters the second start port 18 disposed on the game board 10, while it is decremented by 1 when the second special symbol variation game is started. Therefore, when a game ball enters the second starting port 18 during the special symbol variation game, the second reserved memory number is further added and accumulated up to a predetermined upper limit number (“4” in the present embodiment). The Then, in the present embodiment, the two second special symbol reservation light emitting units 21a and 21b located on the left and right are turned on, blinking, or turned off according to the second number of stored reservations. The second reserved memory number indicates the number of second special symbol variation games whose execution is suspended.

  Also, below the second start opening 18, a special winning opening 23 is provided as a special winning means having a special winning opening door 22 that opens and closes by the operation of a special winning opening solenoid SOL2 (shown in FIG. 2). Has been. A count switch SW3 (shown in FIG. 2) for detecting a game ball that has entered the ball is disposed in the back of the big winning opening 23. In the pachinko gaming machine of this embodiment, a predetermined number (15 in this embodiment) of game balls are paid out as prize balls by detecting the game balls that have entered the big prize opening 23 by the count switch SW3. put out. The big winning opening 23 is opened by opening the big winning opening door 22 during the big hit game, and the game ball is allowed to enter. For this reason, during the big hit game, the player can obtain a chance to win a prize ball.

  Further, on the right side of the first special symbol hold display device 20, a general symbol display device 24 including a plurality (two in this embodiment) of the general symbol light emitting units 24a and 24b is disposed. In the common symbol display device 24, a normal symbol variation game (hereinafter referred to as “standard diagram variation game”) in which a regular symbol (hereinafter referred to as “common diagram”) constituted by a combination of lighting and extinction of each of the regular symbol light emitting units 24a and 24b is varied. Is called a "common game"). The usual figure is a notification pattern indicating the result of an internal lottery (lottery per ordinary figure) as to whether or not per ordinary figure. In addition, the usual game is performed to derive a lottery result of a lottery per drawing (open lottery) as to whether or not to give a game per usual figure with the opening and closing blades 19 of the second start opening 18 open. Production. When the lottery per universal drawing is won, the normal symbol display device 24 displays a normal winning symbol that can recognize that the lottery per universal symbol has been won. In addition, when the lottery per usual drawing is not won (in the case of non-winning), the ordinary figure display device 24 displays a fixed stop display that can recognize that the lottery per common drawing is not won. When the lottery per normal drawing is won (when the normal winning symbol is confirmed and stopped), the opening and closing blades 19 are opened to make it easier for the game ball to enter the second starting port 18, and the player can An opportunity to easily acquire the starting condition of the special symbol variation game can be obtained.

  Moreover, the gate 25 is each arrange | positioned at the left side and the right side of the production | presentation display apparatus 11. FIG. Behind the gate 25, a general-purpose switch SW4 (shown in FIG. 2) is arranged as a gate entry detection means for detecting a game ball that has entered (passed). The gate 25 can give the start condition of the usual game by detecting the entered game ball by the ordinary map switch SW4.

  Further, on the right side of the general map display device 24, a general map hold display device 26 including a plurality (two in this embodiment) of the general map hold light emitting units 26a and 26b is disposed. The usual figure hold display device 26 informs the player of the number of stored start balls for normal symbols stored in the machine (hereinafter referred to as “the number of reserved figure reserved”). The usual figure holding memory number is incremented by 1 when a game ball enters the gate 25, while it is decremented by 1 when the usual figure game is started. Therefore, when a game ball enters the gate 25 during the normal game, the general-purpose reserved memory number is further added and accumulated up to a predetermined upper limit number (“4” in this embodiment). Then, the two general-purpose reserved light emitting units 26a and 26b in the present embodiment are turned on, blinked, or turned off according to the number of general-purpose reserved memory. In addition, the number of usual figure hold | maintained memory | storage numbers shows the number of usual figure games with execution suspended.

  Further, the pachinko gaming machine of the present embodiment is configured such that the first special symbol variation game and the second special symbol variation game cannot be executed simultaneously. On the other hand, in the pachinko gaming machine of the present embodiment, the special symbol variation game and the regular game are configured to be executed simultaneously. Further, in the pachinko gaming machine according to the present embodiment, when the execution of the second special symbol variation game is suspended (when the second reserved memory number> 1), the second special symbol variation is more than the first special symbol variation game. The game is configured to be executed with priority.

  In the pachinko gaming machine according to the present embodiment, the winning probability of the big win lottery may change (improve) from a normal low probability state to a high probability state where the probability is higher than usual. When the winning probability of the jackpot lottery is in a low probability state, it is more difficult to win the jackpot lottery than when the winning probability of the jackpot lottery is in a high probability state. In the pachinko gaming machine of the present embodiment, the winning probability of the big hit lottery when in the low probability state is defined as “289/65536 (= about 1 / 226.77)”, and when in the high probability state The winning probability for the jackpot is defined as “1093/65536 (= about 1 / 59.96)”. As described above, when the winning probability of the big hit lottery is in a high probability state, the winning probability of the big hit lottery increases, so that the big hit game is easily given. That is, it can be said that it is an advantageous state for the player when the winning probability of the big hit lottery is in a high probability state. In the following description, the winning probability of the big win lottery is a high probability state is referred to as `` probability change state '', and the winning probability of the big win lottery is a low probability state is `` non-probability change state '' or It is said that it is not probabilistic.

  In addition, the probability variation state is a probability of falling down that determines one of maintaining the winning probability of the jackpot lottery (probability continuity) and changing the winning probability of the jackpot lottery (probability change). Continue until changes are determined. This falling lottery is performed in a process for executing a special symbol variation game. The probability that the probability change is determined by the falling lottery (the winning probability of the falling lottery) is set to a probability lower than the winning probability of the big hit lottery when the probability variation state. On the other hand, the winning probability of the falling lottery is determined to be higher than the winning probability of the big hit lottery when the state is in an uncertain change state. Specifically, the winning probability of the falling lottery in the pachinko gaming machine of this embodiment is set to 1001/65536 (= about 1 / 65.47). Further, in the present embodiment, the falling lottery is performed only when the probability variation state. As described above, in the present embodiment, if the probability change is not determined in the falling lottery, the probability variation state is continued. Even if the probability change is not determined in the falling lottery, when the big hit game is awarded, the probability change state is switched to the non-probability change state. Then, when the big hit game ends, the probability change state is entered. In the following description, determining the probability change by the falling lottery may be referred to as “winning the falling lottery”, and determining the probability continuation by the falling lottery may be referred to as “not winning the falling lottery”.

  In the present embodiment, the non-probable variation state corresponds to the fact that the lottery probability state of the big hit lottery is the low probability lottery state. Further, in the present embodiment, when the probability variation state, it corresponds to the lottery probability state of the big hit lottery is a high probability lottery state.

  Further, in the pachinko gaming machine according to the present embodiment, the gaming state may be in a variable time shortening state (hereinafter referred to as “variable state”) that is advantageous to the player. When in the variable state, the variation time of the normal game is shortened compared to when not in the variable state (when in the non-variable state), and the winning probability of the lottery per general map is low ( It fluctuates (improves) from a normal probability to a high probability. In the pachinko gaming machine of the present embodiment, the winning probability of the lottery per open figure (open lottery) when in the variable state is “65535/65536”, and the lottery per base figure when in the non-variable state The probability is “8192/65536”.

  In addition, when the variable speed state is set, the opening time of the open / close blade 19 becomes longer than when the variable speed state is not set. For this reason, the open time of the opening / closing blade 19 per unit time is longer in the variable state than in the variable state. For this reason, the probability that the game ball enters the second starting port 18 (entrance rate) is higher than normal (when it is in the non-variable state) when in the variable state. In addition, the probability that a game ball enters the first start port 16 is a constant probability regardless of whether or not it is in a variable state. For this reason, it can be said that when the speed change state, the probability that a game ball enters the start ports 16 and 18 is higher than the normal rate. On the other hand, when it is in the non-variable state, it can be said that the probability that a game ball will enter the start ports 16 and 18 is not a high probability, and therefore it can be said that the non-entrance rate improvement state.

  In the variable state, the jackpot game is given until or after the execution of the special symbol variation game of the predetermined number of times (in this embodiment, 50 times) after the jackpot game ends. Continue until. That is, when the execution of the special symbol variation game of a predetermined number of times after the end of the big hit game is completed, or when the big hit game has been given so far, the state is changed from the variable state to the non-variable state. .

Next, the jackpot game defined in the pachinko gaming machine of this embodiment will be described.
The big hit game is started after the big hit symbol is displayed on the first special symbol display device 12 or the second special symbol display device 13 in a fixed stop state. When the big hit game is started, an opening effect indicating the start of the big hit game is first performed. After the opening effect ends, the round game in which the special winning opening 23 is opened is performed a plurality of times with the predetermined number of rounds as an upper limit. During one round game, the big winning opening 23 is opened until a specified number (the upper limit number of balls entered) of game balls enter or until a specified time (round game time) elapses. . In round games, round effects are performed. Then, after the end of the round game with a predetermined number of predetermined rounds, an ending effect indicating the end of the big hit game is performed, and the big hit game is ended.

  In the pachinko gaming machine according to the present embodiment, when the big hit lottery is won, either one of the 16R big hit with the specified round number “16” and the 8R big hit with the specified round number “8” is selected. A jackpot game based on the jackpot is awarded. Note that the round game time set for all round games in the jackpot game based on the 16R jackpot and the jackpot game based on the 8R jackpot is the same time (25 sec in the present embodiment). For this reason, the 16R jackpot having a larger number of prescribed rounds than the 8R jackpot is a kind of jackpot that is more advantageous to the player than the 8R jackpot.

Next, the control configuration of the pachinko gaming machine will be described based on FIG.
On the back side of the pachinko gaming machine, a power supply board 28 for supplying a power source (for example, AC 24V) of the game hall to various components constituting the pachinko gaming machine is mounted. A main control board 30 for controlling the entire pachinko gaming machine is mounted on the back side of the pachinko gaming machine. The main control board 30 executes various processes for controlling the entire pachinko gaming machine, performs arithmetic processing on various control signals (control commands) for controlling the game according to the processing results, and outputs the control signals ( Control command). An effect control board 31 is mounted on the back side of the pachinko gaming machine. The effect control board 31 is based on a control signal (control command) output from the main control board 30, a display mode (display image such as a background) of the effect display device 11, a light emission mode (lighting timing, etc.) of the decorative lamp SL, and Controls the sound output mode (sound output timing, etc.) of the speaker SP as sound output means disposed in the game frame on which the game board 10 is mounted.

Hereinafter, specific configurations of the power supply board 28, the main control board 30, and the effect control board 31 will be described.
The power supply board 28 is provided with a power supply circuit 28a for converting the power supply of the game hall into a power supply voltage V1 (for example, DC 30V) as a supply voltage to the pachinko gaming machine. The main control board 30 and the effect control board 31 are connected to the power supply circuit 28a. Then, the power supply circuit 28a further converts the power supply voltage V1 after the conversion processing into predetermined power supply voltages V2 and V3 to be supplied corresponding to the main control board 30 and the effect control board 31, and the power supply voltage after the conversion V2 and V3 are supplied to the main control board 30 and the effect control board 31.

  Further, the power supply board 28 is provided with a power-off monitoring circuit 28b. The power-off monitoring circuit 28b is connected to the power circuit 28a. The power cut-off monitoring circuit 28b monitors the voltage value of the power supply voltage V1 supplied from the power supply circuit 28a. That is, the power-off monitoring circuit 28b determines whether or not the power supply voltage V1 has dropped to a predetermined voltage V (for example, DC 20V). The voltage V is a minimum voltage necessary for operating the pachinko gaming machine without causing any trouble in the game. Here, the power supply voltage V1 drops to the voltage V, for example, when the power is turned off (power is turned off) or during a power failure. In this case, since power is not supplied to the pachinko gaming machine, the power supply voltage V1 drops to the voltage V. On the contrary, when power is turned on (power is turned on) or when power is restored (restored power), the power is supplied to the pachinko gaming machine, so that the voltage rises to the power supply voltage V1.

  The power supply board 28 is provided with a reset signal circuit 28c. The reset signal circuit 28c is connected to the power-off monitoring circuit 28b. When the determination result is affirmative (that is, power supply voltage V1 ≦ voltage V), the power-off monitoring circuit 28b indicates that the power supply voltage V1 has dropped to the voltage V with respect to the main control board 30 and the reset signal circuit 28c. The power-off signal shown is output. The reset signal circuit 28c outputs a reset signal to the main control board 30 and the effect control board 31 at the start of power supply (when power is turned on or when power is restored) or when a power-off signal is input. The operations of the board 30 and the effect control board 31 are restricted.

  Further, the power supply board 28 includes a backup power supply made of, for example, an electric double layer capacitor. The backup power supply is connected to the power supply circuit 28a, and the power supply voltage is supplied from the power supply circuit 28a to the backup power supply. Further, the power supply board 28 is stored and held in the main control RAM 30c of the main control board 30 and is operated when the user wants to erase various control information (stored contents) that is appropriately rewritten during operation of the pachinko gaming machine. It has. In response to the operation of the RAM clear switch CS, the RAM clear switch CS outputs an initialization instruction signal for instructing the erasure (initialization process) of the stored memory contents to the main control board 30. A RAM clear switch circuit 29 is connected. In this embodiment, the RAM clear switch CS is provided on the back side of the pachinko gaming machine at a position where the player cannot operate. When the RAM clear switch CS is operated, an initialization instruction signal is output from the RAM clear switch circuit 29. When the power is turned on while operating the RAM clear switch CS (at the same time as the operation), an initialization instruction signal is output from the RAM clear switch circuit 29 and the initialization process is executed.

Next, the configuration of the main control board 30 will be described.
The main control board 30 is provided with a main control CPU 30a, a main control ROM 30b, a main control RAM 30c, a random number generation circuit 30d, a reset input circuit 30e, and a game start signal generation circuit 30f. In the present embodiment, the main control CPU 30a, the main control ROM 30b, the main control RAM 30c, and the random number generation circuit 30d are built in the game control microcomputer. That is, the game control microcomputer is a one-chip microcomputer.

  The main control CPU 30a executes control operations such as arithmetic processing in a predetermined procedure. The main control ROM 30b stores (stores) a control program (operation program) for the main control CPU 30a. The main control RAM 30c can temporarily store data associated with the arithmetic processing. The random number generation circuit 30d generates a hardware random number.

  As shown in FIG. 3, the random number generation circuit 30d includes a clock oscillator CH, a first counter Ct1, a second counter Ct2, a first latch circuit La1, and a second latch circuit La2. The clock oscillator CH outputs an electrical signal generated at a constant frequency (oscillation frequency) by a quartz oscillation circuit or the like as a “clock signal” to the first counter Ct1 and the second counter Ct2.

  The first counter Ct1 and the second counter Ct2 are 16-bit counters. Since the second power of 2 is 65536, the first counter Ct1 and the second counter Ct2 count values in the range of 0 to 65535. The first counter Ct1 and the second counter Ct2 count one each time the clock signal from the clock oscillator CH is input.

  Incidentally, the oscillation frequency of the clock oscillator CH in the present embodiment is set to 10 MHz. For this reason, the first counter Ct1 and the second counter Ct2 respectively count one every 0.1 μsec. That is, it takes about 6.6 msec to count 65536 random values and make a round. Further, when the first counter Ct1 and the second counter Ct2 have counted up to 65535, which is the upper limit, the value is returned to 0 and counted. Further, when the first counter Ct1 and the second counter Ct2 finish counting 65536 random numbers, the hardware initial value is randomly determined, and the count is sequentially performed from the value.

  For example, if the first counter Ct1 counts from 0 to 65535 in order and determines “2012” as the hardware initial value, it counts from 2012 to 65535 in order, then returns to 0 and counts from 0 to 2011 To do. That is, in the first counter Ct1 and the second counter Ct2, the order (arrangement) of the random numbers to be counted may be different for each count cycle. That is, according to the previous example, while the first count value is “0” in the first count cycle, “2012” is counted first in the next count cycle.

  In the first counter Ct1 and the second counter Ct2, values are counted separately, and values are generated separately. The first counter Ct1 and the second counter Ct2 each determine a hardware initial value separately. For this reason, it is very unlikely that the values counted by the counters Ct1 and Ct2 will be the same value. In the present embodiment, the first counter Ct1 functions as a first random number generator. That is, in the present embodiment, the “first numerical range” refers to a numerical range of “0 to 65535”. In the present embodiment, the second counter Ct2 functions as a second random number generator. That is, in the present embodiment, the “second numerical range” refers to a numerical range of “0 to 65535”. The values counted by the first counter Ct1 and the second counter Ct2 correspond to numerical data.

  A first latch circuit La1 is connected to the first counter Ct1. A second latch circuit La2 is connected to the second counter Ct2. The first latch circuit La1 and the second latch circuit La2 are for the start port that is output substantially simultaneously with the timing at which the game ball has entered the first start port 16 or the second start port 18. A latch signal can be input. Further, the second latch circuit La2 is configured to be able to input a gate latch signal that is output substantially at the same time as the timing at which a game ball enters the gate 25 is detected. The start port latch signal and the gate latch signal are output by the main control CPU 30a.

  When the start latch signal is input, the first latch circuit La1 latches the value counted by the first counter Ct1 in the buffer at the time of input. Similarly, when the start latch signal or the gate latch signal is input, the second latch circuit La2 latches the value counted by the second counter Ct2 in the buffer at the time of input.

  In the pachinko gaming machine according to the present embodiment, the value latched in the first latch circuit La1 when the start-port latch signal is input is used as the value of the big hit determination random number. The value latched by the second latch circuit La2 when the start-port latch signal is input is used as a random number for falling lottery. Further, the value latched by the second latch circuit La2 when the gate latch signal is input is used as a random number value for determining per figure. The big hit determination random number is a random number used in the big hit lottery. The random number for falling lottery is a random number used for the falling lottery. The random number for determining per ordinary figure is a random number used for lottery per ordinary figure.

  The reset input circuit 30e is connected to the reset signal circuit 28c of the power supply board 28. The reset input circuit 30e receives the reset signal output from the reset signal circuit 28c. The reset input circuit 30e outputs the reset signal from the input reset signal circuit 28c to the main control CPU 30a.

  In addition, the game start signal generation circuit 30f delays the time from when the pachinko gaming machine is powered on until the game is enabled. Note that “allowing a game” means that a timer interrupt process, which will be described later, can be performed. In the timer interrupt process, a process for developing and progressing a game in a pachinko gaming machine. It is. In addition, in the game start signal generation circuit 30f, when power is supplied to the pachinko gaming machine, a delay time is randomly determined. Then, after the lapse of the delay time, the game start signal generation circuit 30f outputs a game start signal instructing enabling the game to the main control CPU 30a.

  In addition, the main control CPU 30a is connected so that various switches SW1 to SW4 can detect and output detection signals from the game balls. The main control CPU 30a includes a first special symbol display device 12, a second special symbol display device 13, a first special symbol hold display device 20, a second special symbol hold display device 21, a general symbol display device 24, The figure hold display device 26 is connected. The main control CPU 30a is connected to an opening / closing blade solenoid SOL1 and a special prize opening solenoid SOL2.

  The main control ROM 30b stores a main control program. The main control program stored in the main control ROM 30b includes a control program for performing control for changing to a short state, a control program for performing control for changing to a probable state, and for opening the special winning opening 23. There are control programs. Then, the main control CPU 30a performs control related to various games (for example, control for changing to a variable state) based on the control program.

  The main control ROM 30b stores a plurality of types of variation patterns. The variation pattern can specify variation contents such as effect time (variation time) from the start of the special symbol variation game to the end of the special symbol variation game. The variation patterns include a variation pattern for a jackpot effect determined at the time of a big hit and a variation pattern for a loss effect determined at the time of a loss. In addition, the variation pattern for the offense effect includes a variation pattern for the outlier reach effect for executing the reach effect and a variation pattern for the outlier normal effect that does not execute the reach effect.

  The main control RAM 30c has software whose values are updated by processing performed by the main control CPU 30a every predetermined cycle (a time longer than the time (0.1 μsec) when the value of the hardware random number is updated). Random numbers are stored. In the pachinko gaming machine of this embodiment, four types of first software random numbers to fourth software random numbers are stored in the main control RAM 30c.

  In the present embodiment, the numerical range that the first software random number can take is defined as 100 integers from 0 to 99. Also, the numerical range that the second software random number can take is defined as 100 integers from 0 to 99. That is, the first software random number and the second software random number can take values in the same numerical range. Further, the numerical value range that the third software random number can take is defined as 239 integers from 0 to 238. The numerical value range that the fourth software random number can take is defined as 241 integers from 0 to 240.

  In the pachinko gaming machine of the present embodiment, the first software random number is used as a special symbol distribution random number, and the second software random number is used as a special symbol initial value random number. In this embodiment, the third software random number is used as a reach determination random number, and the fourth software random number is used as a variation pattern distribution random number. The random number for special symbol distribution is a random number used when determining the type of jackpot when winning the jackpot lottery. The special symbol initial value random number is a random number used to determine an initial value for counting the special symbol distribution random numbers. The reach determination random number is a random number used for reach lottery (reach determination) for determining whether or not a reach effect is to be executed when the big hit lottery is not won. The variation pattern distribution random number is a random number used when determining the variation pattern.

  The main control ROM 30b stores various determination values (such as big hit determination values). For example, the big hit determination value is stored in the main control ROM 30b. The big hit determination value is a determination value used in the big hit lottery. The jackpot determination value is determined from a numerical range (an integer from 0 to 65535) that can be counted by the first counter Ct1 acquired as a jackpot determination random number. It should be noted that the number of jackpot determination values when in the probability variation state is larger than the number of jackpot determination values when in the non-probability variation state. At the same time, a value as the big hit determination value is determined so that the big hit determination value in the probability variation state includes the big hit determination value in the non-probability variation state.

  In addition, the main control ROM 30b stores a standard hit determination value as a second state determination value. The determination value per common map is a determination value used in a lottery per general map. Further, the base hit determination value is determined from a numerical value range (integer of 0 to 65535) that can be counted by the second counter Ct2 acquired as the base hit determination random number. It should be noted that the number of determination values per common figure when in the variable state is greater than the determination value per general figure when in the non-variable state. At the same time, a value as a judgment value per universal figure is determined so that the judgment value per universal figure in the non-variable state is included in the judgment value per universal figure in the variable state. .

  Further, the fall control value is stored in the main control ROM 30b. The falling determination value is a determination value used in the falling lottery. Further, the fall determination value is determined from a numerical value range that can be counted by the second counter Ct2 obtained as a fall lottery random number.

  The reach control value is stored in the main control ROM 30b. The reach determination value is a determination value used in the reach lottery, and is determined from a numerical value range that can be counted as a third software random number acquired as a reach determination random number.

  The main control RAM 30c stores (sets) various pieces of information (random numbers, timer values, flags, etc.) that are appropriately rewritten during the operation of the pachinko gaming machine. For example, the main control RAM 30c stores a probability variation flag in which a value indicating whether or not the probability variation state is set. The probability variation flag is set to “1” when the probability variation state is set, and is set to “0” when the probability variation state is set. The main control RAM 30c stores an operation flag in which a value indicating whether or not the variable state is set. The main control RAM 30c has an operation limiter that counts the number of times until the number of special symbol variation games that have been executed after the end of the big hit game reaches a predetermined number (50 in the present embodiment). It is remembered.

  Further, a backup power supply for the power supply board 28 is connected to the main control RAM 30c. The main control RAM 30c can store and hold various control information based on the power supply voltage (for example, DC5V) supplied from the backup power supply when the power supply voltage V1 (power supply) is cut off (at the time of dropping to the voltage V). It is configured. For this reason, it becomes possible to back up the game state and game content at the time of power-off.

Next, the effect control board 31 shown in FIG. 2 will be described.
As shown in FIG. 2, on the effect control board 31, an effect control CPU 31a that executes control operations in a predetermined procedure, an effect control ROM 31b that stores a control program for the effect control CPU 31a, and writing of necessary data An effect control RAM 31c that can be read is provided. The effect display device 11 is connected to the effect control CPU 31a. In addition, a decoration lamp SL is connected to the CPU 31a for effect control. A speaker SP is connected to the effect control CPU 31a. The effect control ROM 31b stores various image display data (image data such as symbols, backgrounds, characters, characters, etc.), various light emission data, and various audio data. In addition, various information (random number value, timer value, flag, etc.) that is appropriately rewritten during the operation of the pachinko gaming machine is stored (set) in the effect control RAM 31c.

Next, various processes executed by the main control CPU 30a of the main control board 30 will be described.
When the main control CPU 30a receives a power-off signal from the power-off monitoring circuit 28b, the main control CPU 30a executes a backup process based on the power-off processing program among the control programs stored in the main control ROM 30b. That is, the main control CPU 30a executes the backup process when the power-off signal is input, and does not execute the backup process when the power-off signal is not input. In the backup process, the main control CPU 30a transmits control information such as a register and a stack pointer to the main control RAM 30c in addition to various control information such as a value set in a probability change flag stored and held in the main control RAM 30c. To remember. The main control CPU 30a calculates and stores the checksum of the main control RAM 30c. Further, the main control CPU 30a sets a backup flag in the main control RAM 30c. The backup flag is a flag for determining whether or not various control information stored and held in the main control RAM 30c is correct when the power to the pachinko gaming machine is turned on.

  Thereafter, the main control CPU 30a prohibits access to the main control RAM 30c and waits until the reset input circuit 30e inputs a reset signal output by the reset signal circuit 28c. When the reset signal is input, the main control CPU 30a regulates the operation of the main control CPU 30a. After the power is turned off, the power is supplied from the backup power supply of the power supply board 28 to the main control RAM 30c, and the stored contents of the main control RAM 30c at the time of the power cut are stored and held as backup data.

Next, main processing at power-on based on the main control program will be described.
The reset input circuit 30e of the main control board 30 receives the reset signal output from the reset signal circuit 28c with the start of power supply, and continuously outputs the reset signal to the main control CPU 30a for a predetermined regulation time. To do. When the output of the reset signal from the reset signal circuit 28c is stopped and the input of the reset signal to the main control CPU 30a is stopped, the main control CPU 30a is activated and executes main processing based on the main control program.

  As shown in FIG. 4, based on the main control program, the main control CPU 30a first prohibits interruption of timer interrupt processing (step MA1), permits access to the CPU's built-in RAM (step MA2), and further The CPU peripheral device and watchdog timer are initially set (steps MA3 and MA4), and various settings required when the power is turned on. Next, the main control CPU 30a checks whether or not the RAM clear switch CS is operated (step MA5). That is, the main control CPU 30a determines whether or not an initialization instruction signal for instructing deletion of various control information stored and held in the main control RAM 30c is input. The main control CPU 30a confirms whether or not the RAM clear switch CS is operated only when the power is turned on.

  If the determination result in step MA5 is negative, the main control CPU 30a checks the backup flag set in the main control RAM 30c when the pachinko gaming machine is powered off, and determines whether the backup flag is normal (step). MA6). That is, the main control CPU 30a determines whether backup processing is normally performed. The main control CPU 30a proceeds to the process of step MA7 when the determination result of step MA6 is affirmative, and proceeds to the process of step MA16 when the determination result of step MA6 is negative.

  In step MA7, the main control CPU 30a calculates the checksum of the main control RAM 30c. Thereafter, the main control CPU 30a determines whether or not the calculated checksum matches the checksum value calculated when the power is turned off (step MA8). As described above, by the processing of step MA6 and step MA8, the main control CPU 30a determines whether or not there are various control information stored and held in the main control RAM 30c, and when there are various control information stored and held. Determines whether there is an abnormality in the various control information stored and held. If these determination results are affirmative, that is, there is an abnormality in the various control information stored and held in the main control RAM 30c, the main control CPU 30a proceeds to the processing of step MA16 and stores the stored contents of the main control RAM 30c. initialize.

  If the determination result in step MA8 is affirmative, the power-off process program is executed at the time of power-off, but the stored contents are abnormal due to noise or the like after the backup process is not performed normally or after the backup process. It may occur. In such a case, the backup flag or checksum indicates an abnormality (abnormal value). In addition, there is a case where the main control CPU 30a inputs a reset signal and executes the main control program from the beginning when the power is not shut off, that is, the main control CPU 30a is restarted. In this case, the backup flag is not set because the backup process is not executed. Factors that cause the main control CPU 30a to restart include a malfunction of the reset signal circuit 28c of the power supply board 28, or a similar control signal that performs the same function (role) as the reset signal (hereinafter referred to as “illegal reset signal”). It may have been output. The illegal reset signal is a control signal output from an illegally attached illegal board.

  Returning to the description of the main control program, the main control CPU 30a proceeds to the process of step MA9 when the determination result of step MA8 is affirmative, and proceeds to the process of step MA16 when the determination result of step MA8 is negative. To do. When the determination result at step MA5 is affirmative, the determination result at step MA6 is negative or the determination result at step MA8 is negative, the main control CPU 30a erases the backup data stored in the main control RAM 30c, and sets the initial value. The pachinko gaming machine is activated based on (process after step MA16). On the other hand, if the determination result at step MA8 is affirmative, the main control CPU 30a activates the pachinko gaming machine based on the set value of the backup data (processing after step MA9).

  If the determination result in step MA8 is affirmative, the main control CPU 30a does not operate the RAM clear switch CS and is normally backed up. . In step MA9, the main control CPU 30a restores the stack pointer before the power is turned off. Next, the main control CPU 30a transmits to the effect control board 31 a return command for returning to the gaming state (including the probability changing state and the changing state) when the power is turned off (step MA10). With this return command, the effect control board 31 notifies the gaming state when the power is turned off. Next, the main control CPU 30a sets an interrupt interval timer (for example, 4 ms) (step MA11), and restores the register before power-off (step MA12). Next, the main control CPU 30a determines whether or not an interrupt is permitted before the power is turned off (step MA13). The main control CPU 30a sets an interrupt permission if the determination result in step MA13 is affirmative (step MA14), and proceeds to the process in step MA15 without permitting an interrupt if the determination result is negative. , Return the interrupt enable / disable (prohibition) to the state before the power was turned off. Then, main control CPU 30a sets an address before power-off in step MA15, and returns to the set address.

  On the other hand, in step MA16, the main control CPU 30a performs initialization processing of the main control RAM 30c. This process is performed when the power is first turned on, when the RAM clear switch CS is operated, and when the backup is abnormal. In step MA16, the main control CPU 30a clears all stored contents stored in the main control RAM 30c. That is, the main control CPU 30a erases (clears) various control information stored in the entire storage area of the main control RAM 30c. By the process of step MA16, “0 (zero)” is set as the initial value of the first software random number to the fourth software random number. Next, the main control CPU 30a sets 8000H to the stack pointer (initializes the stack pointer) (step MA17). Thereafter, an initial value is set in the main control RAM 30c (step MA18).

  Next, the main control CPU 30a determines whether or not the game start signal output by the game start signal generation circuit 30f has been input (step MA19). If the determination result in step MA9 is negative, the main control CPU 30a performs a random number update process at the time of delay (step MA20) and performs the determination process in step MA19 again. That is, the main control CPU 30a repeats execution of the delayed random number update process in step MA20 until the game start signal is input. In step MA20, the main control CPU 30a adds 1 to all the software random numbers from the first software random number to the fourth software random number stored in the main control RAM 30c, and sets the value of each software random number. Update. When the update of the first software random number in one cycle is completed, the value of the first software random number is updated again using the value of the second software random number at the end of the update as an initial value.

  When the game start signal is input and the determination result in step MA19 is affirmative, the main control CPU 30a sets an interrupt interval timer (for example, 4 ms) (step MA21). Then, the main control CPU 30a sets the interrupt to be prohibited in step MA22, executes the waiting time random number update process in step MA23, and further sets the interrupt to be enabled in step MA24. Further, the main control CPU 30a repeatedly executes the processing of step MA22 to step MA24.

Further, in the pachinko gaming machine of the present embodiment, when interrupt is set to be permitted, the main control CPU 30a executes timer interrupt processing every predetermined period (4 msec).
The main control CPU 30a repeatedly executes the standby time random number update process in step MA23 until 4 msec elapses after the timer interrupt process is performed. In other words, the waiting time random number update process is a process for updating the value of the software random number until the next timer interrupt process is performed after the timer interrupt process is executed. Further, the time (number of times) at which step MA23 is repeatedly executed varies depending on the time required for the timer interrupt process. That is, for example, when the time required for the timer interrupt process is short, such as when a game is not being performed, the number of times the standby time random number update process is repeatedly executed increases. On the other hand, for example, when the amount of processing is large and the time required for the timer interrupt process is long, such as at the start of a symbol variation game, the number of times the standby time random number update process is repeatedly executed decreases.

  In this standby time random number update process, only some software random numbers among the first software random number to the fourth software random number are updated. In the waiting time random number update process in the present embodiment, the values of the second software random number to the fourth software random number other than the first software random number used as the special symbol distribution random number are updated.

Next, timer interrupt processing will be described with reference to FIG.
As shown in FIG. 5, in the timer interrupt process, the main control CPU 30a first clears the watchdog timer (step MB1). Next, the main control CPU 30a performs a special symbol input process (step MB2). Thereafter, the main control CPU 30a performs an interrupt random number update process (step MB3). In step MB3, the main control CPU 30a adds 1 to all the software random numbers from the first software random number to the fourth software random number stored in the main control RAM 30c, and sets the value of each software random number. Update. When the update of the first software random number in one cycle is completed, the value of the second software random number at the end is set as the initial value.

  In addition, the main control CPU 30a that has finished the process of step MB3 performs a special symbol start process (step MB4). Thereafter, the main control CPU 30a performs a big hit game process (step MB5). In step MB5, the main control CPU 30a performs control related to the opening and closing of the big prize opening 23 and gives a big hit game.

  In addition, the main control CPU 30a that has completed the process in step MB5 performs a general map input process (step MB6), and then performs a general map start process (step MB7). In addition, after performing the normal diagram start processing, the main control CPU 30a performs a game-in-game processing per general diagram (step MB8), and ends the timer interrupt processing. In step MB8, the main control CPU 30a performs control related to the opening and closing of the opening and closing blades 19 and gives a game per usual figure. In step MB8, the main control CPU 30a controls the opening / closing of the opening / closing blade 19 so that the opening time per opening / closing blade 19 is longer in the variable speed state than in the non-variable state. To do.

Here, the special symbol input process performed in step MB2 will be described with reference to FIG.
As shown in FIG. 6, in the special symbol input process, the main control CPU 30a determines whether or not a game ball has entered the first start port 16 (step MC1). That is, in step MC1, the main control CPU 30a determines whether or not a detection signal output when the first start port switch SW1 detects a game ball is input. If the determination result of step MC1 is negative, the main control CPU 30a proceeds to the process of step MC5. On the other hand, if the determination result of step MC1 is affirmative, the main control CPU 30a determines whether or not the first reserved storage number stored in the main control RAM 30c is less than the upper limit number of four (step MC2). . When the determination result of step MC2 is negative (first reserved memory number = 4), the main control CPU 30a proceeds to the process of step MC5.

  On the other hand, if the determination result at step MC2 is affirmative (first reserved memory number <4), the main control CPU 30a adds 1 to the first reserved memory number and rewrites the first reserved memory number (step MC3). Further, the main control CPU 30a changes the display content of the first special symbol hold display device 20 so as to represent the first hold stored number after 1 addition. Subsequently, the main control CPU 30a acquires various random number values from the main control RAM 30c and the first latch circuit La1 and the second latch circuit La2 of the random number generation circuit 30d, and stores them in the predetermined memory of the main control RAM 30c. Store in the area (storage area corresponding to the first reserved storage number) (step MC4).

  In step MC4, the main control CPU 30a outputs a start port latch signal to the first latch circuit La1 and the second latch circuit La2. Then, the main control CPU 30a acquires the value latched by the first latch circuit La1 as the value of the jackpot determination random number. At the same time, the main control CPU 30a acquires the value latched by the second latch circuit La2 as the value of the falling lottery random number. In step MC4, the main control CPU 30a acquires the value of the first software random number from the main control RAM 30c as the value of the special symbol distribution random number. At the same time, the main control CPU 30a acquires the value of the third software random number from the main control RAM 30c as the value of the reach determination random number. Further, the main control CPU 30a acquires the value of the fourth software random number from the main control RAM 30c as the value of the variation pattern distribution random number. Then, after performing the process of step MC4, the main control CPU 30a proceeds to the process of step MC5.

  In step MC5, the main control CPU 30a determines whether or not a game ball has entered the second start port 18. That is, in step MC5, the main control CPU 30a determines whether or not a detection signal output when the second start port switch SW2 detects a game ball is input. If the determination result in step MC5 is negative, the main control CPU 30a ends the special symbol input process. On the other hand, if the determination result of step MC5 is affirmative, the main control CPU 30a determines whether or not the second reserved storage number stored in the main control RAM 30c is less than the upper limit number of four (step MC6). . When the determination result in step MC6 is negative (second reserved memory number = 4), the main control CPU 30a ends the special symbol input process.

  On the other hand, when the determination result in step MC6 is affirmative (second reserved memory number <4), the main control CPU 30a adds 1 to the second reserved memory number and rewrites the second reserved memory number (step MC7). Further, the main control CPU 30a changes the display content of the second special symbol hold display device 21 so as to represent the second reserved memory number after 1 addition. Subsequently, the main control CPU 30a acquires various random number values from the main control RAM 30c and the first latch circuit La1 and the second latch circuit La2 of the random number generation circuit 30d, and stores them in the predetermined memory of the main control RAM 30c. Store in the area (storage area corresponding to the second reserved storage number) (step MC8). In step MC8, as in step MC4, the main control CPU 30a acquires the value latched by the first latch circuit La1 as the value of the big hit determination random number. At the same time, the main control CPU 30a acquires the value latched by the second latch circuit La2 as the value of the falling lottery random number. In step MC4, the main control CPU 30a acquires the value of the first software random number from the main control RAM 30c as the value of the special symbol distribution random number. At the same time, the main control CPU 30a acquires the value of the third software random number from the main control RAM 30c as the value of the reach determination random number. Further, the main control CPU 30a acquires the value of the fourth software random number from the main control RAM 30c as the value of the variation pattern distribution random number. Then, after performing the process of step MC8, the main control CPU 30a ends the special symbol input process.

  Thus, in the special symbol input process, the main control CPU 30a that acquires the value of the big hit determination random number from the first latch circuit La1 functions as the first random number acquisition means in the present embodiment. In the special symbol input process, the main control CPU 30a that acquires the value of the random number for falling lottery from the second latch circuit La2 functions as a second random number acquisition unit in the present embodiment.

Next, the special symbol start process performed in step MB4 will be described based on FIG.
As shown in FIG. 7, in the special symbol start process, the main control CPU 30a determines whether or not the special symbol variation game or the big hit game is being played (step MD1). When the determination result of step MD1 is affirmative, the main control CPU 30a ends the special symbol start process. On the other hand, when the determination result of step MD1 is negative, that is, when the special symbol variation game is not being played and the big hit game is not being played, the second reserved memory number is read from the main control RAM 30c and the read second reserved memory number is read. Is greater than “0 (zero)” (step MD2). When the determination result of step MD2 is affirmative (second reserved memory number> 0), the main control CPU 30a proceeds to the process of step MD4. On the other hand, if the determination result of step MD2 is negative (second reserved memory number = 0), the main control CPU 30a reads the first reserved memory number from the main control RAM 30c, and the read first reserved memory number is “ It is determined whether or not it is larger than “0 (zero)” (step MD3). And when the determination result of step MD3 is negative (the number of first reserved memories = 0), the main control CPU 30a ends the special symbol start process. On the other hand, if the determination result of step MD3 is affirmative (first reserved storage number> 0), the main control CPU 30a proceeds to the process of step MD4.

  In step MD4, the main control CPU 30a subtracts 1 from the reserved storage number. When the determination result in step MD2 is affirmative and the process in step MD4 is performed, the main control CPU 30a subtracts 1 from the second reserved storage number. On the other hand, when the determination result of step MD3 is affirmative and the process of step MD4 is performed, the main control CPU 30a subtracts 1 from the first reserved storage number. In step MD4, when the first reserved memory number is subtracted, the main control CPU 30a controls the display content of the first special symbol hold display device 20 so as to represent the first reserved memory number after the subtraction. Further, when the second reserved memory number is subtracted, the main control CPU 30a controls the display content of the second special symbol hold display device 21 so as to represent the second reserved memory number after the subtraction. After that, the main control CPU 30a stores various random numbers (random hit determination random numbers, falling lottery random numbers, special symbol distribution random numbers, reach determination random numbers, and fluctuation pattern distribution random numbers) stored in a predetermined storage area. A value is read (step MD5).

  Thereafter, the main control CPU 30a determines whether or not it is in a certain change state (step MD6). In step MD6, the main control CPU 30a determines whether or not the value “1” indicating the probability variation state is set in the probability variation flag. If the determination result of step MD6 is negative, the main control CPU 30a proceeds to the process of step MD9. On the other hand, if the determination result in step MD6 is affirmative, the main control CPU 30a determines whether or not the read value of the random number for falling lottery matches the falling determination value stored in the main control ROM 30b ( Step MD7), a falling lottery is performed.

  If the determination result in step MD7 is negative (no win in the falling lottery), the main control CPU 30a proceeds to the process in step MD9. On the other hand, when the determination result in step MD7 is affirmative (winning for the falling lottery), the main control CPU 30a sets a value “0” indicating that the probability variation flag is not in the probability variation state (step MD8). That is, in step MD8, the main control CPU 30a changes and sets the value set in the probability variation flag from “1” to “0”. Thereafter, the main control CPU 30a proceeds to the process of step MD9.

  In step MD9, the main control CPU 30a determines whether or not the read jackpot determination random number value matches the jackpot determination value stored in the main control ROM 30b, and performs a jackpot lottery. At this time, the main control CPU 30a performs a jackpot lottery with a winning probability in a high probability state when in a probability variation state, and performs a jackpot lottery with a winning probability in a low probability state in a state with no probability variation.

  On the other hand, if the determination result in step MD9 is affirmative (winning for the big hit lottery), the main control CPU 30a determines the big hit symbol based on the read value of the special symbol distribution random number (step MD10). In step MD10, the main control CPU 30a determines one jackpot symbol from the jackpot symbol classified as 16R jackpot and the jackpot symbol classified as 8R jackpot. The type of jackpot is determined by the processing of step MD10. That is, by the process of step MD10, the content of the privilege (game privilege) when the big hit lottery is won is determined. Thereafter, the main control CPU 30a determines a variation pattern from a plurality of types of variation patterns for jackpot presentation based on the read variation pattern distribution random number value (step MD11).

  Thereafter, the main control CPU 30a, which has determined the main variation pattern in step MD11, executes various processes related to the special symbol variation game, such as outputting a predetermined control command to the effect control CPU 31a at a predetermined timing ( Step MD12). Specifically, the main control CPU 30a first designates at least a variation pattern, and first outputs a variation pattern designation command indicating that the execution of the special symbol variation game is started. At the same time, the main control CPU 30a controls the display contents of the first special symbol display device 12 or the second special symbol display device 13 so that the special symbol variation display is started and the special symbol variation game is started. Incidentally, the main control CPU 30a controls the display content of the first special symbol display device 12 when starting the first special symbol variation game, while controlling the second special symbol variation game when starting the second special symbol variation game. The display content of the symbol display device 13 is controlled. Further, the main control CPU 30a starts measuring the effect time of the special symbol variation game. Then, the main control CPU 30a ends the special symbol start process.

  Thereafter, in a process different from the special symbol start process, the main control CPU 30a stops and displays the special symbol determined as the special symbol to be variably displayed when the production time set in the designated variation pattern has elapsed. The display contents of the first special symbol display device 12 or the second special symbol display device 13 are controlled. Incidentally, the main control CPU 30a controls the display content of the first special symbol display device 12 when ending the first special symbol variation game, while the second special symbol variation game is terminated when the second special symbol variation game is terminated. The display content of the symbol display device 13 is controlled. Further, the main control CPU 30a outputs an end command indicating that the special symbol variation game is to be terminated when the effect time set in the designated variation pattern has elapsed.

  On the other hand, if the determination result in step MD9 is negative (no win for the big win lottery), the main control CPU 30a matches the read reach determination random number value with the reach determination value stored in the main control ROM 30b. Or not, and reach lottery is performed (step MD13). If the determination result in step MD13 is affirmative, the main control CPU 30a determines a dissociation symbol (step MD14). After that, the main control CPU 30a determines a variation pattern from among a plurality of types of variation patterns for outlier reach production based on the read variation pattern distribution random number value (step MD15).

  Then, the main control CPU 30a that has determined the variation pattern in step MD15 proceeds to the processing in step MD12, and, as described above, outputs a predetermined control command to the effect control CPU 31a at a predetermined timing. Various processes related to the variable game are executed, and the special symbol start process is terminated.

  Thereafter, in a process different from the special symbol start process, the main control CPU 30a stops and displays the special symbol determined as the special symbol to be variably displayed when the production time set in the designated variation pattern has elapsed. The display contents of the first special symbol display device 12 or the second special symbol display device 13 are controlled. Incidentally, the main control CPU 30a controls the display content of the first special symbol display device 12 when ending the first special symbol variation game, while the second special symbol variation game is terminated when the second special symbol variation game is terminated. The display content of the symbol display device 13 is controlled. Further, the main control CPU 30a outputs an end command indicating that the special symbol variation game is to be terminated when the effect time set in the designated variation pattern has elapsed.

  On the other hand, when the determination result of step MD13 is negative, the main control CPU 30a determines the off symbol (step MD16). Thereafter, the main control CPU 30a determines a variation pattern from a plurality of types of variation patterns for outlier normal effects based on the read variation pattern distribution random number value (step MD17).

  Then, the main control CPU 30a having determined the variation pattern in step MD17 proceeds to the process of step MD12, and, as described above, outputs a predetermined control command to the effect control CPU 31a at a predetermined timing. Various processes related to the variable game are executed, and the special symbol start process is terminated.

  Thereafter, in a process different from the special symbol start process, the main control CPU 30a stops and displays the special symbol determined as the special symbol to be variably displayed when the production time set in the designated variation pattern has elapsed. The display contents of the first special symbol display device 12 or the second special symbol display device 13 are controlled. Incidentally, the main control CPU 30a controls the display content of the first special symbol display device 12 when ending the first special symbol variation game, while the second special symbol variation game is terminated when the second special symbol variation game is terminated. The display content of the symbol display device 13 is controlled. Further, the main control CPU 30a outputs an end command when the production time determined in the designated variation pattern has elapsed.

  In the present embodiment, the main control CPU 30a that performs the jackpot lottery functions as the jackpot lottery means. Further, the main control CPU 30a that performs the falling lottery functions as a probability transfer lottery means.

Next, the common map input process performed in step MB6 will be described with reference to FIG.
In the normal input process, the main control CPU 30a determines whether or not a game ball has entered the gate 25 (step ME1). In step ME1, the main control CPU 30a determines whether or not a detection signal output from the universal switch SW4 is input. If the determination result of step ME1 is negative, the main control CPU 30a ends the normal input process. On the other hand, when the determination result of step ME1 is affirmative, the main control CPU 30a determines whether or not the number of stored customary drawings stored in the main control RAM 30c is less than the upper limit of 4 (step ME2). If the determination result of step ME2 is negative, the main control CPU 30a ends the normal input process.

  On the other hand, if the determination result in step ME2 is affirmative (the number of reserved general memory <4), the main control CPU 30a adds 1 to the number of general reserved memory and rewrites the number of general reserved memory (step ME3). At this time, the main control CPU 30a controls the display content of the general figure hold display device 26 so as to represent the number of common figure hold memories after the addition.

  After that, the main control CPU 30a obtains the value of the random number for determining the common figure from the second latch circuit La2 of the random number generation circuit 30d, and corresponds to a predetermined storage area (the number of reserved common figure in the main control RAM 30c). (Step ME4).

  In step ME4, the main control CPU 30a outputs a gate latch signal to the second latch circuit La2. Then, the main control CPU 30a acquires the value latched by the second latch circuit La2 as the value of the random number for determination per ordinary figure. Then, the main control CPU 30a ends the common map input process.

Next, the general diagram start process performed in step MB7 will be described with reference to FIG.
As shown in FIG. 9, in the normal diagram start process, the main control CPU 30a determines whether or not a normal game is being played, and whether or not a normal game is being played (step MF1). When the determination result of step MF1 is affirmative, the main control CPU 30a ends the normal diagram starting process. On the other hand, if the determination result of step MF1 is negative, the main control CPU 30a reads the number of stored general-purpose drawings and determines whether the number of stored general-purpose information is larger than “0” (step MF2). When the determination result of step MF2 is negative, the main control CPU 30a ends the normal diagram starting process. On the other hand, when the determination result of step MF2 is affirmative, the number of the number of reserved drawings stored is subtracted by 1 (step MF3) and rewritten. At this time, the main control CPU 30a controls the display content of the universal figure hold display device 26 so as to indicate the number of universal figure pending memories after subtraction. Then, the main control CPU 30a reads the value of the random number for determining per common map stored in a predetermined storage area in the main control RAM 30c (step MF4).

  Thereafter, the main control CPU 30a determines whether or not the value of the read random number for determining normal maps matches the determination value for normal maps stored in the main control ROM 30b (step MF5). Make a lottery. In step MF5, when in the variable state, the main control CPU 30a performs a lottery per general map by comparing the base figure determination value in the variable state with the value of the base figure determination random number. On the other hand, when the main control CPU 30a is in the non-variable state, the main control CPU 30a compares the common figure determination value in the non-variable state with the value of the random number for normal figure determination, and performs lottery per common figure.

  If the determination result in step MF5 is affirmative, that is, if the lottery per common figure is won, the main control CPU 30a determines a normal hit symbol as a common figure to be displayed on the universal figure display device 24 in a fixed stop display (step MF6). Thereafter, the main control CPU 30a determines the fluctuation time of the usual game (step MF7). In step MF7, the main control CPU 30a determines a shorter time as the variation time of the usual game when in the variable state, than when in the non-variable state. Further, the main control CPU 30a that has determined the fluctuation time of the usual game shifts to the processing of step MF8.

  On the other hand, if the determination result of step MF5 is negative, that is, if the lottery per common figure is not won, the main control CPU 30a determines a symbol that is normally out of place as a normal figure to be displayed on the universal figure display device 24 in a fixed stop ( Step MF9). Thereafter, the main control CPU 30a determines the fluctuation time of the usual game (step MF10). In step MF10, the main control CPU 30a determines the variation time of the usual game according to whether or not the state is the variable state, similarly to step MF7. Thereafter, the main control CPU 30a proceeds to the process of step MF8.

  In step MF8, the main control CPU 30a executes various processes related to the general game, such as controlling the display contents of the general map display device 24 so as to start the general game. At the same time, the main control CPU 30a starts measuring the fluctuation time of the usual game. Then, the main control CPU 30a ends the normal diagram start process.

  After that, the main control CPU 30a is a process different from the normal chart start process, and the main chart determined as a normal figure to be confirmed and stopped on the general map display device 24 when the determined fluctuation time of the normal figure game has elapsed. The display content of the general map display device 24 is controlled so as to display the fixed stop, and the general game is ended.

  Further, the main control CPU 30a sets “1” in the operation flag after the end of the big hit game, and sets a value “50” which is the number of times the change is given to the operation limiter. Then, when the value of the operation limiter when the special symbol variation game is over is 1 or more, the main control CPU 30a subtracts 1 from the value of the operation limiter and rewrites the value. When the value of the operation limiter after subtraction becomes “0”, the main control CPU 30a sets “0” in the operation flag and switches from the variable state to the non-variable state. Further, the main control CPU 30a sets “0” in the operation flag when the big hit game is awarded.

Next, various processes executed by the effect control CPU 31a of the effect control board 31 based on the control program stored in the effect control ROM 31b will be described.
When the effect control CPU 31a of the effect control board 31 inputs a variation pattern designation command, it determines a decorative design to be displayed on the effect display device 11 in a definite stop according to the instruction content of the command.

  Specifically, the effect control CPU 31a, when a variation pattern for the jackpot effect is designated, displays a decorative symbol (hit display) that is confirmed and stopped from among the jackpot symbol combinations (for example, [222] and [777]). Result). In addition, when the variation pattern for the outlier reach production is designated, the effect control CPU 31a displays the decorative symbols (outlier display) for confirming stop display from among the outlier symbol combinations including the reach symbol combinations (for example, [323]). Result). In addition, when the variation pattern for the outlier normal effect is designated, the effect control CPU 31a displays a fixed stop display from among the outlier symbol combinations (for example, [426] and [211]) that do not include the reach symbol combinations. The decorative design (outlier display result) is determined.

  When the change control designation command is input, the effect control CPU 31a controls the display contents of the effect display device 11 so as to display the decorative symbols in each column in a variable manner and start the effect symbol variable game. Then, when the end command is input, the effect control CPU 31a causes the effect display device 11 to confirm and stop the symbol combination (display result) of the ornament symbols determined as the ornament symbols to be confirmed and stopped.

  The effect control CPU 31a controls the light emission mode of the decorative lamp SL based on the designated variation pattern. Further, the effect control CPU 31a controls the sound output mode of the speaker SP based on the designated variation pattern.

  Thus, in the pachinko gaming machine of this embodiment, the big hit determination random number used for the big hit lottery and the falling lottery random number used for the falling lottery are generated by different random number generators (counters). Specifically, the big hit determination random number is generated by the first counter Ct1. On the other hand, the random number for falling lottery used for the falling lottery is generated by the second counter Ct2. As a result, the synchronism between the big hit determination random number and the falling lottery random number can be suppressed, and the range of effects can be widened.

  Here, a case where values generated by a single random number generator are used as a jackpot determination random number and a falling lottery random number will be described. Incidentally, the time when the big hit determination random number and the falling lottery random number are acquired is the same period (same timing). For this reason, even if two random numbers having the same value are not acquired from a single random number generator, it is possible to perform a big hit lottery or a falling lottery only by acquiring one random number. However, when performing the big hit lottery and the falling lottery with the same random number value, it is necessary to set different values for the big hit judgment value and the fall judgment value used in each lottery from the same numerical range. For this reason, since the event of winning the falling lottery and winning the jackpot lottery cannot occur, it is impossible to execute a specific effect when winning the falling lottery and winning the jackpot lottery.

  Furthermore, when winning the falling lottery, there is no effect when winning the big win lottery, and when winning the falling lottery, it cannot be expected to win the big hit lottery. Therefore, when an effect that is executed when winning the falling lottery is performed, the player's interest is reduced.

  As described above, when the same value generated by a single random number generator is used for the big hit lottery and the falling lottery, various problems have been considered when performing various effects and lotteries. However, by generating the random numbers used for the big hit lottery and the falling lottery with different random number generators, it is possible to solve the problems caused by a single random number generator. Therefore, compared to the case where the jackpot lottery and the falling lottery are performed by a single random number generator, there are various cases where the jackpot lottery and the falling lottery are performed by the random number values generated by the different random number generators. Since it becomes possible to execute the production according to the combination of the lottery results, it is possible to widen the range of production.

As described above in detail, the present embodiment has the following effects.
(1) The big hit determination random number used for the big hit lottery is generated by the first counter Ct1. On the other hand, the random number for falling lottery used for the falling lottery is generated by the second counter Ct2. For this reason, it is possible to perform separately the effect based on the value of the jackpot determination random number and the effect based on the value of the random number for falling lottery. Therefore, it becomes possible to increase the variation of a production | presentation and to improve the interest with respect to a game more.

  (2) The main control CPU 30a (CPU), the main control ROM 30b (ROM), the main control RAM 30c (RAM), and the random number generation circuit 30d are mounted on a microcomputer integrated on one chip. According to this, the main control board 30 is easier than manufacturing the main control board 30 by separately mounting the main control CPU 30a, the main control ROM 30b, the main control RAM 30c, and the random number generation circuit 30d on the main control board 30. Can be manufactured. Further, since it is impossible to replace only the main control ROM 30b, it is possible to prevent the main control ROM 30b from being illegally replaced.

  (3) Period in which the value generated by the first counter Ct1 (first random number generator) and the value generated by the second counter Ct2 (second random number generator) are updated The (update cycle) is set shorter than the control cycle (4 msec) by the main control CPU 30a. For this reason, for example, the game balls can be made to enter the start openings 16 and 18 aiming at the timing when the value generated by the first counter Ct1 becomes a predetermined value (for example, the value won in the big hit lottery). It becomes more difficult. In other words, it is possible to prevent the jackpot game from being illegally granted.

  (4) Various lotteries and determinations are performed using software random numbers and hardware random numbers. Therefore, various game effects can be performed by combining the software random number value and the hardware random number value. As a result, it is possible to increase the variation of the production, and it is possible to effectively improve the interest in the game.

  (5) The value updated by the second counter Ct2 is configured to be used in the falling lottery and the lottery per ordinary drawing. However, the random number for the falling lottery used for the falling lottery is acquired when the game ball enters the first starting port 16 or the second starting port 18, while the random number used for the lottery per usual figure is used. The random number for determination per figure is acquired when a game ball enters the gate 25. For this reason, even when a random number value is acquired from a single counter, the same value is not acquired. Therefore, different values can be acquired without increasing the number of counters. Furthermore, it is possible to perform various effects based on each random number value only by providing a single counter, and it is possible to further improve the interest of the game.

  (6) The value generated by the first counter Ct1 (first random number generator) and the value generated by the second counter Ct2 (second random number generator) are not synchronized. For this reason, the big hit lottery and the falling lottery are performed using different values. As a result, for example, it is not necessary to set the big hit determination value or the fall determination value so that the big hit determination value and the fall determination value do not overlap.

In addition, the said embodiment can be actualized in another embodiment (another example) as follows.
In the above embodiment, the present invention is embodied in a pachinko gaming machine that uses a special symbol and a decorative symbol, but may be embodied in a pachinko gaming machine that uses only a special symbol.

-In the special symbol start process of the said embodiment, you may comprise so that a big hit lottery may be performed before performing a fall lottery.
-The winning probability of the falling lottery in the above embodiment may be changed. For example, the winning probability of the falling lottery may be changed to a probability higher than the winning probability of the jackpot lottery when the probability variation state.

  -You may comprise so that the fall lottery of the said embodiment may be performed even when it is an uncertain change state. Furthermore, you may change determination rates, such as a fluctuation pattern, according to the lottery result of the fall lottery.

  -As a type of jackpot in the above-described embodiment, a jackpot that is in an unchangeable state (not in a variable state) after the jackpot game ends may be added. In this case, the fact that the game is in a variable state after the end of the big hit game is equivalent to a game privilege.

  -As a type of jackpot in the above-described embodiment, a jackpot that is in a non-probability change state (not in a probability change state) after the jackpot game ends may be added. In this case, the fact that a promiscuous state is reached after the end of the big hit game is equivalent to a game privilege.

  In the above-described embodiment, the software random number whose value is updated by the main control CPU 30a may be acquired as the random number value for determination per common figure. In this case, the standard hit determination value is determined from a numerical range that the software random number can take.

  In the above embodiment, the lottery result of the falling lottery may be reflected after the big hit lottery is performed. For example, when winning the falling lottery, the probability variation flag may be set to “0” after the big hit lottery.

In the above embodiment, the effect display device 11, the decorative lamp SL, and the speaker SP may be configured to be controlled by dedicated control boards, respectively.
In the above embodiment, the value updated by the first counter Ct1 or the second counter Ct2 may be obtained as a random number for distribution pattern distribution. When configured in this way, it is possible to set the variation pattern selection rate in detail.

  In the above embodiment, the value updated by the first counter Ct1 or the second counter Ct2 may be acquired as a special symbol distribution random number. In the case of such a configuration, it is possible to set the special symbol selection rate in detail.

  In the above embodiment, after determining the type of jackpot, the type of special symbol (special symbol shape) to be displayed on the special symbol display devices 12 and 13 may be determined according to the type of jackpot. At this time, when determining the type of jackpot, a value updated by the first counter Ct1 or the second counter Ct2 may be used. In addition, when determining the type of special symbol (special symbol shape), a value updated by the first counter Ct1 or the second counter Ct2 may be used. Note that determining the type of jackpot at this time is equivalent to determining the gaming privilege. And the process for determining the type of jackpot at this time is equivalent to a privilege lottery process. Also, determining the type of special symbol (special symbol shape) corresponds to determining the final symbol. And the process for determining the kind of special symbol at this time is equivalent to a symbol lottery process.

  In the above embodiment, the value updated by the first counter Ct1 or the second counter Ct2 may be obtained as a reach determination random number. When configured in this manner, the probability of winning the reach lottery can be set in detail.

In the above embodiment, the winning probability of the reach lottery may be changed according to the first reserved memory number or the second reserved memory number when performing the reach lottery.
In the above-described embodiment, two or more types of variation times of the usual game when the state is in the variable state or in the non-variable state may be provided. Furthermore, when determining the fluctuation time, the value updated by the second counter Ct2 may be used also as the falling lottery random number.

  -In the said embodiment, you may provide two or more types of opening modes of the opening-and-closing blade 19 when it is in a variable state or a non-variable state. Furthermore, when the opening mode of the opening / closing blade 19 is determined, a value updated by the first counter Ct1 or the second counter Ct2 may be used.

  In the above embodiment, the main control CPU 30a, the main control ROM 30b, the main control RAM 30c, and the random number generation circuit 30d do not have to be built in the one-chip microcomputer.

  In the above embodiment, the control cycle of the main control CPU 30a may be changed. For example, the control cycle may be set to be shorter than the cycle in which the value of the hardware random number is updated (frequency of clock oscillator CH).

  In the above embodiment, the period in which the first counter Ct1 or the second counter Ct2 updates the value, that is, the frequency (oscillation frequency) of the clock oscillator CH is set to be equal to or less than the control period of the main control CPU 30a. You may do it.

In the above embodiment, the value updated by the first counter Ct1 or the second counter Ct2 may be used as the random number value used for all lotteries.
In the above embodiment, the start port latch signal and the gate latch signal may be the same control command. In this case, it is possible to classify into a start port latch signal and a gate latch signal according to the timing at which the control signal is output.

  In the above embodiment, the detection signal output from the switches SW1 and SW2 when the game ball enters the start ports 16 and 18 is also output to the first latch circuit La1 and the second latch circuit La2. You may comprise. The latch circuits La1 and La2 may be configured to latch the values of the counters Ct1 and Ct2 when the detection signal is input. In such a configuration, it is possible to acquire the value of the big hit determination random number without outputting the start port latch signal or the gate latch signal. In addition, it is possible to shorten the time difference between the generation timing of the random number acquisition timing (in the case of the big hit determination random number, the timing at which the game ball enters the first start port 16) and the timing at which the random number value is actually acquired. It becomes possible.

  In the above embodiment, as a method of not synchronizing the values updated by the first counter Ct1 and the second counter Ct2, the methods of the first method to the third method described below may be adopted. .

  First, the first method will be described with reference to FIG. As shown in FIG. 10, the first method converts the clock signal generated from the clock oscillator CH into a frequency lower than the oscillation frequency according to the oscillation frequency, and sends the clock signal to the counters Ct1 and Ct2. This is a technique including frequency dividing circuits BS1 and BS2 as output update speed changing means. In the first method, when the frequency dividing ratio of the first frequency dividing circuit BS1 is different from the frequency dividing ratio of the second frequency dividing circuit BS2, the speed at which the value is updated by the first counter Ct1 (update Speed) and the speed at which the value is updated by the second counter Ct2 can be made different. As a result, the value counted by the first counter Ct1 and the value counted by the second counter Ct2 can be prevented from being synchronized. Even when one of the first divider circuit BS1 and the second divider circuit BS2 is provided, it is possible to prevent the values of the first counter Ct1 and the second counter Ct2 from being synchronized. Become.

  Next, the second method will be described with reference to FIG. As shown in FIG. 11, the second method includes a first initial value generation circuit Sk1 as first initial value setting means and a second initial value generation circuit Sk2 as second initial value setting means. It is a technique to prepare. The first initial value generation circuit Sk1 is connected to the first counter Ct1, and is a means for generating and setting a hardware initial value in the first counter Ct1. The second initial value generation circuit Sk2 is connected to the second counter Ct2, and is a means for generating and setting a hardware initial value in the second counter Ct2. In the first initial value generation circuit Sk1 and the second initial value generation circuit Sk2, hardware initial values are generated separately. For this reason, when the second method is employed, the value counted by the first counter Ct1 and the value counted by the second counter Ct2 can be different for the same clock signal input. That is, it is possible to prevent the value counted by the first counter Ct1 from being synchronized with the value counted by the second counter Ct2.

  Next, the third method will be described with reference to FIGS. As shown in FIG. 12, the third method is a method including a first order change circuit Jh1 and a second order change circuit Jh2 as order change means. The first order changing circuit Jh1 performs processing for changing the order of the values generated by the first counter Ct1 in one cycle every update cycle. Similarly, the second order change circuit Jh2 performs a process of changing the order of values generated by the second counter Ct2 in one cycle for each update cycle. A plurality of types of random patterns in which the order of values to be generated is set are provided, and the first order change circuit Jh1 and the second order change circuit Jh2 each counter Ct1, The order of the values generated by Ct2 is changed. Examples of random patterns are shown in FIGS. As shown in FIG. 13A, in the random pattern Rd1, after the odd values of 0 to 65535 are generated in order from the smallest value, the order of the values in which 0 and the even values are generated in order from the smallest value is determined. ing. Further, as shown in FIG. 13B, in the random pattern Rd2, the order of values to be generated in order from the largest value among 0 to 65535 is determined. Further, as shown in FIG. 13C, in the random pattern Rd3, the order of values randomly generated from 0 to 65535 without regularity is determined. When the third method is adopted, if the random patterns are different, the value counted by the first counter Ct1 and the value counted by the second counter Ct2 can be different for the same clock signal input. . That is, the value generated by the first counter Ct1 and the value generated by the second counter Ct2 can be prevented from being synchronized. For example, the order change circuits Jh1 and Jh2 may be configured to change the order of the values generated by the counters Ct1 and Ct2 without providing a random pattern. Further, the order of the generated values may be changed by generating values according to the number of times counted by the counters Ct1 and Ct2.

  Further, as shown in FIG. 14, the first to third methods are adopted for the first counter Ct1, and the first to third methods are adopted for the second counter Ct2. Also good. In the configuration shown in FIG. 14, the update rate of the value in the first counter Ct1 is changed by making the division ratio of the first divider circuit BS1 different from the division ratio of the second divider circuit BS2. The update rate of the value in the second counter Ct2 can be varied. Furthermore, each counter Ct1, Ct2 counts a value separately based on the hardware initial value generated separately by different initial value generation circuits Sk1, Sk2. At the same time, the order of the values generated by the counters Ct and Ct2 is changed by the different order changing circuits Jh1 and Jh2. As a result, the value generated from the first counter Ct1 and the value generated from the second counter Ct2 can be prevented from being synchronized.

  Furthermore, the method employed in the first counter Ct1 may be different from the method employed in the second counter Ct2. For example, when only the first method is employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when only the second method is employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when only the third method is employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when the first method and the second method are employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when the first method and the third method are employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when the second method and the third method are employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  Further, when all of the first to third methods are employed for the first counter Ct1, only the first method may be employed for the second counter Ct2. At this time, only the second method may be employed for the second counter Ct2, or only the third method may be employed. Further, the first method and the second method may be employed for the second counter Ct2. Further, the first method and the third method may be employed for the second counter Ct2. Further, the second method and the third method may be adopted for the second counter Ct2. Further, all of the first to third methods may be employed for the second counter Ct2.

  As an example of the combination of the above methods, a case where the first method and the second method are employed for the first counter Ct1 while the third method is employed for the second counter Ct2 will be described with reference to FIG. To do.

  As shown in FIG. 15, the first method is adopted for the first counter Ct1, while the first method is not adopted for the second counter Ct2. For this reason, the update rate of the value in the first counter Ct1 can be made different from the update rate of the value in the second counter Ct2. Further, in the first counter Ct1, when the update of the value for one cycle is completed, the value for one cycle is updated again based on the hardware initial value generated by the first initial value generation circuit Sk1. Is called. On the other hand, in the second counter Ct2, the values generated by the second order changing circuit Jh2 are generated in the order based on the random pattern. Therefore, the value generated from the first counter Ct1 and the value generated from the second counter Ct2 can be prevented from being synchronized.

  For example, when the second method and the third method are employed for the first counter Ct1, the random pattern is determined based on the hardware initial value generated by the first initial value generation circuit Sk1. You may comprise. In addition, when the second method and the third method are adopted for the first counter Ct1, the value counted first in the first period is the hardware initial value generated by the first initial value generation circuit Sk1. It is also possible to configure so that a value other than the hardware initial value generated by the first initial value generating circuit Sk1 is generated based on a random pattern.

  Incidentally, when at least one of the first to third methods is adopted for one of the first counter Ct1 and the second counter Ct2, the other counter May not adopt the first to third methods. That is, when at least one of the first method to the third method is employed for the first counter Ct1, all of the first method to the third method are employed for the second counter Ct2. You don't have to. Similarly, when at least one of the first to third methods is employed for the second counter Ct2, all of the first to third methods are applied to the first counter Ct1. It is not necessary to adopt. Even in such a configuration, the value generated from the first counter Ct1 and the value generated from the second counter Ct2 can be prevented from being synchronized.

Next, a technical idea that can be grasped from the above embodiment and another example will be added below.
(A) The first random number generator and the second random number generator are configured such that the start value of the random number sequence and the arrangement of the random number sequences after the second period can be set separately. To do.

  (B) The second random number acquisition means is a value of the second random number for lottery when the gate entrance detection means detects that a game ball has entered a gate different from the start port. And the CPU determines whether or not the second lottery random number acquired by the second random number acquisition means matches the second state determination value stored in advance in the ROM. A lottery is performed to determine whether or not to change the entrance of the open / close starter to the second state, and when the lottery is won, the entrance of the open / close starter is controlled by controlling the open / close member. The second state is assumed.

  CH ... clock oscillator, CS ... RAM clear switch, Ct1 ... first counter, Ct2 ... second counter, GH ... image display unit, La1 ... first latch circuit, La2 ... second latch circuit, LS ... decoration Lamp, SOL1 ... Open / close blade solenoid, SOL2 ... Large prize solenoid, SP ... Speaker, 10 ... Game board, 11 ... Production display device, 12 ... First special symbol display device, 13 ... Second special symbol display device, 16 ... 1st start port, 18 ... 2nd start port, 19 ... Opening / closing blade, 22 ... Grand prize entrance door, 23 ... Grand prize entrance, 24 ... Regular display device, 25 ... Gate, 28 ... Power supply board, 30 ... Main control Board, 30a ... Main control CPU, 30b ... Main control ROM, 30c ... Main control RAM, 30d ... Random number generation circuit, 30e ... Reset input circuit, 30f ... Game start signal generation circuit, 31 ... Production Your board, 31a ... the effect control for CPU, 31b ... the effect control for ROM, 31c ... the effect control for RAM.

Claims (2)

A starting port to which a starting condition of the symbol variation game can be given,
Entry detection means for detecting a game sphere entered the start opening,
A jackpot lottery means for performing a jackpot lottery for determining whether or not a special symbol is a big hit using the first hardware random number;
Using a second hardware random number, a lottery means for performing a lottery to determine whether or not to win a normal symbol;
A clock oscillator that emits a clock signal at a predetermined clock frequency;
A first random number generator for generating the first hardware random number by periodically updating numerical data within a first numerical range based on the clock signal;
A second random number generator for generating the second hardware random number by periodically updating numerical data within a second numerical range based on the clock signal;
First random number acquisition means for acquiring a numerical value generated by the first random number generator as a value of the first hardware random number;
Second random number acquisition means for acquiring a numerical value generated by the second random number generator as a value of the second hardware random number;
The main control board includes a CPU for performing arithmetic processing as the jackpot lottery means, the lottery means, the first random number acquisition means, and the second random number acquisition means, and a ROM that stores a program for operating the CPU, A RAM that temporarily stores data associated with the arithmetic processing of the CPU, and a random number generation circuit including the clock oscillator, the first random number generator, and the second random number generator are mounted.
The CPU executes arithmetic processing at a predetermined control cycle,
The update cycle of the numerical data in the first random number generator and the second random number generator is shorter than the control cycle of the CPU,
The CPU executes a random number generation process for generating a software random number different from the first hardware random number and the second hardware random number;
First order changing means for changing the order of values for each update cycle of the numerical data generated by the first random number generator in one cycle;
Second order changing means for changing the order of values for each update cycle of the numerical data generated by the second random number generator in one cycle ;
By inputting the clock signal having a different oscillation frequency to the first random number generator and the second random number generator, a value generated by the first random number generator and the second random number generator The gaming machine is characterized in that the value generated in is asynchronous . A starting port to which a starting condition of the symbol variation game can be given,
Entry detection means for detecting a game sphere entered the start opening,
A jackpot lottery means for performing a jackpot lottery for determining whether or not a special symbol is a big hit using the first hardware random number;
Probability transfer lottery means for performing a probability transfer lottery on whether to shift the lottery probability state of the jackpot lottery from the high probability lottery state to the low probability lottery state using the second hardware random number;
A clock oscillator that emits a clock signal at a predetermined clock frequency;
A first random number generator for generating the first hardware random number by periodically updating numerical data within a first numerical range based on the clock signal;
A second random number generator for generating the second hardware random number by periodically updating numerical data within a second numerical range based on the clock signal;
First random number acquisition means for acquiring a numerical value generated by the first random number generator as a value of the first hardware random number;
Second random number acquisition means for acquiring a numerical value generated by the second random number generator as a value of the second hardware random number;
The main control board includes a CPU that performs arithmetic processing as the jackpot lottery means, the probability transfer lottery means, the first random number acquisition means, and the second random number acquisition means, and a ROM that stores a program for operating the CPU And a RAM for temporarily storing data associated with the arithmetic processing of the CPU, and a random number generation circuit having the clock oscillator, the first random number generator, and the second random number generator. ,
The CPU executes arithmetic processing at a predetermined control cycle,
The update cycle of the numerical data in the first random number generator and the second random number generator is shorter than the control cycle of the CPU,
The CPU executes a random number generation process for generating a software random number different from the first hardware random number and the second hardware random number;
By inputting the clock signal having a different oscillation frequency to the first random number generator and the second random number generator, a value generated by the first random number generator and the second random number generator The gaming machine is characterized in that the value generated in is asynchronous.

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