JP6156252B2 - Semiconductor substrate manufacturing method and semiconductor substrate - Google Patents

Description

  The present specification discloses a technique related to a method for manufacturing a semiconductor substrate capable of appropriately controlling the distribution profile of specific atoms implanted in the substrate to form an amorphous layer.

  As a wafer bonding method, a technique for bonding materials to be bonded to each other at normal temperature and no pressure is known. In this technique, each of the bonding surfaces of the materials to be bonded is irradiated with an ion beam such as a rare gas to remove oxides and organic substances on the bonding surface, thereby chemically changing the atoms on the bonding surface. It is activated to an active state where a bond is easily formed. Then, by joining the activated bonding surfaces together, bonding at room temperature is possible without using an adhesive or the like. In addition, the technique of patent document 1 is known as a related technique.

JP 2012-223792 A

  In the above bonding method, atoms such as rare gas are implanted near the surface of the material to be bonded during the surface activation treatment. In the heat treatment after bonding, the implanted atoms may move and agglomerate in a specific portion such as a bonding interface portion. Then, due to the presence of a region where the implanted atoms are aggregated, the electrical characteristics of the semiconductor device manufactured using the bonded substrate may be deteriorated.

  The present specification discloses a method for manufacturing a semiconductor substrate comprising a compound semiconductor polycrystalline support substrate composed of a first element and a second element, and a compound semiconductor single crystal layer. This method for manufacturing a semiconductor substrate includes forming a polycrystalline layer of a semiconductor composed of at least one of a first element and a second element on at least one of a surface of a support substrate and a surface of a single crystal layer. Is provided. After the polycrystalline layer forming step, the surface of the support substrate is irradiated with one or more types of specific atoms in vacuum to form a first amorphous layer containing the specific atoms, and the surface of the single crystal layer is vacuumed An amorphous layer forming step of forming a second amorphous layer containing the specific atoms by irradiating one or more types of specific atoms. In the vacuum in which the amorphous layer forming step is performed, the first amorphous layer and the second amorphous layer are brought into contact with each other to form a bonded substrate having a bonded interface. A heat treatment step for heat-treating the bonding substrate is provided. The specific atom is an inert atom that does not crystallize with any of the compound semiconductor, the first element polycrystal, and the second element polycrystal. The average crystal grain size of the polycrystalline layer formed in the polycrystalline layer forming step is smaller than the average crystal grain size of the support substrate.

  In the above method, the first amorphous layer can be formed on the surface of the supporting substrate and the second amorphous layer can be formed on the surface of the single crystal layer by the amorphous layer forming step. An amorphous layer is a layer in which atoms do not have regularity like a crystal structure. The first amorphous layer and the second amorphous layer are recrystallized by performing a heat treatment process in a state where the first amorphous layer and the second amorphous layer are in contact with each other. be able to. Since the first amorphous layer and the second amorphous layer are integrally recrystallized, the support substrate and the single crystal layer can be firmly bonded to each other by a covalent bond.

  In addition, one or more kinds of specific atoms are implanted into the first amorphous layer and the second amorphous layer. The first and second amorphous layers are layers formed on the basis of one of compound semiconductor single crystal or polycrystal, first element polycrystal, and second element polycrystal. The specific atom is an inert atom that does not crystallize with any of the compound semiconductor, the first element polycrystal, and the second element polycrystal. Accordingly, when the first and second amorphous layers are recrystallized, the specific atoms cannot be present inside the crystal grains, and thus move to the crystal grain boundaries. That is, the crystal grain boundary plays a role of capturing and fixing specific atoms.

  At least one of the formation source layer of the first amorphous layer and the formation source layer of the second amorphous layer is an amorphous layer formed based on the polycrystalline layer. Then, the recrystallization of the amorphous layer formed based on the polycrystalline layer is performed so that the atomic arrangement follows the crystal structure of the polycrystalline layer. Therefore, when the amorphous layer formed based on the polycrystalline layer is recrystallized into the polycrystalline layer, the average crystal grain size of the polycrystalline layer after the recrystallization is larger than the average crystal grain size of the supporting substrate. Get smaller. That is, the existing density of crystal grain boundaries in the polycrystalline layer after recrystallization can be made higher than the existing density of crystal grain boundaries in the support substrate. As described above, when the first and second amorphous layers are recrystallized, the specific atoms are trapped and fixed at the crystal grain boundaries. Therefore, the higher the density of crystal grain boundaries, the higher the specific atoms. Less travel. Therefore, in the amorphous layer formed based on the polycrystalline layer, it is possible to suppress the movement of specific atoms during recrystallization. Therefore, since the distribution profile of the specific atom can be maintained in the same state as the distribution profile before the heat treatment step, it is possible to prevent the distribution profile of the specific atom from being changed unevenly by the heat treatment step. As a result, it is possible to prevent the occurrence of a situation in which variations in device characteristics occur due to nonuniform distribution profiles of specific atoms when various devices are manufactured using a bonded substrate. Become.

  According to the technique disclosed in the present specification, a method for manufacturing a semiconductor substrate capable of appropriately controlling a distribution profile of specific atoms implanted in the substrate to form an amorphous layer is provided. be able to.

It is a flowchart which shows the manufacturing method of a bonded substrate. It is a perspective view of a bonded substrate. It is a cross-sectional schematic diagram of a support substrate. It is explanatory drawing of the manufacturing process of a joining board | substrate. It is explanatory drawing of the manufacturing process of a joining board | substrate. It is explanatory drawing of the manufacturing process of a joining board | substrate. 3 is a partially enlarged view of the vicinity of a bonding interface before a heat treatment step of the bonding substrate 100. FIG. It is sectional drawing of a VIII-VIII part. 2 is a partially enlarged view of the vicinity of a bonding interface after a heat treatment step of the bonding substrate 100. FIG. It is sectional drawing of a XX part. 4 is a partially enlarged view of the vicinity of a bonding interface before a heat treatment step of the bonding substrate 10. FIG. 2 is a partially enlarged view of the vicinity of a bonding interface after a heat treatment step of the bonding substrate 10. FIG.

  Hereinafter, some technical features of the embodiments disclosed in this specification will be described. The items described below have technical usefulness independently.

(Feature 1) The average crystal grain size of the polycrystalline layer may be 1/100 or less of the average crystal grain size of the support substrate. Thereby, when recrystallizing the amorphous layer formed based on the polycrystalline layer, it is possible to suppress the movement of specific atoms in the amorphous layer.

(Feature 2) In the polycrystalline layer forming step, the average crystal grain size in the vicinity of the surface of the polycrystalline layer on the single crystal layer side is smaller than the average crystal grain size in the bulk part on the support substrate side of the polycrystalline layer. Thus, the formation conditions of the polycrystalline layer may be changed during the formation of the polycrystalline layer. Thereby, the existence density of the crystal grain boundary can be increased in the portion near the surface on the single crystal layer side of the polycrystalline layer where the specific atoms are implanted. In addition, the bulk portion of the polycrystalline layer on the support substrate side can be formed at a high rate regardless of the average crystal grain size.

(Feature 3) In the polycrystalline layer forming step, the polycrystalline layer may be formed by physical vapor deposition (PVD).

(Feature 4) In the step of forming a polycrystalline layer, in the case of forming a polycrystalline layer on the surface of the support substrate, the support substrate and a target that is a raw material for the polycrystalline layer are opposed to each other, and A specific voltage that increases the AC component as the formation of the polycrystalline layer proceeds may be applied. In the polycrystalline layer forming step, when a polycrystalline layer is formed on the surface of the single crystal layer, the single crystal layer and the target are opposed to each other, and a specific voltage is applied between the single crystal layer and the target. Also good. As the alternating current component increases, reverse sputtering for etching the polycrystalline layer is performed. Accordingly, as the formation of the polycrystalline layer proceeds, the average crystal grain size of the crystal grains constituting the polycrystalline layer can be reduced.

(Feature 5) The first element may be Si, the second element may be C, and the polycrystalline layer may be composed of SiC. Thereby, the single crystal layer of the compound semiconductor becomes single crystal SiC. The support substrate is polycrystalline SiC. Since polycrystalline SiC is less expensive than single crystal SiC, it is possible to manufacture a SiC substrate with a lower manufacturing cost than a substrate formed of only single crystal SiC.

(Feature 6) The first element may be Si, the second element may be C, and the polycrystalline layer may be composed of C.

(Feature 7) In the semiconductor substrate manufacturing method, one or more kinds of specific atoms may contain argon.

(Feature 8) In the polycrystalline layer forming step, a polycrystalline layer may be formed on the surface of the support substrate. You may further provide the planarization process of planarizing the surface of the polycrystalline layer formed in the surface of a support substrate by chemical mechanical polishing (Chemical Mechanical Polishing). The planarization process may be performed before the amorphous layer forming process. In chemical mechanical polishing, the etching rate changes in accordance with the plane orientation, so that when the polycrystal having various plane orientations is polished, the flatness is lowered. However, in the above method for manufacturing a semiconductor substrate, chemical mechanical polishing can be performed on the surface of the polycrystalline layer having an average crystal grain size smaller than the surface of the support substrate, so that a decrease in flatness can be suppressed. .

<Composition of bonded substrate>
FIG. 2 is a perspective view of the bonding substrate 10 according to the present embodiment. The bonding substrate 10 is formed in a substantially disk shape. The bonding substrate 10 includes a support substrate 12 disposed on the lower side, and a single crystal substrate 14 bonded to the upper surface of the support substrate 12. The single crystal substrate 14 may be formed of, for example, a single crystal of a compound semiconductor (example: 6H—SiC, 4H—SiC, GaN, AlN). For example, it may be formed of a single crystal of a single element semiconductor (eg, Si, C).

  Various materials can be used for the support substrate 12. The support substrate 12 preferably has resistance to various thermal processes applied to the single crystal substrate 14. The support substrate 12 is preferably made of a material having a small difference in thermal expansion coefficient from the single crystal substrate 14. For example, when SiC is used for the single crystal substrate 14, the support substrate 12 can be made of single crystal SiC, polycrystalline SiC, single crystal Si, polycrystalline Si, sapphire, GaN, carbon, or the like. Polycrystalline SiC may contain various polytype SiC crystals. Since polycrystalline SiC in which various polytypes are mixed can be manufactured without performing strict temperature control, the cost for manufacturing the support substrate 12 can be reduced. The thickness TT1 of the support substrate 12 may be determined so as to obtain mechanical strength that can withstand post-processing. For example, when the diameter of the support substrate 12 is 100 (mm), the thickness TT1 may be about 100 (μm).

<Method for manufacturing bonded substrate>
A method for manufacturing the bonded substrate 10 according to the present embodiment will be described with reference to the flow of FIG. 1 and schematic diagrams of FIGS. 3 to 6 include cross-sectional views, but hatching is omitted for easy viewing. In the present embodiment, as an example, a case where the support substrate 12 is polycrystalline SiC and the single crystal substrate 14 is single crystal 4H—SiC will be described.

  First, the support substrate 12 and the single crystal substrate 14 are prepared. In step S1, a polycrystalline layer forming step is performed. The polycrystalline layer forming step is a step of forming the SiC polycrystalline layer 11 on the surface of the support substrate 12 and forming the SiC polycrystalline layer 13 on the surface of the single crystal substrate 14.

  The polycrystalline layers 11 and 13 are formed by a PVD (physical vapor deposition) method. Specific examples of the PVD method include a sputtering method and an ion plating method. In these methods, SiC as a target is exposed to an ion beam, arc discharge, glow discharge, or the like in a vacuum, and scattered SiC microcrystals are attached to the surface of the support substrate 12 or the single crystal substrate 14. In addition, since the more specific formation method by PVD method is a well-known technique, detailed description is abbreviate | omitted here.

  FIG. 3 is a schematic cross-sectional view of the support substrate 12 on which the polycrystalline layer 11 is formed. The average crystal grain size of the support substrate 12 is several tens of micrometers to several hundreds of micrometers. On the other hand, the average crystal grain size of the polycrystalline layer 11 is several tens of micrometers or less. That is, the average crystal grain size of the polycrystalline layer 11 is made smaller than the average crystal grain size of the support substrate 12. The average crystal grain size of the polycrystalline layer 11 is preferably about 1/50 to 1/100 of the average crystal grain size of the support substrate 12.

  Further, the average crystal grain size in the vicinity of the surface of the polycrystalline layer 11 (see FIG. 3, region A1) is the average crystal grain size in the bulk portion (see FIG. 3, region A2) of the polycrystalline layer 11 on the support substrate 12 side. It may be made smaller than Such a structure can be realized by changing the formation conditions of the polycrystalline layer 11 during the formation of the polycrystalline layer 11. For example, when the PVD method described above is used, the support substrate 12 and a target that is a raw material of the polycrystalline layer 11 are opposed to each other. Then, a specific voltage may be applied between the support substrate 12 and the target so that the alternating current component increases as the formation of the polycrystalline layer 11 proceeds. As the alternating current component increases, the ratio at which reverse sputtering for etching the polycrystalline layer 11 is performed increases. Therefore, as the formation of the polycrystalline layer 11 proceeds, it is possible to control so that the average crystal grain size of the crystal grains constituting the polycrystalline layer 11 becomes smaller. Note that the structure of the polycrystalline layer 13 formed on the single crystal substrate 14 is the same as the structure of the polycrystalline layer 11 described above, and thus the description thereof is omitted here.

  The film thicknesses of the polycrystalline layers 11 and 13 are the depth of breakdown when the crystal structure of the surface of the polycrystalline layers 11 and 13 is destroyed at a certain depth from the surface in the amorphous layer forming step (step S3) described later. What is necessary is just to set so that it may become larger than this. Specifically, the film thicknesses of the polycrystalline layers 11 and 13 are preferably 1 nanometer or more. The film thicknesses of the polycrystalline layers 11 and 13 are preferably 1 micrometer or less.

  In step S2, a planarization process is performed. In the planarization step, the surface of the polycrystalline layer 11 formed on the support substrate 12 and the surface of the polycrystalline layer 13 formed on the single crystal substrate 14 are planarized by chemical mechanical polishing. It becomes. In addition, since chemical mechanical polishing is a well-known technique, description of the specific content of chemical mechanical polishing is abbreviate | omitted.

  In step S3, an amorphous layer forming process is performed. In the amorphous layer forming step, the surface of the polycrystalline layer 11 formed on the support substrate 12 is modified to form the amorphous layer 11b, and the polycrystalline layer 13 formed on the single crystal substrate 14 is formed. This is a step of forming the amorphous layer 13b by modifying the surface. An amorphous layer refers to a layer in which atoms have no regularity such as a crystal structure.

  This will be specifically described. As shown in FIG. 4, the single crystal substrate 14 on which the polycrystalline layer 13 is formed and the support substrate 12 on which the polycrystalline layer 11 is formed are set in a chamber 101. Next, the relative positions of the single crystal substrate 14 and the support substrate 12 are aligned. The alignment is performed so that both substrates can be brought into contact with each other in a correct positional relationship in a contact process described later. Next, the chamber 101 is evacuated. The degree of vacuum in the chamber 101 may be, for example, about 1 × 10 −4 to 1 × 10 −6 (Pa).

  As shown in FIG. 5, the surface 11 a of the polycrystalline layer 11 and the surface 13 a of the polycrystalline layer 13 are irradiated with a neutral atom beam of argon using a FAB gun (Fast Atom Beam) 102. The neutral atom beam of argon is uniformly applied to the entire surface 11a and the entire surface 13a. For example, the entire surface 11a and the surface 13a may be irradiated while scanning with a neutral atom beam of argon so as to have an overlapping portion. Thereby, the crystal structure of the surfaces 11a and 13a can be destroyed at a certain depth from the surface. As a result, amorphous layers 11b and 13b containing Si and C can be formed on the substrate surface. In addition, argon atoms are implanted into the amorphous layers 11b and 13b. Further, the amorphous layers 11b and 13b can be formed so that the content ratio of Si and C is 1: 1. This makes it possible to form SiC crystals when recrystallizing the amorphous layers 11b and 13b.

  In FIG. 5, the amorphous layers 11 b and 13 b are shown in a pseudo manner by gray filling. The thickness T11 of the amorphous layer 11b and the thickness T13 of the amorphous layer 13b can be controlled by the energy of argon atoms irradiated from the FAB gun 102. The argon irradiation amount (atoms / cm 2) may be calculated using the thickness of the amorphous layer to be formed and the sputtering rate. The incident energy may be about 1.5 (keV), for example.

  In the amorphous layer forming step, the oxide film and the adsorption layer on the surfaces 11a and 13a can be removed to expose the bonds, so that the surfaces 11a and 13a can be activated. Further, since the amorphous layer forming step is a treatment in a vacuum, the surfaces 11a and 13a can be kept active without being oxidized.

  In step S4, a contact process is performed. In the contact step, as shown in FIG. 6, the amorphous layer 11 b formed on the surface of the support substrate 12 and the amorphous layer 13 b formed on the surface of the single crystal substrate 14 are placed in the chamber 101. And contact in vacuum. Alternatively, the support substrate 12 and the single crystal substrate 14 may be fixed using a jig (not shown) or the like so as not to separate after contact.

  In step S5, a heat treatment process is performed. In the heat treatment step, the support substrate 12 and the single crystal substrate 14 are heat treated while the amorphous layers 11b and 13b are in contact with each other. The heat treatment process may be performed in the chamber 101 under reduced pressure, or may be performed in a furnace other than the chamber 101.

  In the heat treatment step, the support substrate 12 and the single crystal substrate 14 are heated to a predetermined temperature (for example, about 1000 ° C.). Thereby, the amorphous layers 11b and 13b can be made fluid. A space may be formed on the contact surface between the amorphous layers 11b and 13b. The volume of the space to be formed increases as the surface roughness of the amorphous layers 11b and 13b increases. Therefore, by performing the heat treatment step, the atoms forming the amorphous layers 11b and 13b can be made to flow, so that the space formed at the contact surface between the amorphous layers 11b and 13b can be filled. it can.

  Further, by the heat treatment step, the amorphous layers 11b and 13b can be recrystallized from a state where the atomic arrangement is not regular to a state where the atomic arrangement is regular. When the recrystallization is completed, the amorphous layers 11b and 13b disappear, and the bonded substrate 10 in which the polycrystalline layers 13 and 11 are directly bonded is formed.

<Comparative example>
A comparative example will be described with reference to FIGS. In the comparative example, a case where the bonded substrate 100 is formed without performing the polycrystalline layer forming process of step S1 will be described. FIG. 7 is a partially enlarged view of the vicinity of the bonding interface of the bonding substrate 100 before the heat treatment step (step S5). 8 is a cross-sectional view of the VIII-VIII portion of FIG. That is, FIG. 8 is a view of the surface of the amorphous layer 112 b observed from a direction perpendicular to the bonding substrate 100. FIG. 9 is a partially enlarged view of the same portion as FIG. 7 after the heat treatment step. FIG. 10 is a cross-sectional view of the same portion as FIG. 8 after the heat treatment step. In FIGS. 7 to 10, the argon atoms are shown in a pseudo manner by white circles. 7 and 9, the crystal grain boundaries of the SiC polycrystal are described in a net-like pattern.

  As shown in FIG. 7, in the bonding substrate 100, an amorphous layer 112b formed by destroying the surface of the support substrate 112, and an amorphous layer 114b formed by destroying the surface of the single crystal substrate 114, Is in contact. As shown in FIG. 7, argon atoms are implanted into the amorphous layers 112b and 114b by the amorphous layer forming step of step S3. Before the heat treatment step, the distribution profile of argon atoms in the depth direction (that is, the vertical direction in FIG. 7) is in a state according to a Gaussian distribution. Therefore, in the amorphous layers 112b and 114b, argon atoms are dispersed throughout the depth direction. As shown in FIG. 8, before the heat treatment step, the in-plane distribution profile of argon atoms when the surface of the amorphous layer 112b is observed is uniform. In other words, the in-plane density of argon atoms is constant before the heat treatment step. This is because in step S3, the surface of the support substrate 112 and the surface 1 of the single crystal substrate 114 are uniformly irradiated with a neutral atom beam of argon.

  In the heat treatment step (step S5), the entire bonded substrate 100 is heated by the heat treatment using the furnace. Further, SiC constituting the support substrate 112 and the single crystal substrate 114 has a characteristic that the temperature of the amorphous layers 112b and 114b is difficult to increase because it has higher thermal conductivity than Si and the like. Therefore, in the heat treatment using the furnace, the temperature rise inclination of the amorphous layers 112b and 114b is smaller than that in the high-speed heat treatment such as laser annealing. For example, the amorphous layers 112b and 114b can only be heated at a maximum temperature increase gradient of several tens of degrees / second.

  When the amorphous layers 112b and 114b are heat-treated with such a relatively small temperature rise inclination, the amorphous layers 112b and 114b have regularity in the atomic arrangement from a state in which the atomic arrangement is not regular. It can be recrystallized to the state. The recrystallization of the amorphous layer 114b is performed from the interface F1 (see FIG. 7) between the amorphous layer 114b and the single crystal substrate 114 to the inside of the amorphous layer 114b (that is, the lower side of FIG. 7, see arrow Y1). ) Toward the crystal structure of the single crystal substrate 114 (single crystal SiC). Further, the recrystallization of the amorphous layer 112b is performed from the interface F2 (see FIG. 7) between the amorphous layer 112b and the support substrate 112 to the inside of the amorphous layer 112b (that is, the upper side in FIG. 7, see arrow Y2). Toward the support substrate 112, the atomic arrangement follows the crystal structure (polycrystalline SiC). Therefore, when the recrystallization is completed, as shown in FIG. 9, the amorphous layers 112b and 114b disappear, and the bonded substrate 100 in which the single crystal substrate 114 and the support substrate 112 are directly bonded is formed. Since the amorphous layers 112b and 114b are integrally recrystallized, the single crystal substrate 114 and the support substrate 112 can be firmly bonded to each other by a covalent bond.

  Argon is an inert atom that does not crystallize with SiC. Then, at the time of recrystallization of the amorphous layers 112b and 114b, argon is not taken into the crystal grains and moves to the crystal grain boundaries. That is, the crystal grain boundary functions as a getter that captures and fixes argon. Then, the argon atoms in the amorphous layer 114b move to a region where recrystallization is not performed as the recrystallization of the amorphous layer 114b proceeds. That is, it moves in the direction of arrow Y1 in FIG. And when an argon atom reaches | attains a crystal grain boundary, it will be trapped by the crystal grain boundary and will be fixed. Similarly, the argon atoms in the amorphous layer 112b move to a region where recrystallization is not performed as the recrystallization of the amorphous layer 112b proceeds. That is, it moves in the direction of arrow Y2 in FIG. And when an argon atom reaches | attains a crystal grain boundary, it will be trapped by the crystal grain boundary and will be fixed. As a result, when the recrystallization of the amorphous layers 112b and 114b is completed, the crystal grains in the vicinity of the bonding interface 115 between the support substrate 112 and the single crystal substrate 114 and in the support substrate 112 are obtained as shown in FIG. Argon atoms aggregate in the field.

  Further, as shown in FIG. 10, after the heat treatment step, argon atoms may move in the in-plane direction and partially agglomerate, whereby agglomerated portions may be scattered in islands or lines. In this case, the in-plane distribution profile of argon atoms is not uniform. In other words, in-plane variation may occur in the in-plane density of argon atoms after the heat treatment step.

  As described above, in the comparative example, the in-plane distribution profile of argon atoms may change to a non-uniform state by the heat treatment process. Then, when various devices are produced using the bonding substrate 100, in-plane variation of device characteristics may occur, which is not preferable. In the comparative example, argon atoms may aggregate near the bonding interface 115 in the distribution profile of the argon atoms in the depth direction. Then, when a vertical device in which a current path is formed so as to cross the bonding interface 115 is created, it may cause a change in IV characteristics, which is not preferable.

<Effect>
The effects of the disclosed technique of this specification will be described with reference to FIGS. 11 and 12. FIG. 11 is a partially enlarged view of the vicinity of the bonding interface of the bonding substrate 10 before the heat treatment step (step S5). FIG. 12 is a partially enlarged view of the same portion as FIG. 11 after the heat treatment step. In FIG. 11 and FIG. 12, the argon atoms are shown in a pseudo manner with white circles, and the crystal grain boundaries of the SiC polycrystal are shown in a mesh shape.

  As shown in FIG. 11, in the bonding substrate 10, the amorphous layer 11 b formed by destroying the surface of the polycrystalline layer 11 on the support substrate 12 and the surface of the polycrystalline layer 13 on the single crystal substrate 14 are formed. The amorphous layer 13b formed by destruction is in contact. As described above, in the amorphous layers 11b and 13b, argon atoms are dispersed in the entire depth direction according to the Gaussian distribution. In addition, the in-plane distribution profile of argon atoms is uniform.

  In the heat treatment step (step S5), the entire bonded substrate 10 is heated by the heat treatment using the furnace. Thereby, the amorphous layers 11b and 13b can be recrystallized from a state where the atomic arrangement is not regular to a state where the atomic arrangement is regular. The recrystallization of the amorphous layer 13b is performed from the interface F11 (see FIG. 11) between the amorphous layer 13b and the polycrystalline layer 13 to the inside of the amorphous layer 13b (that is, the lower side of FIG. 11, see arrow Y11). ), The atomic arrangement follows the crystal structure (polycrystalline SiC) of the polycrystalline layer 13. Further, the recrystallization of the amorphous layer 11b is performed from the interface F12 (see FIG. 11) between the amorphous layer 11b and the polycrystalline layer 11 to the inside of the amorphous layer 11b (that is, the upper side in FIG. 11, see arrow Y12). ) Toward the crystal structure of the polycrystalline layer 11 (polycrystalline SiC). Therefore, when the recrystallization is completed, as shown in FIG. 12, the amorphous layers 11b and 13b disappear, and the bonded substrate 10 in which the polycrystalline layers 11 and 13 are directly bonded is formed. Since the amorphous layers 11b and 13b are integrally recrystallized, the single crystal substrate 14 and the support substrate 12 can be firmly bonded to each other by a covalent bond.

  As described above, the argon atoms in the amorphous layer 13b move in the direction of the arrow Y11 in FIG. 11 as the recrystallization of the amorphous layer 13b proceeds, and are trapped and fixed at the crystal grain boundaries. Similarly, the argon atoms in the amorphous layer 11b move in the direction of the arrow Y12 in FIG. 11 as the recrystallization of the amorphous layer 11b proceeds, and are trapped and fixed at the crystal grain boundaries. As a result, when the recrystallization of the amorphous layers 11b and 13b is completed, as shown in FIG. 12, argon atoms are fixed to the crystal grain boundaries in the vicinity of the junction interface 15 of the polycrystalline layers 11 and 13. The structure is completed.

  The average crystal grain size of the polycrystalline layers 11 and 13 after recrystallization is smaller than the average crystal grain size of the support substrate 12. That is, the existing density of crystal grain boundaries in the polycrystalline layers 11 and 13 after recrystallization can be made higher than the existing density of crystal grain boundaries in the support substrate 12. As described above, since argon is trapped and fixed at the crystal grain boundary, the moving amount of argon can be reduced as the density of the crystal grain boundary increases. Therefore, in amorphous layers 11b and 13b formed based on polycrystalline layers 11 and 13, it is possible to suppress the movement of argon during recrystallization.

  As a result, the distribution profile in the depth direction of argon atoms (see FIG. 12) when recrystallization of the amorphous layers 11b and 13b is completed is similar to the distribution profile before the heat treatment step (see FIG. 11). It is possible to maintain a state according to a Gaussian distribution. Further, the in-plane distribution profile of argon atoms when the recrystallization of the amorphous layers 11b and 13b is completed can be maintained in a uniform state, similar to the distribution profile before the heat treatment step (see FIG. 8). it can.

  As described above, in the disclosed technique of the present specification, it is possible to prevent the in-plane distribution profile of argon atoms from being changed to a non-uniform state by the heat treatment process. When various devices are created using the bonding substrate 10, it is possible to suppress a situation in which in-plane variation in device characteristics occurs and a situation in which the IV characteristics change.

<Other effects>
The average crystal grain size in the vicinity of the surface of the polycrystalline layer 11 (see FIG. 3, region A1) is larger than the average crystal grain size in the bulk portion (see FIG. 3, region A2) of the polycrystalline layer 11 on the support substrate 12 side. Have been made smaller. Thereby, since the existence density of the crystal grain boundary can be increased in the portion near the surface of the polycrystalline layer 11 where argon is implanted, the movement of argon during recrystallization is effectively suppressed. Is possible. Further, since the bulk portion of the polycrystalline layer 11 is not implanted with argon, the density of crystal grain boundaries may be low. Therefore, the bulk portion can be formed using conditions that increase the formation rate of the polycrystalline layer 11 (for example, conditions that increase the average crystal grain size).

  The support substrate 12 is polycrystalline SiC, but it is difficult to planarize the polycrystalline SiC by CMP. This is because various surface orientations are exposed on the surface of polycrystalline SiC. When CMP is performed, the etching rate changes depending on the plane orientation, so that it is greatly affected by crystal grains and the flatness is lowered. However, in the method described in this specification, the polycrystalline layer 11 is formed on the support substrate 12, and the surface of the polycrystalline layer 11 is planarized by CMP. Since the average crystal grain size of the polycrystalline layer 11 is smaller than the average crystal grain size of the support substrate 12, the influence on the flatness of the surface after CMP is suppressed as compared with the case where the surface of the support substrate 12 is CMPed. Can do. That is, the polycrystalline layer 11 can be used as an intermediate layer for obtaining a flat surface.

  In the contact step (step S4), the surfaces 11a from which the oxide film and the adsorption layer have been removed in the amorphous layer formation step (step S3) are brought into contact with each other in a vacuum, so that clean surfaces are joined together. be able to. As a result, it is possible to form a structure in which the polycrystalline layers are directly joined at the atomic level. Therefore, when a vertical device is formed using the bonding substrate 10, even when the current path is formed so as to cross the interface between the support substrate 12 and the single crystal substrate 14, the presence of the interface causes the presence of the device. It is possible to prevent performance from degrading (eg, increase in on-resistance). With the bonding method described in the present specification, it is possible to manufacture a bonded substrate 10 suitable for manufacturing a vertical device.

  As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.

<Modification>
In the polycrystalline layer forming step (step S1), a polycrystalline layer may be formed on at least one surface of the support substrate 12 and the single crystal substrate. For example, the polycrystalline layer 11 may be formed only on the surface of the support substrate 12. In this case, in the amorphous layer forming step (step S3), the surface of the single crystal substrate 14 may be destroyed to form an amorphous layer.

  The polycrystalline layer formed in the polycrystalline layer forming step (step S1) may have the same average grain size in the vicinity of the surface and the bulk portion. Such a structure can be realized by maintaining the formation conditions of the polycrystalline layer 11 constant during the formation of the polycrystalline layer 11.

  The polycrystalline layer formed in the polycrystalline layer forming step (step S1) is not limited to SiC polycrystalline. The polycrystalline layer may be formed of an element contained in SiC constituting the support substrate 12 or the single crystal substrate 14. For example, the polycrystalline layer may be Si polycrystalline or C polycrystalline.

  The method for forming the polycrystalline layer in the polycrystalline layer forming step (step S1) is not limited to the PVD method. For example, the polycrystalline layer may be formed by a CVD (chemical vapor deposition) method. Various types of PVD methods can be used for the polycrystalline layer forming step (step S1). For example, thermal plasma PVD using SiC powder as a raw material may be used.

  In the amorphous layer forming step (step S3), the method for forming the amorphous layer is not limited to the neutral atom beam irradiation of argon. For example, a method of implanting atoms, molecules, ions, or the like such as He, hydrogen, Ar, Si, or C may be used.

  The single crystal substrate 14 is not limited to 4H—SiC single crystal. Various polytype single crystal SiC such as 3C—SiC and 6H—SiC can be used as the single crystal substrate 14.

  In order to form the single crystal substrate 14, a separation technique (also referred to as Smart Cut (registered trademark)) by ablation of hydrogen atoms may be used.

  The material used for the support substrate 12 is not limited to polycrystalline SiC. Any material may be used as long as it is resistant to various thermal processes applied to the single crystal substrate 14. For example, it may be a sintered body formed of a mixed material of ceramic materials. The ceramic material to be used may be various materials, and may be, for example, at least one of SiC, Si, AlN, Al2O3, GaN, Si3N4, SiO2, and Ta2O5.

  The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

  10: bonding substrate, 11 and 13: polycrystalline layer, 11b and 13b: amorphous layer, 12: support substrate, 14: single crystal substrate, 101: chamber, 102: FAB gun

Claims (15)

A method of manufacturing a semiconductor substrate comprising a polycrystalline support substrate of a compound semiconductor composed of a first element and a second element, and a single crystal layer of the compound semiconductor,
Forming a polycrystalline layer of a semiconductor composed of at least one of the first element and the second element on at least one of the surface of the support substrate and the surface of the single crystal layer; and
After the polycrystalline layer forming step, the surface of the support substrate is irradiated with one or more types of specific atoms in a vacuum to form a first amorphous layer containing the specific atoms, and the single crystal layer An amorphous layer forming step of forming a second amorphous layer containing the specific atom by irradiating the surface of
A contact step in which the first amorphous layer and the second amorphous layer are brought into contact with each other in a vacuum in which the amorphous layer forming step is performed, and a bonded substrate having a bonded interface is generated;
A heat treatment step for heat-treating the bonding substrate;
With
The specific atom is an inert atom that does not crystallize with any of the compound semiconductor, the polycrystal of the first element, and the polycrystal of the second element,
An average crystal grain size of the polycrystalline layer formed in the polycrystalline layer forming step is smaller than an average crystal grain size of the support substrate.   The method for manufacturing a semiconductor substrate according to claim 1, wherein an average crystal grain size of the polycrystalline layer is 1/100 or less of an average crystal grain size of the support substrate.   In the polycrystalline layer forming step, the average crystal grain size in the vicinity of the surface of the polycrystalline layer is smaller than the average crystal grain size in the bulk part on the support substrate side of the polycrystalline layer. The method for manufacturing a semiconductor substrate according to claim 1, wherein a formation condition of the polycrystalline layer is changed during the formation of the polycrystalline layer.   4. The method of manufacturing a semiconductor substrate according to claim 1, wherein, in the polycrystalline layer forming step, the polycrystalline layer is formed by physical vapor deposition (PVD). 5. In the polycrystalline layer forming step,
When forming the polycrystalline layer on the surface of the support substrate, the support substrate and a target that is a raw material of the polycrystalline layer are opposed to each other, and the polycrystalline layer is formed between the support substrate and the target. Apply a specific voltage that increases the AC component as the formation progresses,
When forming the polycrystalline layer on the surface of the single crystal layer, the single crystal layer and the target are opposed to each other, and the specific voltage is applied between the single crystal layer and the target. A method for manufacturing a semiconductor substrate according to claim 3 or 4. The first element is Si;
The second element is C;
The method for manufacturing a semiconductor substrate according to claim 1, wherein the polycrystalline layer is made of SiC. The first element is Si;
The second element is C;
The method for manufacturing a semiconductor substrate according to claim 1, wherein the polycrystalline layer is made of C. 6.   The method for manufacturing a semiconductor substrate according to claim 1, wherein the one or more types of specific atoms include argon. In the polycrystalline layer forming step, the polycrystalline layer is formed on the surface of the support substrate,
Further comprising a planarization step of planarizing the surface of the polycrystalline layer formed on the surface of the support substrate by chemical mechanical polishing.
The method for manufacturing a semiconductor substrate according to claim 1, wherein the planarization step is performed before the amorphous layer forming step. A polycrystalline support substrate of a compound semiconductor composed of a first element and a second element;
A semiconductor polycrystalline layer composed of at least one of the first element and the second element, disposed on the support substrate;
A single-crystal layer of the compound semiconductor disposed on the polycrystalline layer;
With
The average crystal grain size of the polycrystalline layer is smaller than the average crystal grain size of the support substrate,
There are a plurality of one or more types of specific atoms at a grain boundary near the surface of the polycrystalline layer on the single crystal layer side,
The semiconductor substrate, wherein the specific atom is an inert atom that does not crystallize with any of the compound semiconductor, the first element polycrystal, and the second element polycrystal.   The semiconductor substrate according to claim 10, wherein an average crystal grain size of the polycrystalline layer is 1/100 or less of an average crystal grain size of the support substrate.   The average crystal grain size in the vicinity of the surface on the single crystal layer side of the polycrystalline layer is smaller than the average crystal grain size in the bulk part on the support substrate side of the polycrystalline layer. The semiconductor substrate according to 10 or 11. The first element is Si;
The second element is C;
The semiconductor substrate according to claim 10, wherein the polycrystalline layer is made of SiC. The first element is Si;
The second element is C;
The semiconductor substrate according to claim 10, wherein the polycrystalline layer is made of C.   The semiconductor substrate according to claim 10, wherein the one or more types of specific atoms include argon.