JP6115634B2 - Method for forming p-type selective emitter - Google Patents

Method for forming p-type selective emitter Download PDF

Info

Publication number
JP6115634B2
JP6115634B2 JP2015521326A JP2015521326A JP6115634B2 JP 6115634 B2 JP6115634 B2 JP 6115634B2 JP 2015521326 A JP2015521326 A JP 2015521326A JP 2015521326 A JP2015521326 A JP 2015521326A JP 6115634 B2 JP6115634 B2 JP 6115634B2
Authority
JP
Japan
Prior art keywords
film
dopant
selective emitter
diffusion layer
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2015521326A
Other languages
Japanese (ja)
Other versions
JPWO2014196253A1 (en
Inventor
光人 高橋
光人 高橋
省三 白井
省三 白井
大塚 寛之
寛之 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Chemical Co Ltd
Publication of JPWO2014196253A1 publication Critical patent/JPWO2014196253A1/en
Application granted granted Critical
Publication of JP6115634B2 publication Critical patent/JP6115634B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2225Diffusion sources
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Description

本発明は、有機ケイ素化合物からなる膜をドーパントの拡散を抑制する拡散抑制マスクに使用し、p層に選択エミッタ層を形成する方法に関する。 The present invention is a film made of an organic silicon compound used to suppress diffusion suppression mask dopant diffusion relates to how to form a selective emitter layer on the p-layer.

太陽電池は、光エネルギーを電力に変換する半導体素子であり、p−n接合型、pin型、ショットキー型などがあり、特にp−n接合型が広く用いられている。また、太陽電池をその基板材料を基に分類すると、シリコン結晶系太陽電池、アモルファス(非晶質)シリコン系太陽電池、化合物半導体系太陽電池の3種類に大きく分類される。シリコン結晶系太陽電池は、更に、単結晶系太陽電池と多結晶系太陽電池に分類される。太陽電池用シリコン結晶基板は比較的容易に製造できることから、その生産規模は現在最大となっており、今後も更に普及していくものと思われる(例えば、特許文献1:特開平8−073297号公報)。   A solar cell is a semiconductor element that converts light energy into electric power, and includes a pn junction type, a pin type, a Schottky type, and the pn junction type is widely used. Further, when solar cells are classified based on their substrate materials, they are broadly classified into three types: silicon crystal solar cells, amorphous (amorphous) silicon solar cells, and compound semiconductor solar cells. Silicon crystal solar cells are further classified into single crystal solar cells and polycrystalline solar cells. Since a silicon crystal substrate for a solar cell can be manufactured relatively easily, its production scale is currently the largest and is expected to become more widespread in the future (for example, Patent Document 1: JP-A-8-073297). Publication).

太陽電池の出力特性は、一般に、ソーラーシミュレーターを用いて出力電流電圧曲線を測定することにより評価される。この曲線上で出力電流Imaxと出力電圧Vmaxとの積、Imax×Vmaxが最大となる点を最大出力Pmaxとよび、該Pmaxを太陽電池に入射する総光エネルギー(S×I:Sは素子面積、Iは照射する光の強度)で除した値:
η={Pmax/(S×I)}×100(%)
が太陽電池の変換効率ηとして定義される。
The output characteristics of a solar cell are generally evaluated by measuring an output current voltage curve using a solar simulator. The product of the output current I max and the output voltage V max on this curve, the point at which I max × V max is maximum is called the maximum output P max , and this P max is the total light energy (S × (I: S is the element area, I is the intensity of the irradiated light))
η = {P max / (S × I)} × 100 (%)
Is defined as the conversion efficiency η of the solar cell.

変換効率ηを高めるには、短絡電流Isc(電流電圧曲線にてV=0の時の出力電流値)あるいはVoc(電流電圧曲線にてI=0の時の出力電圧値)を大きくすること、及び出力電流電圧曲線をなるべく角形に近い形状のものとすることが重要である。なお、出力電流電圧曲線の角形の度合いは一般に、
FF=Pmax/(Isc×Voc)
で定義されるフィルファクタ(曲線因子)により評価でき、該FFの値が1に近いほど出力電流電圧曲線が理想的な角形に近づき、変換効率ηも高められることを意味する。
In order to increase the conversion efficiency η, the short-circuit current Isc (output current value when V = 0 in the current-voltage curve) or Voc (output voltage value when I = 0 in the current-voltage curve) is increased. It is important to make the output current voltage curve as close to a square as possible. The squareness of the output current voltage curve is generally
FF = P max / (Isc × Voc)
It can be evaluated by the fill factor (curve factor) defined by the equation (1). The closer the FF value is to 1, the closer the output current-voltage curve becomes to an ideal square, and the higher the conversion efficiency η.

上記変換効率ηを向上させるには、キャリアの表面再結合を低減させることが重要である。シリコン結晶系太陽電池においては、太陽光の入射光によって光生成した少数キャリアが、主に拡散によってp−n接合面へ到達した後、受光面及び裏面に取り付けられた電極から多数キャリアとして外部へ取り出され、電気エネルギーとなる。   In order to improve the conversion efficiency η, it is important to reduce the surface recombination of carriers. In a silicon crystal solar cell, minority carriers generated by incident light of sunlight reach the pn junction surface mainly by diffusion, and then are transferred to the outside as majority carriers from the electrodes attached to the light receiving surface and the back surface. It is taken out and becomes electric energy.

その際、電極面以外の基板表面に存在する界面準位を介して、本来電流として取り出すことのできたキャリアが再結合して失われることがあり、変換効率ηの低下に繋がる。   At that time, carriers that could be extracted as current through the interface states existing on the substrate surface other than the electrode surface may be recombined and lost, leading to a decrease in conversion efficiency η.

そこで、高効率太陽電池においては、シリコン基板の受光面と裏面とを、電極とのコンタクト部を除いて絶縁膜で保護し、シリコン基板と絶縁膜との界面におけるキャリア再結合を抑制し、変換効率ηの向上が図られている。   Therefore, in high-efficiency solar cells, the light-receiving surface and back surface of the silicon substrate are protected by an insulating film except for the contact portion with the electrode, and carrier recombination at the interface between the silicon substrate and the insulating film is suppressed and converted. The efficiency η is improved.

太陽電池が今後更に普及するためには、より高い変換効率が求められる。変換効率を高める手段として、例えば電極直下のみにドーパントを高濃度に含む高濃度拡散層を形成し、受光面の他の部分の拡散層の表面ドーパント濃度を下げること、つまり選択エミッタを形成することにより変換効率を向上させる方法がある。   In order for solar cells to become more widespread in the future, higher conversion efficiency is required. As a means of increasing the conversion efficiency, for example, a high concentration diffusion layer containing a high concentration of dopant is formed only directly under the electrode, and the surface dopant concentration of the diffusion layer in the other part of the light receiving surface is lowered, that is, a selective emitter is formed. There is a method for improving the conversion efficiency.

これに対し、特許文献2(特開2007−081300号公報)では、酸化ケイ素膜を拡散制御マスク(拡散抑制マスク)に適用し、パターニングされた拡散層を形成する方法が提案されている。しかしながら、酸化ケイ素膜を拡散制御マスク(拡散抑制マスク)に適用した場合においては、酸化ケイ素膜の膜厚を均一に形成することが困難であり、その結果、拡散濃度にムラが発生し均一な拡散層が形成できない等の問題がある。   On the other hand, Patent Document 2 (Japanese Patent Application Laid-Open No. 2007-081300) proposes a method of forming a patterned diffusion layer by applying a silicon oxide film to a diffusion control mask (diffusion suppression mask). However, when the silicon oxide film is applied to a diffusion control mask (diffusion suppression mask), it is difficult to form a uniform film thickness of the silicon oxide film. There is a problem that a diffusion layer cannot be formed.

また、特許文献3(特開2004−221149号公報)では、インクジェット方式により複数の種類の塗布剤の塗り分けを同時に行い、ドーパント濃度やドーパント種類が異なる領域を簡単な工程で作り出すことを提案している。しかしながら、このようなインクジェット方式において、ドーパントとしてリン酸等を用いると腐食対策が必要であり、装置が複雑となる上に、メンテナンスも煩雑となる。また、ドーパント濃度や種類が異なる塗布剤をインクジェットで塗り分けても、1回の熱処理で拡散させると、オートドープにより所望の濃度差が得られなくなってしまう。   Patent Document 3 (Japanese Patent Application Laid-Open No. 2004-221149) proposes that a plurality of types of coating agents are separately applied by an inkjet method to create regions with different dopant concentrations and dopant types in a simple process. ing. However, in such an ink jet system, when phosphoric acid or the like is used as a dopant, a countermeasure against corrosion is necessary, and the apparatus becomes complicated and maintenance becomes complicated. Further, even if coating agents having different dopant concentrations and types are applied separately by inkjet, if the diffusion is performed by a single heat treatment, a desired concentration difference cannot be obtained by autodoping.

更に、特許文献4(特開2004−281569号公報)では、低濃度拡散層と高濃度拡散層を2回の熱処理により形成する方法を提案している。しかしながら、この方法では2回のドーパントの熱拡散を行う必要があり、工程が煩雑となって製造コストの増加を招くおそれがある。だからといって熱処理を1回にすると、オートドーピングにより受光面の電極直下以外の部分もドーパントが高濃度となり、高変換効率を示さなくなる。   Further, Patent Document 4 (Japanese Patent Laid-Open No. 2004-28169) proposes a method of forming a low concentration diffusion layer and a high concentration diffusion layer by two heat treatments. However, in this method, it is necessary to perform thermal diffusion of the dopant twice, which may complicate the process and increase the manufacturing cost. However, if the heat treatment is performed once, the dopant is highly concentrated in portions other than the portion immediately below the electrode on the light receiving surface due to autodoping, and high conversion efficiency is not exhibited.

受光面がp型となる太陽電池においても、高変換効率とするには選択エミッタの形成は必要不可欠であり、表面ドーパント濃度のコントロールが重要である。しかしながら、ボロンの選択エミッタを形成することは容易ではなく、従来の方法では複数回の拡散抑制マスク形成や熱処理が必要であり、工程が複雑で煩雑であった。   Even in a solar cell having a p-type light-receiving surface, formation of a selective emitter is indispensable for high conversion efficiency, and control of the surface dopant concentration is important. However, it is not easy to form a boron selective emitter, and the conventional method requires a plurality of diffusion suppression mask formations and heat treatments, and the process is complicated and complicated.

特開平8−073297号公報JP-A-8-073297 特開2007−081300号公報JP 2007-081300 A 特開2004−221149号公報JP 2004-221149 A 特開2004−281569号公報JP 2004-28169 A

本発明は、上記問題点に鑑みてなされたものであって、簡便な方法でp型選択エミッタ層を形成することができ、高いエネルギー変換効率を有する太陽電池が得られるp型選択エミッタ形成方法を提供することを目的とする。 The present invention has been made in view of the above problems, and can be used to form a p-type selective emitter layer by a simple method, and a p-type selective emitter formation method that can provide a solar cell having high energy conversion efficiency. The purpose is to provide.

本発明者らは、上記目的を達成するため鋭意検討した結果、シリコン基板の受光面側に有機ケイ素化合物からなる膜を形成し、p層高濃度拡散領域に相当する部位の有機ケイ素化合物の膜を除去し開口部を形成した後、ボロンを含有した塗布剤を有機ケイ素化合物の膜及び開口部を覆って塗布し拡散処理することで、複数回の熱処理工程を必要とせず、簡便かつ確実にp型選択エミッタ層を形成することができることを知見した。   As a result of intensive studies to achieve the above object, the inventors of the present invention formed a film made of an organosilicon compound on the light receiving surface side of a silicon substrate, and formed a film of an organosilicon compound at a portion corresponding to a p-layer high concentration diffusion region. After forming the opening and forming the opening, a boron-containing coating agent is applied and diffused over the organic silicon compound film and the opening, so that multiple heat treatment steps are not required, and it is simple and reliable. It has been found that a p-type selective emitter layer can be formed.

すなわち、ポリシラザン膜等の有機ケイ素化合物の膜を、ボロンドーパントに対して該ドーパントの拡散を抑制する拡散抑制マスクを適用した場合、膜厚に比例した濃度でボロンがシリコン基板中に拡散する現象が確認された。
太陽電池において、短波長領域での変換効率を向上させるためには、受光面における表面ドーパント濃度は低いほうがよいが、電極接触抵抗を低減するためには、ドーパント濃度を高くする必要がある。拡散層中のドーパント濃度が低下すると、オーミックコンタクトが得られないこととなる。
That is, when a diffusion suppression mask that suppresses the diffusion of the dopant to the boron dopant is applied to a film of an organosilicon compound such as a polysilazane film, there is a phenomenon that boron diffuses into the silicon substrate at a concentration proportional to the film thickness. confirmed.
In a solar cell, the surface dopant concentration on the light receiving surface should be low in order to improve the conversion efficiency in the short wavelength region, but in order to reduce the electrode contact resistance, it is necessary to increase the dopant concentration. When the dopant concentration in the diffusion layer decreases, ohmic contact cannot be obtained.

本発明においては、シリコン基板の受光面側の電極接続位置となる領域には有機ケイ素化合物の膜を形成せず、それ以外の領域に有機ケイ素化合物からなる膜を用いて拡散処理することで、電極接続位置となる領域に高濃度拡散層が形成されることから、電極接触抵抗を低減できる一方、前記有機ケイ素化合物からなる膜形成領域の表面ドーパント濃度は低くなり、表面パッシベーションが改善され、短波長領域での変換効率を向上させることができると共に、p型拡散層において高濃度拡散層と低濃度拡散層とを有するp型選択エミッタ層を簡便に形成することができる。   In the present invention, the region of the silicon substrate on the light receiving surface side where the electrode is connected does not form an organic silicon compound film, and other regions are diffused using a film made of an organic silicon compound, Since the high concentration diffusion layer is formed in the region serving as the electrode connection position, the electrode contact resistance can be reduced, while the surface dopant concentration in the film formation region made of the organosilicon compound is lowered, the surface passivation is improved, and the short The conversion efficiency in the wavelength region can be improved, and a p-type selective emitter layer having a high-concentration diffusion layer and a low-concentration diffusion layer in the p-type diffusion layer can be easily formed.

従って、本発明は、下記のp型選択エミッタ形成方法を提供する。
[1]シリコン基板の受光面側にポリシラザン膜又はポリシロキサン膜を形成する工程と、このポリシラザン膜又はポリシロキサン膜のうち高濃度拡散層を形成すべき領域を除去して当該領域に開口部を形成する工程と、次いで前記ポリシラザン膜又はポリシロキサン膜及び開口部を覆って第一のドーパント塗布剤を塗布し、更に800〜1100℃で熱処理して前記ポリシラザン膜又はポリシロキサン膜をシリコン含有無機薄膜とすると共に、該シリコン含有無機薄膜及び前記開口部から前記シリコン基板に第一のドーパントを拡散させ、前記開口部から第一のドーパントを拡散した部分に高濃度拡散層を、前記シリコン含有無機薄膜を通して第一のドーパントを拡散した部分に低濃度拡散層を形成する工程を含むことを特徴とするp型選択エミッタ形成方法。
[2]シリコン基板の受光面となる表面にポリシラザン溶液を塗布し、80〜200℃で加熱乾燥して前記ポリシラザン膜を形成する[1]記載の選択エミッタ形成方法。
[3]シリコン基板の受光面となる表面に、側鎖又は末端に反応性有機基を有する反応性ポリシロキサンを含有する組成物を塗布し、加熱硬化させて前記ポリシロキサン膜を形成する[1]記載の選択エミッタ形成方法。
]シリコン基板がn型である[1]〜[3]のいずれかに記載の選択エミッタ形成方法。
]有機ケイ素化合物の膜を5〜300nmの厚さで形成する[1]〜[]のいずれかに記載の選択エミッタ形成方法。
]第一のドーパントがボロンである[1]〜[]のいずれかに記載の選択エミッタ形成方法。
Accordingly, the present invention provides a p-type selective emitter formed how below.
[1] a step of forming a polysilazane film or polysiloxane film on the light-receiving surface side of the silicon substrate, an opening in the area to remove the region for forming a high concentration diffusion layer of the polysilazane film or polysiloxane film A step of forming, and then applying a first dopant coating agent so as to cover the polysilazane film or polysiloxane film and the opening, and further heat-treating at 800 to 1100 ° C. to make the polysilazane film or polysiloxane film a silicon-containing inorganic thin film with a to diffuse first dopant in the silicon substrate from the silicon-containing inorganic thin film and the opening, the high-concentration diffusion layer in a portion by diffusing the first dopant through the opening, the silicon-containing inorganic films A step of forming a low-concentration diffusion layer in a portion where the first dopant is diffused through the p-type selection Emitter formation method.
[2] The selective emitter forming method according to [1], wherein a polysilazane solution is applied to a surface to be a light receiving surface of a silicon substrate, and is heated and dried at 80 to 200 ° C. to form the polysilazane film.
[3] A composition containing a reactive polysiloxane having a reactive organic group at its side chain or terminal is applied to the surface to be the light-receiving surface of the silicon substrate, and heat-cured to form the polysiloxane film [1] ] The selective emitter formation method of description.
[ 4 ] The selective emitter forming method according to any one of [1] to [3], wherein the silicon substrate is n-type.
[ 5 ] The method for forming a selective emitter according to any one of [1] to [ 4 ], wherein a film of an organosilicon compound is formed with a thickness of 5 to 300 nm.
[ 6 ] The selective emitter formation method according to any one of [1] to [ 5 ], wherein the first dopant is boron.

本発明によれば、高濃度拡散層と低濃度拡散層とを有するp型選択エミッタ層を有する太陽電池を簡便に製造することができ、製造歩留まりを高レベルで維持しながら高性能の太陽電池を提供することができる。   According to the present invention, a solar cell having a p-type selective emitter layer having a high-concentration diffusion layer and a low-concentration diffusion layer can be easily manufactured, and a high-performance solar cell while maintaining a high manufacturing yield. Can be provided.

(A)〜(H)は、本発明の太陽電池の製造方法の一例についてその工程を順次説明する概略断面図である。(A)-(H) are schematic sectional drawings which demonstrate the process sequentially about an example of the manufacturing method of the solar cell of this invention.

本発明のp型選択エミッタ形成方法により形成されたp型選択エミッタ層を有する太陽電池は、図1(H)を参照すると、シリコン基板1と、前記シリコン基板1の受光面側に形成され、p型高濃度拡散層4aとこの高濃度拡散層4aよりもドーパント濃度が低い低濃度拡散層4bとを有するp型選択エミッタ層4と、前記p型選択エミッタ層の高濃度拡散層4aと電気的に接続する受光面電極7と、前記シリコン基板1の裏面側に形成されたn型拡散層5と、前記n型拡散層5と電気的に接続する裏面電極8とを備えた太陽電池であり、このp型選択エミッタ形成方法は、シリコン基板のp型拡散層となる側に有機ケイ素化合物からなる膜を形成し、このp型拡散層の電極接続位置となる領域に対応する有機ケイ素化合物の膜を部分的に除去し高濃度拡散領域となる領域に開口部を形成した後、前記有機ケイ素化合物からなる膜上にドーパントを塗布し、開口部と有機ケイ素化合物からなる膜を通して同時にシリコン基板中にドーパントを拡散させることで、p型選択エミッタ層を形成するものである。   Referring to FIG. 1 (H), a solar cell having a p-type selective emitter layer formed by the p-type selective emitter forming method of the present invention is formed on a silicon substrate 1 and a light receiving surface side of the silicon substrate 1, A p-type selective emitter layer 4 having a p-type high-concentration diffusion layer 4a and a low-concentration diffusion layer 4b having a dopant concentration lower than that of the high-concentration diffusion layer 4a, and the p-type selective emitter layer high-concentration diffusion layer 4a A solar cell comprising a light receiving surface electrode 7 to be electrically connected, an n-type diffusion layer 5 formed on the back side of the silicon substrate 1, and a back electrode 8 electrically connected to the n-type diffusion layer 5. In this p-type selective emitter forming method, a film made of an organosilicon compound is formed on the silicon substrate on the side to be the p-type diffusion layer, and the organosilicon compound corresponding to the region to be the electrode connection position of the p-type diffusion layer Partial removal of the membrane After forming an opening in a region to be a high concentration diffusion region, a dopant is applied on the film made of the organosilicon compound, and the dopant is simultaneously diffused into the silicon substrate through the film made of the opening and the organosilicon compound. Thus, a p-type selective emitter layer is formed.

以下、本発明のp型選択エミッタ形成方法を利用した太陽電池の製造方法を、図面を用いて説明するが、この説明により本発明が限定されるものではない。   Hereinafter, although the manufacturing method of the solar cell using the p-type selective emitter formation method of this invention is demonstrated using drawing, this invention is not limited by this description.

図1(A)〜(H)は、本発明の太陽電池の製造方法における一実施形態の製造工程を示す概略断面図である。以下、各工程について詳細に説明する。
(1)シリコン基板1はn型でもp型でもよいが、本発明の実施例1においてはn型基板を使用する。このシリコン単結晶基板はチョクラルスキー(CZ)法及びフロートゾーン(FZ)法のいずれの方法によって作製されていてもよい。シリコン基板1の比抵抗は、高性能の太陽電池を作る点から、0.1〜20Ω・cmが好ましく、0.5〜2.0Ω・cmがより好ましい。シリコン基板としては、リンドープn型単結晶シリコン基板が好ましい。リンドープのドーパント濃度は1×1015cm-3〜5×1016cm-3が好ましい[図1(A)]。
1A to 1H are schematic cross-sectional views showing a manufacturing process according to an embodiment of the method for manufacturing a solar cell of the present invention. Hereinafter, each step will be described in detail.
(1) The silicon substrate 1 may be n-type or p-type, but an n-type substrate is used in Example 1 of the present invention. This silicon single crystal substrate may be produced by any of the Czochralski (CZ) method and the float zone (FZ) method. The specific resistance of the silicon substrate 1 is preferably 0.1 to 20 Ω · cm, and more preferably 0.5 to 2.0 Ω · cm from the viewpoint of producing a high-performance solar cell. As the silicon substrate, a phosphorus-doped n-type single crystal silicon substrate is preferable. The phosphorus-doped dopant concentration is preferably 1 × 10 15 cm −3 to 5 × 10 16 cm −3 [FIG. 1 (A)].

(2)ダメージエッチング/テクスチャ形成
シリコン基板1を例えば水酸化ナトリウム水溶液に浸し、ダメージ層をエッチングで取り除く。この基板のダメージ除去は、水酸化カリウム等の強アルカリ水溶液を用いてもよく、フッ硝酸等の酸水溶液でも同様の目的を達成することが可能である。ダメージエッチングを行った基板1にランダムテクスチャを形成する。太陽電池は通常、表面に凹凸形状を形成するのが好ましい。その理由は、可視光域の反射率を低減させるために、できる限り2回以上の反射を受光面で行わせる必要があるためである。これら一つ一つの山のサイズは1〜20μm程度が好ましい。代表的な表面凹凸構造としては、V溝、U溝が挙げられる。これらは、研削機を利用して形成可能である。また、ランダムな凹凸構造を作るには、水酸化ナトリウムにイソプロピルアルコールを加えた水溶液に浸してウェットエッチングする方法や、他には、酸エッチングやリアクティブ・イオン・エッチング等を用いることができる。なお、図面では両面に形成したテクスチャ構造は微細なため省略する。
(2) Damage etching / texture formation The silicon substrate 1 is immersed in an aqueous sodium hydroxide solution, for example, and the damaged layer is removed by etching. For removing damage from the substrate, a strong alkaline aqueous solution such as potassium hydroxide may be used, and a similar purpose can be achieved with an acid aqueous solution such as hydrofluoric acid. A random texture is formed on the substrate 1 subjected to damage etching. In general, a solar cell preferably has an uneven shape on the surface. The reason is that in order to reduce the reflectance in the visible light region, it is necessary to cause the light receiving surface to perform reflection at least twice as much as possible. The size of each of these peaks is preferably about 1 to 20 μm. Typical surface uneven structures include V-grooves and U-grooves. These can be formed using a grinding machine. In order to create a random concavo-convex structure, a method of performing wet etching by immersing in an aqueous solution of sodium hydroxide and isopropyl alcohol, or acid etching, reactive ion etching, or the like can be used. In the drawing, the texture structure formed on both sides is fine and therefore omitted.

(3)有機ケイ素化合物膜形成
テクスチャ形成したシリコン基板の受光面となる表面に有機ケイ素化合物からなる膜を形成する[図1(B)]。有機ケイ素化合物からなる膜として、ポリシラザン膜又はポリシロキサン膜が挙げられる。膜の形成方法として、ポリシラザン膜の場合は、ポリシラザン溶液をシリコン基板の受光面となる表面に塗布し、加熱乾燥処理により溶媒を除去することで、自己架橋反応が進行し、ポリシラザン膜が形成される。ポリシラザン溶液の塗布方法としてはスピンコート法、スプレー法、ディップ法等、特に限定されないが、スピンコート法が簡便で好適である。
(3) Formation of organosilicon compound film A film made of an organosilicon compound is formed on the surface of the textured silicon substrate that serves as the light-receiving surface [FIG. 1 (B)]. Examples of the film made of an organosilicon compound include a polysilazane film and a polysiloxane film. As a method for forming the film, in the case of a polysilazane film, a polysilazane solution is applied to the surface to be the light-receiving surface of the silicon substrate, and the solvent is removed by heat drying treatment, so that a self-crosslinking reaction proceeds and a polysilazane film is formed. The The method for applying the polysilazane solution is not particularly limited, such as a spin coating method, a spray method, or a dip method, but the spin coating method is simple and suitable.

ポリシラザン溶液、即ちポリシラザン膜を形成するために用いる塗布組成物は、ポリシラザンと溶媒を含むものとする。
ポリシラザンとしては、下記一般式(1)
−(SiH2NH)n− (1)
で表されるパーヒドロポリシラザンが、転化後の膜中に残存する不純物が少ないことから好ましい。なお、パーヒドロポリシラザンは、−(SiH2NH)−を基本ユニットとし、その側鎖すべてが水素であり有機溶剤に可溶な無機ポリマーである。
The coating composition used for forming the polysilazane solution, that is, the polysilazane film, includes polysilazane and a solvent.
As polysilazane, the following general formula (1)
-(SiH 2 NH) n- (1)
The perhydropolysilazane represented by the formula (2) is preferred because there are few impurities remaining in the film after conversion. In addition, perhydropolysilazane is an inorganic polymer having — (SiH 2 NH) — as a basic unit, all of its side chains being hydrogen, and being soluble in an organic solvent.

また、溶媒としては、パーヒドロポリシラザンと混ぜて反応しない溶媒であればよく、トルエン、キシレン、ジブチルエーテル、ジエチルエーテル、THF(tetrahydrofuran)、PGME(propylene glycol methoxy ether)、PGMEA(propylene glycol ether monomethyl acetate)、ヘキサンのような芳香族溶媒、脂肪族溶媒、エーテル系溶媒を用いることができる。   The solvent may be any solvent that does not react with perhydropolysilazane. Toluene, xylene, dibutyl ether, diethyl ether, THF (tetrahydrofuran), PGME (propylene glycol ether ether), PGMEA (propylene glycol ether ether) ), Aromatic solvents such as hexane, aliphatic solvents, and ether solvents.

溶媒中のポリシラザンの濃度は1〜30質量%が好ましく、3〜20質量%がより好ましい。1質量%未満では塗布後の膜厚が薄くなり、p型拡散層における拡散濃度差が得られなくなるおそれがあり、30質量%を超えると溶液の安定性が低下する場合がある。   The concentration of polysilazane in the solvent is preferably 1 to 30% by mass, and more preferably 3 to 20% by mass. If it is less than 1% by mass, the film thickness after application becomes thin, and there is a possibility that a difference in diffusion concentration in the p-type diffusion layer may not be obtained. If it exceeds 30% by mass, the stability of the solution may be lowered.

ポリシラザン膜を形成するための乾燥温度としては、使用している溶媒の沸点以上であれば問題ないが、80〜200℃の範囲で行うことが望ましい。加熱方法は、特に制限されないが、ホットプレートで加熱する方法、電気炉を用いる方法等が挙げられ、コスト上、作業上の簡便さからホットプレートを用いる方法が好ましい。ポリシラザン膜の膜厚は、5〜300nmが好ましく、より好ましくは50〜100nmである。膜厚が薄すぎると、p型拡散層における拡散濃度差が得られなくなり、厚すぎてもボロンがポリシラザン膜を通して拡散できなくなるおそれがある。   The drying temperature for forming the polysilazane film is not a problem as long as it is equal to or higher than the boiling point of the solvent being used, but it is preferable to perform the drying temperature in the range of 80 to 200 ° C. The heating method is not particularly limited, and examples thereof include a method of heating with a hot plate and a method of using an electric furnace, and the method of using a hot plate is preferable from the viewpoint of cost and convenience of work. The thickness of the polysilazane film is preferably 5 to 300 nm, more preferably 50 to 100 nm. If the film thickness is too thin, a difference in diffusion concentration in the p-type diffusion layer cannot be obtained, and even if it is too thick, boron may not be able to diffuse through the polysilazane film.

なお、ポリシラザン膜は、この後に行われるp型エミッタ層形成時の熱処理によって焼成され転化してシリコン含有無機薄膜となり、拡散抑制マスクとしての機能を発揮する。   Note that the polysilazane film is baked and converted by heat treatment at the time of forming the p-type emitter layer to be converted into a silicon-containing inorganic thin film, and functions as a diffusion suppression mask.

ポリシロキサン膜の形成方法としては、ジメチルポリシロキサン、メチルフェニルポリシロキサン、メチルハイドロジェンポリシロキサン等のポリシロキサンの側鎖又は末端をビニル基、アミノ基、エポキシ基、カルビノール基、シラノール基、メタクリル基等の反応性有機基で変性した反応性ポリシロキサンを用い、ポリシラザン膜と同様な処理によりポリシロキサン膜を形成する。この場合、必要によってはこれらポリシロキサンの種類に応じた適宜な公知の架橋剤を使用い、架橋ポリシロキサン膜として形成し得る。   The polysiloxane film can be formed by using a vinyl group, amino group, epoxy group, carbinol group, silanol group, methacryl group on the side chain or terminal of a polysiloxane such as dimethylpolysiloxane, methylphenylpolysiloxane, or methylhydrogenpolysiloxane. Using a reactive polysiloxane modified with a reactive organic group such as a group, a polysiloxane film is formed by the same treatment as the polysilazane film. In this case, if necessary, an appropriate known cross-linking agent corresponding to the type of the polysiloxane may be used to form a cross-linked polysiloxane film.

この場合、ポリシロキサンとしては、直鎖状、分岐状、環状のいずれのものでもよく、具体的には下記式(2)のものが好適に用いられる。
R’R2SiO−(R2SiO)−SiR2R’ (2)
ここで、上記式において、Rは炭素数1〜3のアルキル基であり、R’はビニル基、アミノ基、エポキシ基、カルビノール基、シラノール基、メタクリル基等の反応性有機基を示す。
In this case, the polysiloxane may be linear, branched or cyclic, and specifically, the one represented by the following formula (2) is preferably used.
R′R 2 SiO— (R 2 SiO) —SiR 2 R ′ (2)
Here, in said formula, R is a C1-C3 alkyl group, R 'shows reactive organic groups, such as a vinyl group, an amino group, an epoxy group, a carbinol group, a silanol group, and a methacryl group.

ポリシロキサン膜の膜厚は、5〜300nmが好ましく、より好ましくは50〜100nmである。膜厚が薄すぎると、p型拡散層における拡散濃度差が得られなくなり、厚すぎてもボロンがポリシロキサン膜を通して拡散できなくなるおそれがある。   The thickness of the polysiloxane film is preferably 5 to 300 nm, more preferably 50 to 100 nm. If the film thickness is too thin, a difference in diffusion concentration in the p-type diffusion layer cannot be obtained, and if it is too thick, boron may not be able to diffuse through the polysiloxane film.

なお、ポリシロキサン膜は、この後に行われるp型エミッタ層形成時の熱処理によって焼成されSiO2からなるシリコン含有無機薄膜となり、拡散抑制マスクとしての機能を発揮する。The polysiloxane film is baked by a heat treatment in the subsequent p-type emitter layer formation to be a silicon-containing inorganic thin film made of SiO 2 and functions as a diffusion suppression mask.

(4)有機ケイ素化合物膜除去
前記有機ケイ素化合物の膜のうち、p型拡散層の電極接続位置となる領域の膜を部分的に除去し、高濃度拡散領域となるべき領域に開口部2aを形成する[図1(C)]。有機ケイ素化合物からなる膜を除去する方法としては、特に限定はなく既知の方法として、エッチングペーストによる除去や、レーザーアブレーションによる除去、除去しない領域を耐エッチングマスクで覆うマスキングエッチングによる除去方法などが挙げられる。中でもレーザーアブレーションによる除去が簡便で好適である。
(4) Removal of organosilicon compound film Part of the organosilicon compound film is partially removed from the region to be the electrode connection position of the p-type diffusion layer, and the opening 2a is formed in the region to be the high concentration diffusion region. Form [FIG. 1 (C)]. The method for removing the film made of the organosilicon compound is not particularly limited, and examples of known methods include removal by etching paste, removal by laser ablation, and removal by masking etching that covers areas not to be removed with an etching resistant mask. It is done. Of these, removal by laser ablation is simple and suitable.

(5)p型選択エミッタ層形成
シリコン基板1の受光面側に形成されている有機ケイ素化合物の膜上及び前記開口部を覆ってボロンドーパントを含む塗布剤3を塗布する[図1(D)]。その後熱処理を行うことでp型選択エミッタ層4を形成する[図1(E)]。このとき、有機ケイ素化合物の膜はシリコン含有無機薄膜となり、拡散抑制マスクとしての機能を発揮する。即ち、シリコン含有無機薄膜の存在しない領域(開口部領域)ではドーパントがそのまま拡散して高濃度拡散層4aが形成され、シリコン含有無機薄膜の存在する領域ではドーパントの拡散が開口部領域よりも抑制されて低濃度拡散層4bが形成される。その後、このシリコン含有無機薄膜はガラス成分と共にエッチング除去される。
(5) Formation of p-type selective emitter layer A coating agent 3 containing a boron dopant is applied on the organic silicon compound film formed on the light-receiving surface side of the silicon substrate 1 and covering the opening [FIG. ]. Thereafter, heat treatment is performed to form the p-type selective emitter layer 4 [FIG. 1E]. At this time, the film of the organosilicon compound becomes a silicon-containing inorganic thin film and exhibits a function as a diffusion suppression mask. That is, in the region where the silicon-containing inorganic thin film does not exist (opening region), the dopant is diffused as it is to form the high-concentration diffusion layer 4a, and in the region where the silicon-containing inorganic thin film exists, the diffusion of the dopant is suppressed more than in the opening region. Thus, the low concentration diffusion layer 4b is formed. Thereafter, the silicon-containing inorganic thin film is etched away together with the glass component.

なお、熱処理温度は800〜1,100℃、特に900〜1,000℃が好ましい。また、熱処理時間は通常20〜30分である。ドーパントはボロンが好ましく、また、p型選択エミッタ層4における高濃度拡散層4aの表面ドーパント濃度は、1×1018cm-3〜5×1020cm-3が好ましく、更には5×1018cm-3〜1×1020cm-3がより好ましい。一方、低濃度拡散層4bの表面ドーパント濃度は、1×1017cm-3〜5×1019cm-3が好ましく、更には5×1017cm-3〜1×1019cm-3がより好ましい。The heat treatment temperature is preferably 800 to 1,100 ° C, particularly 900 to 1,000 ° C. The heat treatment time is usually 20 to 30 minutes. The dopant is preferably boron, and the surface dopant concentration of the high-concentration diffusion layer 4a in the p-type selective emitter layer 4 is preferably 1 × 10 18 cm −3 to 5 × 10 20 cm −3 and more preferably 5 × 10 18. More preferably, cm −3 to 1 × 10 20 cm −3 . On the other hand, the surface dopant concentration of the low-concentration diffusion layer 4b is preferably 1 × 10 17 cm −3 to 5 × 10 19 cm −3, and more preferably 5 × 10 17 cm −3 to 1 × 10 19 cm −3. preferable.

(6)n型拡散層形成
シリコン基板1の裏面に同様な処理を行うことでn型拡散層5を裏面に形成する[図1(F)]。ドーパントはリンが好ましい。n型拡散層5の表面ドーパント濃度は、1×1018cm-3〜5×1020cm-3が好ましく、5×1018cm-3〜1×1020cm-3がより好ましい。
(6) Formation of n-type diffusion layer The same process is performed on the back surface of the silicon substrate 1 to form the n-type diffusion layer 5 on the back surface [FIG. 1 (F)]. The dopant is preferably phosphorus. The surface dopant concentration of the n-type diffusion layer 5 is preferably 1 × 10 18 cm −3 to 5 × 10 20 cm −3, and more preferably 5 × 10 18 cm −3 to 1 × 10 20 cm −3 .

(7)pn接合分離
プラズマエッチャーを用い、pn接合分離を行う。このプロセスではプラズマやラジカルが受光面や裏面に侵入しないよう、サンプルをスタックし、その状態で端面を数ミクロン削る。接合分離後、基板に付いたガラス成分、シリコン粉等はガラスエッチング等により洗浄する。
(7) Pn junction isolation Pn junction isolation is performed using a plasma etcher. In this process, the sample is stacked so that plasma and radicals do not enter the light-receiving surface and the back surface, and the end surface is cut by several microns in that state. After bonding and separation, glass components, silicon powder, and the like attached to the substrate are washed by glass etching or the like.

(8)反射防止膜形成
引き続き、太陽光の光を有効的にシリコン基板内に取り込むために、シリコン基板表面及び裏面の両方[図1(G)]に、反射防止膜6を形成する。反射防止膜としては窒化ケイ素膜が好ましい。この窒化ケイ素膜は、シリコン基板表面及び内部のパッシベーション膜としても機能する。この膜厚は70〜100nmが好ましい。他の反射防止膜として二酸化チタン膜、酸化亜鉛膜、酸化スズ膜、酸化タンタル膜、酸化ニオブ膜、フッ化マグネシウム膜、酸化アルミニウム膜等があり、代替が可能である。また、形成方法もプラズマCVD法、コーティング法、真空蒸着法等があるが、経済的な観点から、上記、窒化ケイ素膜をプラズマCVD法によって形成するのが好適である。
(8) Antireflection film formation Subsequently, in order to effectively take sunlight light into the silicon substrate, the antireflection film 6 is formed on both the front surface and the back surface of the silicon substrate [FIG. 1G]. A silicon nitride film is preferable as the antireflection film. This silicon nitride film also functions as a passivation film on the silicon substrate surface and inside. This film thickness is preferably 70 to 100 nm. Other antireflection films include a titanium dioxide film, a zinc oxide film, a tin oxide film, a tantalum oxide film, a niobium oxide film, a magnesium fluoride film, and an aluminum oxide film, which can be substituted. The formation method includes a plasma CVD method, a coating method, a vacuum deposition method, and the like. From the economical viewpoint, it is preferable to form the silicon nitride film by the plasma CVD method.

(9)電極形成
スクリーン印刷装置等を用い、受光面側及び裏面側に、例えば銀からなるペーストを、スクリーン印刷装置を用いてp型高濃度拡散層4a及びn型拡散層5上に印刷し、櫛形電極パターン状に塗布して乾燥させる。最後に、焼成炉において、500〜900℃で1〜30分間焼成を行い、前記p型高濃度拡散層4a及びn型拡散層5と電気的に接続するフィンガー電極7、裏面電極8、及びバスバー電極9を形成する[図1(H)]。
(9) Electrode formation Using a screen printing device or the like, a paste made of, for example, silver is printed on the p-type high concentration diffusion layer 4a and the n-type diffusion layer 5 using the screen printing device on the light receiving surface side and the back surface side. Then, it is applied to a comb-shaped electrode pattern and dried. Finally, in the firing furnace, firing is performed at 500 to 900 ° C. for 1 to 30 minutes, and the finger electrode 7, the back electrode 8, and the bus bar are electrically connected to the p-type high concentration diffusion layer 4 a and the n-type diffusion layer 5. The electrode 9 is formed [FIG. 1 (H)].

なお、図1(H)ではバスバー電極9が拡散層4,5と接続されていないように示されているが、焼成によりファイヤースルーされ、実際は拡散層と接続されている。   In FIG. 1H, the bus bar electrode 9 is shown not to be connected to the diffusion layers 4 and 5, but is fired through by firing and is actually connected to the diffusion layer.

以下、実施例及び比較例を示し、本発明を具体的に説明するが、本発明は下記の実施例に制限されるものではない。   EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated concretely, this invention is not restrict | limited to the following Example.

[実施例1]
結晶面方位(100)、15.65cm角200μm厚、アズスライス比抵抗2Ω・cm(ドーパント濃度7.2×1015cm-3)リンドープn型単結晶シリコン基板を、水酸化ナトリウム水溶液に浸してダメージ層をエッチングで取り除き、水酸化カリウム水溶液にイソプロピルアルコールを加えた水溶液に浸してアルカリエッチングすることでテクスチャ形成を行った。得られたシリコン基板1の表面に、ポリシラザン溶液を塗布し150℃のホットプレート上で乾燥させ、厚さ80nmのポリシラザン膜2を形成した。
なお、ポリシラザンとしては、AZ製 ANN120−20 パーヒドロポリシラザン20%ジブチルエーテル溶液を用いた。
その後、レーザーにより、受光面電極直下となる領域のポリシラザン膜を除去した後、ボロンドーパントを含む塗布剤をポリシラザン膜上に塗布した後に、950℃,30分間熱処理を行い、p型選択エミッタ層4を形成した。
引き続き、リンドーパントを含む塗布剤をシリコン基板1の裏面に塗布した後に、900℃,30分間熱処理を行い、n型拡散層5を裏面に形成した。熱処理後、基板に付いたガラス成分は高濃度フッ酸溶液等により除去後、洗浄した。
次に、プラズマエッチャーを用い、pn接合分離を行った。プラズマやラジカルが受光面や裏面に侵入しないよう、対象をスタックした状態で端面を数ミクロン削った。基板に付いたガラス成分を高濃度フッ酸溶液等により除去後、洗浄した。
更に、平行平板型CVD装置を用い、成膜用ガスとしてモノシランとアンモニアと水素の混合ガスを使用して、受光面側p型選択エミッタ層4、及び裏面n型拡散層5上に窒化ケイ素からなる反射防止膜6を積層した。この膜厚は70nmであった。
引き続き、受光面側の高濃度拡散層4a及び裏面側にそれぞれ銀ペーストを電極印刷し、乾燥後750℃で3分間焼成を行い、表面電極7、裏面電極8及びバスバー電極9を形成した。
[Example 1]
Crystal plane orientation (100), 15.65 cm square 200 μm thickness, as-slice specific resistance 2 Ω · cm (dopant concentration 7.2 × 10 15 cm −3 ) Phosphorus-doped n-type single crystal silicon substrate is immersed in an aqueous sodium hydroxide solution The damaged layer was removed by etching, and texture formation was performed by soaking in an aqueous solution obtained by adding isopropyl alcohol to an aqueous potassium hydroxide solution and performing alkali etching. A polysilazane solution was applied to the surface of the obtained silicon substrate 1 and dried on a hot plate at 150 ° C. to form a polysilazane film 2 having a thickness of 80 nm.
In addition, as polysilazane, the AZ120-20 perhydropolysilazane 20% dibutyl ether solution made from AZ was used.
Thereafter, the polysilazane film in the region immediately below the light-receiving surface electrode is removed with a laser, and then a coating agent containing a boron dopant is applied on the polysilazane film, followed by heat treatment at 950 ° C. for 30 minutes, and the p-type selective emitter layer 4 Formed.
Subsequently, after a coating agent containing a phosphorus dopant was applied to the back surface of the silicon substrate 1, heat treatment was performed at 900 ° C. for 30 minutes to form the n-type diffusion layer 5 on the back surface. After the heat treatment, the glass component attached to the substrate was removed by high concentration hydrofluoric acid solution and then washed.
Next, pn junction isolation was performed using a plasma etcher. In order to prevent plasma and radicals from entering the light-receiving surface and back surface, the end face was cut several microns with the target stacked. The glass component attached to the substrate was removed with a high-concentration hydrofluoric acid solution and then washed.
Further, using a parallel plate type CVD apparatus and using a mixed gas of monosilane, ammonia and hydrogen as a film forming gas, silicon nitride is formed on the light-receiving surface side p-type selective emitter layer 4 and the back surface n-type diffusion layer 5 from silicon nitride. An antireflection film 6 was laminated. This film thickness was 70 nm.
Subsequently, silver paste was electrode-printed on the high-concentration diffusion layer 4a on the light-receiving surface side and the back surface side, respectively, dried, and then baked at 750 ° C. for 3 minutes to form the front electrode 7, the back electrode 8, and the bus bar electrode 9.

[実施例2]
ポリシラザン溶液に代わり、末端ビニル基で変性したポリシロキサンと、下記の架橋剤からなる混合溶液をシリコン基板上に塗布し、加熱硬化させ、ポリシロキサン膜を形成した以外は、実施例1と同様な方法にて太陽電池を作製した。
この場合、ポリシロキサンとしては下記式
CH2=CHSi(CH32O−(Si(CH32O)−Si(CH32CH=CH2
のものを使用し、架橋剤としては下記式
CH3Si(OH)3
のものを使用した。
[Example 2]
Instead of the polysilazane solution, a mixed solution consisting of a polysiloxane modified with a terminal vinyl group and the following crosslinking agent was applied on a silicon substrate and cured by heating to form a polysiloxane film. A solar cell was produced by the method.
In this case, the polysiloxane is represented by the following formula: CH 2 ═CHSi (CH 3 ) 2 O— (Si (CH 3 ) 2 O) —Si (CH 3 ) 2 CH═CH 2
And the following formula CH 3 Si (OH) 3
I used one.

[比較例1]
シリコン基板の受光面側にポリシラザン膜の形成を除いた以外は、実施例1と同様な方法にて作製した。
即ち、p型拡散層の形成において、ボロンドーパントを含む塗布剤をシリコン基板1の受光面に直接塗布し、p型拡散層を形成したものである。
[Comparative Example 1]
It was produced by the same method as in Example 1 except that the polysilazane film was not formed on the light receiving surface side of the silicon substrate.
That is, in the formation of the p-type diffusion layer, a p-type diffusion layer is formed by directly applying a coating agent containing a boron dopant to the light receiving surface of the silicon substrate 1.

実施例及び比較例で得られた太陽電池を、25℃の雰囲気の中、ソーラーシュミレーター(光強度:1kW/m2,スペクトル:AM1.5グローバル)の下で電流電圧特性を測定した。結果を表1に示す。なお、表中の数字は実施例及び比較例で試作したセル10枚の平均値である。The current-voltage characteristics of the solar cells obtained in Examples and Comparative Examples were measured in a 25 ° C. atmosphere under a solar simulator (light intensity: 1 kW / m 2 , spectrum: AM1.5 global). The results are shown in Table 1. In addition, the number in a table | surface is an average value of ten cells made as an experiment in an Example and a comparative example.

Figure 0006115634
Figure 0006115634

上記のように、実施例による太陽電池は、シリコン基板のp型拡散層となる側に有機ケイ素化合物膜を形成し、このp型拡散層の電極接続位置となる領域の有機ケイ素化合物膜を部分的に除去し高濃度拡散領域となる領域に開口部を形成した後、前記有機ケイ素化合物膜上にドーパントを塗布し、開口部と有機ケイ素化合物膜を通して同時にシリコン基板中にドーパントを拡散させることで、p型選択エミッタ層を形成することにより、p層パッシベーションが改善され、開放電圧と短絡電流が向上した結果となった。本発明による製造方法によれば少ない工数でp型選択エミッタを形成することが可能である。   As described above, in the solar cell according to the example, the organosilicon compound film is formed on the side that becomes the p-type diffusion layer of the silicon substrate, and the organosilicon compound film in the region serving as the electrode connection position of the p-type diffusion layer is partially formed. After removing the target and forming an opening in a region that becomes a high-concentration diffusion region, a dopant is applied on the organosilicon compound film, and the dopant is simultaneously diffused into the silicon substrate through the opening and the organosilicon compound film. By forming the p-type selective emitter layer, the p-layer passivation was improved, and the open circuit voltage and the short-circuit current were improved. According to the manufacturing method of the present invention, it is possible to form a p-type selective emitter with a small number of steps.

1 シリコン基板
2 ポリシラザン膜
2a 開口部
3 ボロン塗布剤
4 p型選択エミッタ層
4a p型高濃度拡散層
4b p型低濃度拡散層
5 n型拡散層
6 反射防止膜
7 受光面電極(フィンガー電極)
8 裏面電極
9 バスバー電極
DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Polysilazane film 2a Opening part 3 Boron coating agent 4 p-type selective emitter layer 4a p-type high concentration diffusion layer 4b p-type low concentration diffusion layer 5 n-type diffusion layer 6 Antireflection film 7 Light-receiving surface electrode (finger electrode)
8 Back electrode 9 Bus bar electrode

Claims (6)

シリコン基板の受光面側にポリシラザン膜又はポリシロキサン膜を形成する工程と、このポリシラザン膜又はポリシロキサン膜のうち高濃度拡散層を形成すべき領域を除去して当該領域に開口部を形成する工程と、次いで前記ポリシラザン膜又はポリシロキサン膜及び開口部を覆って第一のドーパント塗布剤を塗布し、更に800〜1100℃で熱処理して前記ポリシラザン膜又はポリシロキサン膜をシリコン含有無機薄膜とすると共に、該シリコン含有無機薄膜及び前記開口部から前記シリコン基板に第一のドーパントを拡散させ、前記開口部から第一のドーパントを拡散した部分に高濃度拡散層を、前記シリコン含有無機薄膜を通して第一のドーパントを拡散した部分に低濃度拡散層を形成する工程を含むことを特徴とするp型選択エミッタ形成方法。 A step of forming a polysilazane film or a polysiloxane film on the light receiving surface side of the silicon substrate, and a step of removing an area in which the high concentration diffusion layer is to be formed from the polysilazane film or the polysiloxane film and forming an opening in the area. Then, a first dopant coating agent is applied to cover the polysilazane film or polysiloxane film and the opening, and further heat-treated at 800 to 1100 ° C. to make the polysilazane film or polysiloxane film a silicon-containing inorganic thin film. to diffuse the first dopant into the silicon substrate from the silicon-containing inorganic thin film and the opening, the high-concentration diffusion layer in a portion by diffusing the first dopant through the opening, the first through the silicon-containing inorganic films And a p-type selective emitter comprising a step of forming a low-concentration diffusion layer in the portion where the dopant is diffused Data forming method. シリコン基板の受光面となる表面にポリシラザン溶液を塗布し、80〜200℃で加熱乾燥して前記ポリシラザン膜を形成する請求項1記載の選択エミッタ形成方法。2. The method of forming a selective emitter according to claim 1, wherein a polysilazane solution is applied to a surface to be a light-receiving surface of a silicon substrate, and the polysilazane film is formed by heating and drying at 80 to 200 ° C. シリコン基板の受光面となる表面に、側鎖又は末端に反応性有機基を有する反応性ポリシロキサンを含有する組成物を塗布し、加熱硬化させて前記ポリシロキサン膜を形成する請求項1記載の選択エミッタ形成方法。The composition comprising a reactive polysiloxane having a reactive organic group at a side chain or a terminal is applied to a surface to be a light-receiving surface of a silicon substrate, and is heated and cured to form the polysiloxane film. Selective emitter formation method. シリコン基板がn型である請求項1〜3のいずれか1項記載の選択エミッタ形成方法。 4. The method of forming a selective emitter according to claim 1, wherein the silicon substrate is n-type. ポリシラザン膜又はポリシロキサン膜を5〜300nmの厚さで形成する請求項1〜のいずれか1項記載の選択エミッタ形成方法。 The selective emitter formation method according to any one of claims 1 to 4 , wherein the polysilazane film or the polysiloxane film is formed with a thickness of 5 to 300 nm. 第一のドーパントがボロンである請求項1〜のいずれか1項記載の選択エミッタ形成方法。 Selective emitter formation method of any one of claims 1 to 5 the first dopant is boron.
JP2015521326A 2013-06-06 2014-03-31 Method for forming p-type selective emitter Active JP6115634B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013119755 2013-06-06
JP2013119755 2013-06-06
PCT/JP2014/059448 WO2014196253A1 (en) 2013-06-06 2014-03-31 METHOD FOR FORMING p-TYPE SELECTIVE EMITTER AND SOLAR CELL

Publications (2)

Publication Number Publication Date
JPWO2014196253A1 JPWO2014196253A1 (en) 2017-02-23
JP6115634B2 true JP6115634B2 (en) 2017-04-19

Family

ID=52007908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015521326A Active JP6115634B2 (en) 2013-06-06 2014-03-31 Method for forming p-type selective emitter

Country Status (3)

Country Link
JP (1) JP6115634B2 (en)
TW (1) TWI619259B (en)
WO (1) WO2014196253A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6661891B2 (en) * 2015-05-07 2020-03-11 日立化成株式会社 Method of manufacturing solar cell element and solar cell element
JP6842841B2 (en) * 2016-04-28 2021-03-17 帝人株式会社 Ion implantation mask forming method and semiconductor device manufacturing method
JP7230743B2 (en) * 2019-08-27 2023-03-01 株式会社デンソー Semiconductor device manufacturing method
CN111370539A (en) * 2020-03-19 2020-07-03 泰州中来光电科技有限公司 Preparation method of solar cell with selective emitter
JP2021158266A (en) * 2020-03-27 2021-10-07 東京応化工業株式会社 Laminate, manufacturing method of laminate, and manufacturing method of semiconductor substrate

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7846823B2 (en) * 2005-08-12 2010-12-07 Sharp Kabushiki Kaisha Masking paste, method of manufacturing same, and method of manufacturing solar cell using masking paste
JP5283824B2 (en) * 2006-01-18 2013-09-04 東京応化工業株式会社 Film-forming composition
US20110298100A1 (en) * 2009-02-05 2011-12-08 Kyotaro Nakamura Semiconductor device producing method and semiconductor device
JP2010205965A (en) * 2009-03-04 2010-09-16 Sharp Corp Method for manufacturing semiconductor device
JP2013540090A (en) * 2010-09-16 2013-10-31 スペックマット インコーポレイテッド Methods, processes and fabrication techniques for high efficiency and low cost crystalline silicon solar cells
JP2013026343A (en) * 2011-07-19 2013-02-04 Hitachi Chem Co Ltd Manufacturing method of p-type diffusion layer, manufacturing method of solar cell element, and solar cell element
JP2014103232A (en) * 2012-11-20 2014-06-05 Toray Ind Inc Non-photosensitive composition and method of producing impurity diffusion layer using the same

Also Published As

Publication number Publication date
TW201511302A (en) 2015-03-16
TWI619259B (en) 2018-03-21
WO2014196253A1 (en) 2014-12-11
JPWO2014196253A1 (en) 2017-02-23

Similar Documents

Publication Publication Date Title
JP5236914B2 (en) Manufacturing method of solar cell
JP5215330B2 (en) Manufacturing method of back electrode type solar cell, back electrode type solar cell and back electrode type solar cell module
JP5414298B2 (en) Manufacturing method of solar cell
JP6115634B2 (en) Method for forming p-type selective emitter
WO2006117980A1 (en) Solar cell manufacturing method, solar cell, and semiconductor device manufacturing method
CN103026494A (en) Silicon solar cell having boron diffusion layer and method for manufacturing same
JP2010524254A (en) Solar cell oxynitride passivation
KR20160134814A (en) Conductive Polymer/Si Interfaces At The Backside of Solar Cells
WO2011145731A1 (en) Solar cell element and method for producing the same, and solar cell module
CN110546768B (en) Solar cell element and method for manufacturing solar cell element
WO2015182503A1 (en) Solar cell element, method for manufacturing same and solar cell module
JP2013165160A (en) Method for manufacturing solar cell, and solar cell
US9685581B2 (en) Manufacturing method of solar cell
US9123840B2 (en) Solar cell element manufacturing method, solar cell element, and solar cell module
JP5477220B2 (en) Solar cell and manufacturing method thereof
WO2014092649A1 (en) A method of manufacturing a photovoltaic cell
JP6203990B1 (en) Solar cell element
CN107851672B (en) Photoelectric conversion element
JP5545277B2 (en) Solar cell and manufacturing method thereof
CN103904168B (en) The manufacture method of solar battery cell
JP5516611B2 (en) Solar cell manufacturing method and solar cell
JP5494511B2 (en) Manufacturing method of solar cell
JP6076814B2 (en) Manufacturing method of solar cell
JP5994895B2 (en) Manufacturing method of solar cell
KR101627028B1 (en) The method for preparing the bifacial solar cell

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20161102

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170221

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20170306

R150 Certificate of patent or registration of utility model

Ref document number: 6115634

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150