JP6100501B2 - Ceramic circuit board and manufacturing method - Google Patents

Ceramic circuit board and manufacturing method Download PDF

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JP6100501B2
JP6100501B2 JP2012240634A JP2012240634A JP6100501B2 JP 6100501 B2 JP6100501 B2 JP 6100501B2 JP 2012240634 A JP2012240634 A JP 2012240634A JP 2012240634 A JP2012240634 A JP 2012240634A JP 6100501 B2 JP6100501 B2 JP 6100501B2
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circuit board
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brazing material
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後藤 猛
猛 後藤
高範 阿津坂
高範 阿津坂
敬治 大塚
敬治 大塚
周平 森田
周平 森田
福田 誠
誠 福田
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Denka Co Ltd
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Denki Kagaku Kogyo KK
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本発明は半導体素子を搭載し、微細なクラックを生じることなく超音波接合により銅電極を直接接合できるセラミック回路基板とその製造方法に関する。 The present invention relates to a ceramic circuit board on which a semiconductor element is mounted and a copper electrode can be directly bonded by ultrasonic bonding without generating fine cracks, and a manufacturing method thereof.

近年、ロボットやモーター等の産業機器の高性能化に伴う、大電力・高能率インバーターであるパワーモジュールの変遷が進んでおり、セラミック回路基板に搭載される複数の半導体素子から発生する熱の増大に加え、高電流密度化により通電時のアルミワイヤやはんだ等、導電部材の電気抵抗により発生する熱も加わるためにモジュールを構成する部材の耐高熱材料が求められており、その解決手段の一つとして従来セラミック回路基板にはんだ接続された銅電極を超音波により直接回路基板に接合する手法が採用されつつある。銅電極の超音波接合は、銅電極をセラミック基板に対し垂直方向に加重を掛けながら、水平方向に超音波振動を付与することにより回路基板の銅板と銅電極を一体化する手法であるが、このとき、セラミック基板と金属回路の界面には強い引張応力が付与されるため、場合によってはセラミック基板の表面に軽微なクラックを生じ、モジュールの信頼性を損なってしまうという課題があった。 In recent years, power modules, which are high-power and high-efficiency inverters, are undergoing a transition due to higher performance of industrial equipment such as robots and motors, and heat generated from multiple semiconductor elements mounted on a ceramic circuit board is increasing. In addition, since the heat generated by the electrical resistance of the conductive member such as aluminum wire and solder during energization is also applied due to the high current density, a high heat resistant material for the members constituting the module is required. For example, a technique of directly joining a copper electrode soldered to a ceramic circuit board to the circuit board by ultrasonic waves is being adopted. The ultrasonic bonding of the copper electrode is a method of integrating the copper plate of the circuit board and the copper electrode by applying ultrasonic vibration in the horizontal direction while applying a weight in the vertical direction to the ceramic substrate. At this time, since a strong tensile stress is applied to the interface between the ceramic substrate and the metal circuit, there is a problem that a slight crack is generated on the surface of the ceramic substrate and the reliability of the module is impaired.

従来、上記セラミック回路基板の問題点を解消するため、電極を接合する回路基板の該当箇所にスリットを形成する(特許文献1)、銅厚を厚くする(特許文献2)等の提案がなされ、耐クラック性は幾分高められているものの、製造するにあたり特殊な設定が必要となる等、量産性や製造コストに十分な配慮がなされたものとはいえなかった。 Conventionally, in order to solve the problems of the ceramic circuit board, proposals have been made such as forming slits in the corresponding portions of the circuit board to which the electrodes are joined (Patent Document 1), increasing the copper thickness (Patent Document 2), etc. Although the crack resistance was somewhat improved, it could not be said that sufficient consideration was given to mass production and production costs, such as special settings required for production.

特開2010−010537号公報JP 2010-010537 A 特開2003−198077号公報JP 2003-198077 A

本発明は半導体素子を搭載し、超音波接合により銅電極を直接接合しても、微細なクラックを生じることのないセラミック回路基板とその製造方法を提供することを目的とするものである。 It is an object of the present invention to provide a ceramic circuit board on which a semiconductor element is mounted and a copper electrode is directly bonded by ultrasonic bonding without causing fine cracks and a method for manufacturing the same.

本発明のセラミック回路基板にあっては、セラミック基板の一方の面に銅回路、他方の面に銅放熱板が、活性金属としてTiを含有するろう材により接合されてなるセラミック回路基板において、セラミック基板の鏡面光沢度が5.0以上、セラミック回路基板の接合ボイドが10%以下であって、セラミック回路基板のろう材層がAgを含有する合金中にCuを含有する合金が分散した構造を有し、その厚みが11〜24μmであり、Ti化合物の厚みが0.4〜0.6μmで、その占有面積が12〜85%であることを特徴とするものである。 In the ceramic circuit board of the present invention, a ceramic circuit board in which a copper circuit is bonded to one surface of the ceramic substrate and a copper heat sink is bonded to the other surface by a brazing material containing Ti as an active metal. The substrate has a specular gloss of 5.0 or more, the bonding void of the ceramic circuit board is 10% or less, and the brazing material layer of the ceramic circuit board has a structure in which an alloy containing Cu is dispersed in an alloy containing Ag. And the thickness is 11 to 24 μm, the thickness of the Ti compound is 0.4 to 0.6 μm, and the occupied area is 12 to 85%.

さらに本発明にあっては、セラミック基板が基板表面の鏡面光沢度5.0以上である窒化アルミニウム基板または窒化けい素基板であり、使用するろう材金属成分の酸素量が0.15質量%以下(0を含まず)であることを特徴とするセラミック回路基板の製造方法である。 Furthermore, in the present invention, the ceramic substrate is an aluminum nitride substrate or a silicon nitride substrate having a specular gloss of 5.0 or more on the substrate surface, and the amount of oxygen in the brazing filler metal component used is 0.15 mass% or less. (0 is not included) A method for producing a ceramic circuit board.

本発明によれば、セラミック回路基板に銅電極を超音波接合にて接合する際、セラミック基板に微小なクラックを生じることなく接合でき、モジュールの信頼性を向上することができるセラミック回路基板とその製造方法が提供される。 According to the present invention, when a copper electrode is bonded to a ceramic circuit board by ultrasonic bonding, the ceramic circuit board that can be bonded without causing micro cracks in the ceramic substrate and the module reliability can be improved. A manufacturing method is provided.

本発明の回路基板の一例を示す断面図Sectional drawing which shows an example of the circuit board of this invention 本発明の回路基板の一例を示す走査型電子顕微鏡写真Scanning electron micrograph showing an example of the circuit board of the present invention

以下、本発明について詳細に説明する。 Hereinafter, the present invention will be described in detail.

まず、本発明に関わるセラミック基板は、放熱性に優れた窒化アルミニウム基板、窒化けい素基板が好ましく、そのセラミック基板の厚みとしては、1.5mmを越えると熱抵抗が大きくなり、0.2mm未満では耐久性がなくなるため、0.2〜1.5mmが好ましい。 First, the ceramic substrate according to the present invention is preferably an aluminum nitride substrate or a silicon nitride substrate excellent in heat dissipation. The thickness of the ceramic substrate exceeds 1.5 mm, and the thermal resistance increases, and it is less than 0.2 mm. Then, since durability is lost, 0.2 to 1.5 mm is preferable.

このとき、セラミック基板の表面に存在する微少な欠陥や窪み等は、回路、放熱板あるいはそれらの前駆体である銅板をセラミック基板に接合する際に影響を及ぼすため、平滑であることが好ましい。従って、セラミック基板は、ホーニング処理や機械加工等による研磨処理が施すことが好ましく、上記機械加工による表面加工をおこなった場合には、セラミック基板の表面に生じた微小なクラックをなくすために焼結助材の溶融温度まで再加熱処理をおこなうことがより好ましい。 At this time, since a minute defect, a dent, etc. which exist in the surface of a ceramic substrate influence when joining a copper plate which is a circuit, a heat sink, or those precursors to a ceramic substrate, it is preferable that it is smooth. Therefore, it is preferable that the ceramic substrate is subjected to a polishing process such as a honing process or a machining process. When the surface process is performed by the machining process, the ceramic substrate is sintered in order to eliminate micro cracks generated on the surface of the ceramic substrate. It is more preferable to perform the reheating treatment up to the melting temperature of the auxiliary material.

本発明に関わるセラミック基板は、基板表面の鏡面光沢度が5.0以上であることが好ましく、9.0以上であることがより好ましい。詳細を説明すると、本発明に関わるろう材は、ろう材中のTiが窒化アルミニウム基板または、窒化けい素基板の表面と反応したTi化合物を形成し、それを介して溶融したろう材が基板表面および銅板表面に濡れ広がることにより接合されるものであるが、このとき、セラミック基板の表面に微小な凹凸が多数あると基板表面とTiの反応が阻害されたり、ろう材の濡れ広がりが不十分で接合できない場合がある。従来から基板表面の性状を評価する手法として、JIS B 0601記載の表面粗さ計による算術平均粗さ(Ra)や最大高さ(Ry)を用いられているが、計測される箇所は、微小な範囲であるために基板表面の状態を把握するには十分ではなかった。本発明者らは、鋭意検討をおこなった結果、JIS Z 8741に規定される鏡面光沢度(堀場製作所製グロスチェッカIG−320、入射角60°受光角60°)を用いることで基板表面の微小な凹凸を広範囲にわたってより的確に把握できることを見出し、さらに、その値が5.0以上であれば、ろう材の濡れ広がりの影響が小さくなることを見出した。鏡面光沢度が5.0を下回る場合、ろう材の濡れ広がり影響するため、部分的に接合できない場合があり、接合ボイドを生じ易くなるためである。 In the ceramic substrate according to the present invention, the specular gloss of the substrate surface is preferably 5.0 or more, and more preferably 9.0 or more. More specifically, in the brazing material according to the present invention, Ti in the brazing material forms a Ti compound that reacts with the surface of the aluminum nitride substrate or the silicon nitride substrate, and the brazing material melted through the Ti compound forms the surface of the substrate. In this case, if there are many minute irregularities on the surface of the ceramic substrate, the reaction between the substrate surface and Ti will be hindered, or the brazing material will not be sufficiently spread. May not be able to be joined. Conventionally, arithmetic average roughness (Ra) and maximum height (Ry) by a surface roughness meter described in JIS B 0601 have been used as a method for evaluating the properties of the substrate surface. Therefore, it was not enough to grasp the state of the substrate surface. As a result of intensive studies, the present inventors have used a specular glossiness (Gloss Checker IG-320, manufactured by Horiba, Inc., incident angle 60 °, light receiving angle 60 °) defined in JIS Z 8741, so that the surface of the substrate is minute. It has been found that such unevenness can be accurately grasped over a wide range, and further, if the value is 5.0 or more, it has been found that the influence of the wetting and spreading of the brazing material is reduced. This is because when the specular glossiness is less than 5.0, it affects the wetting and spreading of the brazing material, so that partial joining may not be possible and joint voids are likely to occur.

本発明に関わるセラミック回路基板に使用される銅回路及び銅放熱板の材質は、電気特性の観点から、電気抵抗の低い純度は99.9%以上の無酸素銅であることが好ましく、その厚みは、熱拡散の観点から0.2〜0.5mmである。セラミック基板に回路パターン及び放熱板を接合し、回路を形成する方法としては、セラミック基板とその両主面に金属板とを活性金属を含有するろう材を介して接合した前駆体を作成し、所望の回路と放熱板の形状をエッチングレジストでマスキングした後、不要な部分をエッチングして得る方法やあらかじめ銅板から打ち抜かれた回路及び放熱板のパターンを含有するろう材を介してセラミック基板に接合する方法等によって行うことができる。 From the viewpoint of electrical characteristics, the material of the copper circuit and copper heat sink used for the ceramic circuit board according to the present invention is preferably oxygen-free copper having a low electrical resistance of 99.9% or more, and its thickness Is 0.2 to 0.5 mm from the viewpoint of thermal diffusion. As a method of forming a circuit by bonding a circuit pattern and a heat sink to a ceramic substrate, a precursor is prepared by bonding a ceramic substrate and a metal plate to both main surfaces thereof via a brazing material containing an active metal, Masking the desired circuit and heat sink shape with an etching resist, and then bonding to the ceramic substrate via a method of obtaining unnecessary portions by etching or brazing material containing a circuit and heat sink pattern previously punched from a copper plate It can be performed by the method of doing.

本発明に関わるセラミック基板と銅板の間に形成されるろう材層は、Agを主成分とする合金中にCuを主成分とする合金が分散した構造を有し、かつその厚みが11〜24μmであることを特徴とするものである。
既に記載したが、超音波接合はセラミック回路基板の所望の位置に銅電極を配置し、回路基板と接合する電極端子の上部から荷重を負荷した後、基板の水平方向に超音波の振動を付与する手法である。そのため、セラミック基板と銅回路の界面に強い応力が発生し、セラミック基板の表面に微小なクラックを生じたり、場合によってはセラミック基板が割れ、絶縁性を確保できなくなる等、信頼性に影響することがあった。本発明者らは、鋭意検討をおこない、上記したろう材層の構造と厚みとすることにより、基板と銅回路の界面に負荷される応力を緩和することができ、セラミック基板に微小なクラックを生じることなく銅電極を超音波にて接合できることを見出した。
The brazing filler metal layer formed between the ceramic substrate and the copper plate according to the present invention has a structure in which an alloy mainly containing Cu is dispersed in an alloy mainly containing Ag, and the thickness thereof is 11 to 24 μm. It is characterized by being.
As already described, ultrasonic bonding places a copper electrode at a desired position on the ceramic circuit board, and after applying a load from the top of the electrode terminal to be bonded to the circuit board, ultrasonic vibration is applied in the horizontal direction of the board. It is a technique to do. For this reason, strong stress is generated at the interface between the ceramic substrate and the copper circuit, causing micro cracks on the surface of the ceramic substrate, and in some cases, the ceramic substrate is cracked, which may affect the reliability. was there. The present inventors have intensively studied, and by making the structure and thickness of the brazing material layer described above, the stress applied to the interface between the substrate and the copper circuit can be relieved, and minute cracks are formed in the ceramic substrate. It has been found that a copper electrode can be joined by ultrasonic waves without being generated.

ここで、本発明に関わるセラミック回路基板のろう材層の構造とその厚みを観察する方法を以下に説明する。まず、ろう材層の厚みは、セラミック回路基板の断面を研磨し、走査型電子顕微鏡(日本電子JSM−6380)にて倍率200倍で観察することにより計測することができる。また、ろう材層の構造は、Agを主成分とする合金とCuを主成分とする合金は検出強度が異なるためにコントラストが異なっており、その形状と割合を観察することができる(図2)。さらには、電子顕微鏡に併設したエネルギー分散型X線分析装置を用い、ろう材層中の比率を簡易的に計測することによってもできる。例えば倍率1500倍にてろう材層内のAgとCuの比率を簡易的に計測すると、Ag/Cuのピーク強度は1.2〜1.7となり、Ag合金中にCu合金が分散された形態であることがわかる。 Here, a method for observing the structure and thickness of the brazing material layer of the ceramic circuit board according to the present invention will be described below. First, the thickness of the brazing material layer can be measured by polishing a cross section of the ceramic circuit board and observing it with a scanning electron microscope (JEOL JSM-6380) at a magnification of 200 times. Further, the structure of the brazing filler metal layer is different in contrast because the alloy containing Ag as a main component and the alloy containing Cu as a main component have different detection intensities, and its shape and ratio can be observed (FIG. 2). ). Furthermore, it is possible to simply measure the ratio in the brazing filler metal layer using an energy dispersive X-ray analyzer attached to the electron microscope. For example, when the ratio of Ag and Cu in the brazing filler metal layer is simply measured at a magnification of 1500 times, the peak intensity of Ag / Cu is 1.2 to 1.7, and the Cu alloy is dispersed in the Ag alloy. It can be seen that it is.

以下に本発明に関わる応力緩和の効果について詳細を説明すると、銅電極の超音波接合により生じる応力は、一部は銅回路や銅電極の変形にて緩和されるが、その大半は、銅回路とセラミック基板の界面に集中することが考えられる。このとき負荷された応力は、ろう材層を形成するAg合金中にCu合金が分散した構造、言い換えると延性や展性に富むAgを主成分とする構造にすることによって、セラミック基板に対し水平方向の応力が、さらに、ろう材層の厚みを11μm以上となるように配置することで垂直方向の応力が緩和できることを見出した。したがって、ろう材層の厚みが10μm以下である場合には、超音波接合による応力を緩和できず、基板に微小なクラックを生じる場合があるためであり、ろう材層の厚みが24μm以下であるのは、接合時にろう材の浸みだしにより、厚みを維持できなかったり、浸みだしたろう材がセラミック基板と対面する銅板の側面、反対の主面に銅板より硬い合金を生じるためにセラミック回路基板の熱サイクル特性に影響する場合があるためである。 The stress relaxation effect related to the present invention will be described in detail below. The stress generated by ultrasonic bonding of the copper electrode is partially relaxed by deformation of the copper circuit or the copper electrode, but most of the stress is generated by the copper circuit. Concentrating at the interface of the ceramic substrate. The stress applied at this time is horizontal to the ceramic substrate by adopting a structure in which a Cu alloy is dispersed in an Ag alloy forming a brazing filler metal layer, in other words, a structure mainly composed of Ag having high ductility and malleability. It has been found that the stress in the vertical direction can be relieved by arranging the brazing material layer to have a thickness of 11 μm or more. Therefore, when the thickness of the brazing material layer is 10 μm or less, stress due to ultrasonic bonding cannot be relaxed, and micro cracks may occur in the substrate, and the thickness of the brazing material layer is 24 μm or less. This is because the thickness of the brazing material cannot be maintained due to the leaching of the brazing material at the time of joining, and the brazing brazing material produces a harder alloy than the copper plate on the side of the copper plate facing the ceramic substrate, and on the opposite main surface. This is because thermal cycle characteristics may be affected.

さらに本発明に関わるセラミック回路基板は、活性金属であるTiとセラミック基板表面と反応したTi化合物の厚みが0.4μm〜0.6μmであり、Ti化合物の占める面積がセラミック基板の12〜85%であることを特徴とするものである。これらの計測手法としては、上記記載した走査型電子顕微鏡による回路基板の断面において、セラミック基板の表面近傍を倍率5000倍で観察することによってTi化合物の厚みを計測することができる。また、Ti化合物の占める面積の計測は、まず、セラミック回路基板を塩化第二銅にて銅板を溶解し、チオ硫酸アンモニウム水溶液に浸漬することにより、Ti化合物が残留した基板を得ることができ、その表面を走査型電子顕微鏡にて倍率200倍で観察した画像を画像解析(MediaCybernetics解析ソフトImagePro)することによってTi化合物の占める面積を求めることができる。 Furthermore, in the ceramic circuit board according to the present invention, the thickness of the Ti compound reacted with the active metal Ti and the ceramic substrate surface is 0.4 μm to 0.6 μm, and the area occupied by the Ti compound is 12 to 85% of the ceramic substrate. It is characterized by being. As these measurement methods, the thickness of the Ti compound can be measured by observing the vicinity of the surface of the ceramic substrate at a magnification of 5000 times in the cross section of the circuit board by the scanning electron microscope described above. In addition, the measurement of the area occupied by the Ti compound can be obtained by first dissolving the copper plate with cupric chloride and immersing the ceramic circuit board in an aqueous ammonium thiosulfate solution to obtain a substrate in which the Ti compound remains, The area occupied by the Ti compound can be determined by image analysis (Media Cybernetics analysis software ImagePro) of an image obtained by observing the surface with a scanning electron microscope at a magnification of 200 times.

ここで接合時のTi化合物の役割を簡単に説明すると、基板表面に形成するTi化合物は、ろう材とセラミック基板とを結合する化合物であって、セラミック基板と強く結合している。しかしながら、Ti化合物が厚くなるとセラミック基板との熱特性の差(線膨張率)により基板表面に微小なクラックが発生し易くなり、セラミック回路基板の信頼性が損なわれるため、Ti化合物の厚みは極力薄くすることが好ましく、Ti化合物の占める面積がセラミック基板の85%を越えると部分的にTi化合物の厚みが厚くなるためであり、12%未満であると部分的に接合していない接合ボイドを生じる場合があるためである。 Here, the role of the Ti compound at the time of bonding will be briefly described. The Ti compound formed on the substrate surface is a compound that bonds the brazing material and the ceramic substrate, and is strongly bonded to the ceramic substrate. However, as the Ti compound becomes thicker, micro cracks are likely to occur on the substrate surface due to the difference in thermal characteristics (linear expansion coefficient) with the ceramic substrate, and the reliability of the ceramic circuit substrate is impaired. When the area occupied by the Ti compound exceeds 85% of the ceramic substrate, the thickness of the Ti compound is partially increased. When the area occupied by the Ti compound is less than 12%, bonding voids that are not partially bonded are formed. This is because it may occur.

本発明に関わるセラミック回路基板の製造は、ろう材金属成分であるAg、Cu、Ti、Snであるが、上記金属成分に含有される酸素量は、0.15質量%以下(0を含まず)であることを特徴とするものである。ろう材の金属成分に含有する酸素量が0.15質量%以下であるのは、ろう材中のTiが酸化により消費され、セラミック基板との反応が不足するために部分的に接合されないために接合ボイドを生じる場合があるためである。 The production of the ceramic circuit board according to the present invention is made of Ag, Cu, Ti, and Sn, which are brazing metal components, but the amount of oxygen contained in the metal components is 0.15% by mass or less (not including 0). ). The amount of oxygen contained in the metal component of the brazing filler metal is 0.15% by mass or less because Ti in the brazing filler metal is consumed due to oxidation and is not partially joined due to insufficient reaction with the ceramic substrate. This is because joining voids may occur.

さらに上記したろう材は、上記組成からなる均一な厚みの合金箔であったり、各組成の粉末、若しくは一部合金化された粉末に残りの粉末を添加し用いたり、すべてを合金化した粉体を用いることによって樹脂分を混合時に混ぜることによって作成するペースト法を採用することができる。このとき用いる材料の粉末は、均一なろう材塗布膜を形成することができるように20μm以上の粗粉を含まない分級された材料を用いることがより好ましく、既に述べたろう材層の厚みを調整するには、例えば合金箔であれば11〜24μmの厚みに圧延したものを用いたり、ペースト法である場合にはスクリーン印刷やロールコーター等を用い、ペーストの粘度調整によりセラミック基板若しくは銅板に一定の厚みに塗布することにより調整することができる。 Furthermore, the brazing material described above is an alloy foil having a uniform thickness composed of the above composition, a powder of each composition, or a powder obtained by adding the remaining powder to a partially alloyed powder, or alloying all of them. By using a body, it is possible to employ a paste method in which a resin component is mixed at the time of mixing. As the powder of the material used at this time, it is more preferable to use a classified material that does not include coarse powder of 20 μm or more so that a uniform brazing material coating film can be formed, and the thickness of the brazing material layer described above is adjusted. For example, in the case of an alloy foil, a roll rolled to a thickness of 11 to 24 μm is used. In the case of a paste method, screen printing, a roll coater, or the like is used. It can adjust by apply | coating to the thickness of.

本発明に関わるセラミック回路基板の接合温度は、真空度10−3Pa以下の真空炉で780〜810℃であることが好ましく、その保持時間は、いずれも10〜30分であることが望ましい。接合温度がこれより低くかったり、保持時間を短かくした場合、Ti化合物の生成が十分にできないために部分的に接合できない場合があるためであり、逆に高温であったり、保持時間が長すぎる場合には、銅板へのろう材成分の拡散が進行し、ろう材層の厚みが薄くなり、応力緩和の効果が減ぜられ、セラミック基板にクラックを生じる場合があるためである。 The bonding temperature of the ceramic circuit board according to the present invention is preferably 780 to 810 ° C. in a vacuum furnace having a degree of vacuum of 10 −3 Pa or less, and the holding time is preferably 10 to 30 minutes. This is because when the bonding temperature is lower than this, or when the holding time is shortened, the Ti compound may not be sufficiently generated, so that partial bonding may not be possible. On the contrary, the bonding temperature is high or the holding time is long. When the amount is too large, diffusion of the brazing material component to the copper plate proceeds, the thickness of the brazing material layer becomes thin, the stress relaxation effect is reduced, and cracks may occur in the ceramic substrate.

回路形成方法に関しては既に述べているが、本発明のセラミック回路基板には、従来提案されている金属回路の端部に薄肉部分を設けることや回路パターン周辺にセラミック基板に達する貫通孔や未貫通孔、溝状のスリット等の応力緩和部を設けることによって、さらに熱サイクル特性を向上することができる。 Although the circuit forming method has already been described, in the ceramic circuit board of the present invention, a conventionally proposed metal circuit is provided with a thin portion at the end, a through hole reaching the ceramic substrate around the circuit pattern, or a non-through hole. By providing a stress relaxation portion such as a hole or a groove-shaped slit, the thermal cycle characteristics can be further improved.

さらに本発明のセラミック回路基板の回路及び放熱面の表面には、各種めっきやめっきのない処理を必要に応じて施すことができる。具体的な一例を挙げると、膜厚が2〜8μm程度の無電解Niめっきや、はんだ濡れの良い金フラッシュめっき、置換型銀めっきであり、さらにはめっきを施さないめっきレス処理の場合には、研削、物理研磨、化学研磨等によって金属表面の傷をRa≦0.5μmに平滑化した後、防錆剤が塗布する処理が施される。 Furthermore, various kinds of plating and treatment without plating can be applied to the surface of the circuit and the heat radiation surface of the ceramic circuit board of the present invention as necessary. Specific examples include electroless Ni plating with a film thickness of about 2 to 8 μm, gold flash plating with good solder wettability, substitutional silver plating, and in the case of plating-less treatment without plating. After smoothing the scratches on the metal surface to Ra ≦ 0.5 μm by grinding, physical polishing, chemical polishing, etc., a treatment for applying a rust preventive is performed.

実施例1〜10 比較例1〜10
Ag粉末(比表面積0.6m/g、酸素量0.16質量%)、Cu粉末(比表面積0.7m/g、酸素量0.05質量%)、TiH粉末(特級試薬)、Sn粉末(特級試薬)を、表1に示す各種比率にて混合した。この粉末100質量部に、テレピネオール15質量部、ポリイソブチルメタクリレートのトルエン溶液を固形分として1.3質量部を三本ロールにて混合し、目開き20μmのナイロンメッシュを通過させ、ろう材ペーストを調整した。これを、厚み0.635mm×52mm×45mmの窒化アルミニウム基板(熱伝導率180W/mK、3点曲げ強度500MPa、鏡面光沢度15.2)の表面及び裏面に、ろう材層の厚み(乾燥後の厚み)が所望の厚みとなるようロールコーターを用いて塗布した。その後、表面に回路形成用銅板を、裏面に放熱板形成用銅板(いずれも無酸素銅板)を重ね、6.5×10−4Paの真空炉中、400℃まで昇温し、真空度が5.0×10−3Paになるまで保持した後、800℃まで昇温し20分保持した後、冷却速度5℃/minにて600℃まで冷却し、4時間保持した後、1℃/minにて冷却し、銅板と窒化アルミニウム基板の接合体を製造した。
Examples 1-10 Comparative Examples 1-10
Ag powder (specific surface area 0.6 m 2 / g, oxygen content 0.16% by mass), Cu powder (specific surface area 0.7 m 2 / g, oxygen content 0.05% by mass), TiH 2 powder (special grade reagent), Sn powder (special grade reagent) was mixed at various ratios shown in Table 1. To 100 parts by weight of this powder, 15 parts by weight of terpineol and 1.3 parts by weight of a toluene solution of polyisobutyl methacrylate are mixed with three rolls, passed through a nylon mesh having an opening of 20 μm, and a brazing material paste. It was adjusted. The thickness of the brazing filler metal layer (after drying) is applied to the front and back surfaces of an aluminum nitride substrate (thermal conductivity 180 W / mK, three-point bending strength 500 MPa, mirror gloss 15.2) having a thickness of 0.635 mm × 52 mm × 45 mm. ) Was applied using a roll coater so that the desired thickness was a desired thickness. Then, a circuit forming copper plate is placed on the front surface, and a heat sink forming copper plate (both oxygen-free copper plates) is placed on the back surface. The temperature is raised to 400 ° C. in a vacuum furnace of 6.5 × 10 −4 Pa, and the degree of vacuum is increased. After holding until 5.0 × 10 −3 Pa, the temperature was raised to 800 ° C. and held for 20 minutes, then cooled to 600 ° C. at a cooling rate of 5 ° C./min, held for 4 hours, and then 1 ° C. / It cooled by min and the joined body of the copper plate and the aluminum nitride board | substrate was manufactured.

接合体の回路形成用銅板に、スクリーン印刷によりUV硬化型エッチングレジストを回路パターンに印刷し、UV硬化させた後、さらに放熱面形状を印刷しUV硬化させた。これをエッチャントとして塩化第2銅水溶液にてエッチングをおこない、続いて60℃のチオ硫酸アンモニウム水溶液とフッ化アンモニウム水溶液で随時処理し、回路パターンと放熱板パターンを形成し、ろう材の金属成分やろう材厚の異なった回路基板の中間体を種々製造した。 A UV curable etching resist was printed on a circuit pattern by screen printing on a circuit-forming copper plate of the joined body, and after UV curing, the heat radiation surface shape was further printed and UV cured. Etching with an aqueous cupric chloride solution as an etchant, followed by treatment with an aqueous ammonium thiosulfate solution and an aqueous ammonium fluoride solution at 60 ° C. to form a circuit pattern and a heat sink pattern. Various circuit board intermediates with different thicknesses were produced.

尚、比較例9では銅粉(比表面積2.1m/g、酸素量0.3質量%)に、実施例7,8及び比較例8では鏡面光沢度の異なる窒化アルミニウム基板に、また、実施例9、10及び比較例10ではセラミック基板を鏡面光沢度の異なる窒化けい素(熱伝導率90W/m・K、抗折強度710MPa)に変更した以外は実施例1と同様の処理をし、回路基板の中間体を製造した。 In Comparative Example 9, copper powder (specific surface area 2.1 m 2 / g, oxygen amount 0.3 mass%), Examples 7, 8 and Comparative Example 8 on aluminum nitride substrates having different specular gloss, In Examples 9 and 10 and Comparative Example 10, the same treatment as in Example 1 was performed except that the ceramic substrate was changed to silicon nitride having different specular gloss (thermal conductivity 90 W / m · K, bending strength 710 MPa). A circuit board intermediate was produced.

ついで、無電解Ni−Pめっきを施した回路基板を製造し、以下の評価をおこなった。 Subsequently, the circuit board which gave electroless Ni-P plating was manufactured, and the following evaluation was performed.

接合ボイド:超音波探傷検査装置(日立エンジニアリングFS300−3)にて回路基板内の接合ボイドを1条件あたり20枚計測し、回路の面積に占める比率を計算し、その20枚計測した中で最大値を用いて以下の3つにランク分けをおこなった。
A:1%以下、B;1%を越え10%以下、C:10%を越え実用に耐え得られない
Bonding voids: 20 bonding voids in a circuit board were measured per condition with an ultrasonic flaw detection inspection device (Hitachi Engineering FS300-3), and the ratio to the area of the circuit was calculated. The values were used to rank the following three categories.
A: 1% or less, B; more than 1% but not more than 10%, C: more than 10%, cannot be practically used

超音波接合評価:1.5mm厚の銅電極材を超音波接合試験機(アドウェルズUP−Lite3000)にて、荷重1200N、周波数20kHz、振幅50μm、接合時間0.4秒で接合した。接合後、銅電極および回路基板の銅板をエッチングにて除去し、セラミック基板の表面の観察を光学顕微鏡(倍率50倍)で観察をおこなった。試験数は1条件あたり50枚を使用し、目視で観察できる軽微なクラックが発生した枚数を以下の3つにランク分けをおこなった。
A:0枚、B:1〜5枚、C:6枚以上
Evaluation of ultrasonic bonding: A 1.5 mm thick copper electrode material was bonded with an ultrasonic bonding tester (Adwells UP-Lite 3000) at a load of 1200 N, a frequency of 20 kHz, an amplitude of 50 μm, and a bonding time of 0.4 seconds. After joining, the copper electrode and the copper plate of the circuit board were removed by etching, and the surface of the ceramic substrate was observed with an optical microscope (50 times magnification). The number of tests used was 50 per condition, and the number of minor cracks that could be visually observed was ranked into the following three.
A: 0 sheets, B: 1 to 5 sheets, C: 6 sheets or more

熱サイクル試験評価:作成したセラミック回路基板を熱衝撃試験に投入し、−40℃×30分、125℃×30分を1サイクルとする熱衝撃試験を500サイクルおこなった後、銅板をエッチングにて除去し、セラミック基板の表面に発生するクラックの発生状態を光学実体顕微鏡(倍率50倍)にて観察し、その20枚計測した中で最大値を用いて以下の3つにランク分けをおこなった。
A:クラックが観察されない、B:クラック長100μm未満が観察されるもの、C:クラック長100μm以上が観察されるもの
Thermal cycle test evaluation: The prepared ceramic circuit board is put into a thermal shock test, and after performing a thermal shock test with -40 ° C. × 30 minutes and 125 ° C. × 30 minutes as one cycle, the copper plate is etched. The state of cracks generated on the surface of the ceramic substrate was removed and observed with an optical stereomicroscope (magnification 50 times), and the ranking was divided into the following three using the maximum value of the 20 sheets measured: .
A: No crack is observed, B: A crack length of less than 100 μm is observed, C: A crack length of 100 μm or more is observed

各評価を勘案し、総合評価として以下の3段階で評価した。
◎:すべての評価においてAランクであったもの
○:超音波接合評価がAランクであるが、その他の評価がBであるもの
×:超音波接合評価がB若しくはCランクまたはその他の評価がCであるもの
Considering each evaluation, the following three levels were evaluated as a comprehensive evaluation.
◎: A rating in all evaluations A: Ultrasonic bonding evaluation is A rank, but other evaluation is B ×: Ultrasonic bonding evaluation is B or C rank or other evaluation is C What is

各試験評価結果を表1に示す。 The test evaluation results are shown in Table 1.

上記に示すとおり、本発明によれば、セラミック回路基板に銅電極を超音波接合にて接合する際、セラミック基板に微小なクラックを生じることなく接合でき、モジュールの信頼性を向上することができるセラミック回路基板とその製造方法が提供される。 As described above, according to the present invention, when a copper electrode is bonded to a ceramic circuit board by ultrasonic bonding, the ceramic substrate can be bonded without causing micro cracks, and the reliability of the module can be improved. A ceramic circuit board and a method for manufacturing the same are provided.

本発明の回路基板は、半導体を搭載するセラミック回路基板として使用され、具体的には、例えば電鉄、電気自動車、一般産業用のインバーター用モジュール等に用いられる。   The circuit board of the present invention is used as a ceramic circuit board on which a semiconductor is mounted. Specifically, the circuit board is used, for example, for electric railways, electric vehicles, inverter modules for general industries, and the like.

1 セラミック基板
2 銅回路パターン
3 銅放熱板
4 ろう材層
5 Ti化合物
H ろう材層の厚み
h Ti化合物の厚み

DESCRIPTION OF SYMBOLS 1 Ceramic substrate 2 Copper circuit pattern 3 Copper heat sink 4 Brazing material layer 5 Ti compound H Thickness of brazing material layer h Thickness of Ti compound

Claims (3)

セラミック基板の一方の面に銅回路、他方の面に銅放熱板が活性金属としてTiを含有するろう材により接合されてなるセラミック回路基板において、セラミック基板の鏡面光沢度が5.0以上、セラミック回路基板の接合ボイドが10%以下であって、セラミック回路基板のろう材層がAgを含有する合金中にCuを含有する合金が分散した構造を有し、その厚みが11〜24μmであり、Ti化合物の厚みが0.4〜0.6μmで、その占有面積が12〜85%であることを特徴とするセラミック回路基板。 In a ceramic circuit board in which a copper circuit is bonded to one surface of a ceramic substrate and a copper heat sink is bonded to the other surface by a brazing material containing Ti as an active metal, the mirror glossiness of the ceramic substrate is 5.0 or more, ceramic The bonding void of the circuit board is 10% or less, the brazing material layer of the ceramic circuit board has a structure in which an alloy containing Cu is dispersed in an alloy containing Ag, and the thickness thereof is 11 to 24 μm. A ceramic circuit board characterized in that the Ti compound has a thickness of 0.4 to 0.6 μm and an occupied area of 12 to 85%. セラミック基板が窒化アルミニウム基板または窒化けい素基板である請求項1記載のセラミック回路基板。 2. The ceramic circuit board according to claim 1, wherein the ceramic substrate is an aluminum nitride substrate or a silicon nitride substrate. 基板表面の鏡面光沢度5.0以上のセラミック基板を用い、ろう材金属成分がAg及びCuを含有し、活性金属と成分としてTiHの含有量が1〜4質量%で、ろう材金属に含まれる酸素量が0.15質量%以下(0を含まず)であるろう材を用いて、真空度10−3Pa以下、接合温度780〜810℃、保持時間10〜30分で接合することを特徴とする請求項1または2記載のセラミック回路基板の製造方法。

Using a ceramic substrate with a specular gloss of 5.0 or more on the substrate surface, the brazing filler metal component contains Ag and Cu, the active metal and the content of TiH 2 as the component are 1 to 4% by mass, Using a brazing material having an oxygen content of 0.15% by mass or less (not including 0), joining at a degree of vacuum of 10 −3 Pa or less, a joining temperature of 780 to 810 ° C., and a holding time of 10 to 30 minutes. The method for producing a ceramic circuit board according to claim 1 or 2, wherein:

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