JP5860303B2 - Wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board used for mounting an electronic component such as a semiconductor element and a manufacturing method thereof.

  Conventionally, there is a wiring board formed by a build-up method as a wiring board for mounting an electronic component such as a semiconductor element. FIG. 7 is a schematic cross-sectional view showing an example of a conventional wiring board.

  As shown in FIG. 7, a conventional wiring board 100 has a plurality of build-up insulating layers 102 laminated on the upper and lower surfaces of a core insulating plate 101.

  A plurality of through holes 103 are formed from the upper surface to the lower surface of the core insulating plate 101, and a through hole conductor 104 made of a copper plating layer is attached to the inner surface of the through hole 103. A first conductor layer 105 made of copper foil connected to the through-hole conductor 104 is attached to the upper and lower surfaces of the core insulating plate 101. Further, a filling resin 106 is filled in the through hole 103, and a second conductor layer 107 made of a copper plating layer is deposited on the filling resin 106 and the first conductor layer 105. The through-hole conductor 104, the first conductor layer 105, and the second conductor layer 107 form a core wiring conductor.

  Each buildup insulating layer 102 has a plurality of via holes 108 filled with via conductors 109 made of copper plating. A build-up wiring conductor 110 formed integrally with the via conductor 109 is attached to the surface. The build-up wiring conductor 110 is connected to the above-described second conductor layer 107 through a via conductor 109. Further, a part of the buildup wiring conductor 110 deposited on the uppermost buildup insulating layer 102 on the uppermost layer is connected to the electrode T of the electronic component E such as a semiconductor element via, for example, a solder bump B1. It functions as an electronic component connection pad 111 that is electrically connected. Further, a part of the buildup wiring conductor 110 deposited on the lower outermost buildup insulating layer 102 is electrically connected to the wiring conductor of the external electric circuit board via, for example, a solder bump B2. It functions as an external connection pad 112 connected to.

  Furthermore, a solder resist layer 113 having openings for exposing the electronic component connection pads 111 and the external connection pads 112 on the outermost buildup insulating layer 102 and the buildup wiring conductor 110 thereon. Is covered. Then, the electronic component connection pad 111 and the electrode T of the electronic component E are electrically connected via the solder bump B1. Further, the external connection pad 112 and a wiring conductor of an external electric circuit board (not shown) are electrically connected via the solder bump B2.

  A method for manufacturing such a conventional wiring board 100 will be described with reference to FIGS. First, as shown in FIG. 8A, the copper foil 105P for the first conductor layer 105 described above is laminated on the upper and lower surfaces of a resin substrate 101P formed by impregnating glass fiber with an electrically insulating material such as an epoxy resin. A double-sided copper-clad plate 120 is prepared. The thickness of the resin substrate is about 50 to 400 μm, and the thickness of the copper foil 105P is about 2 to 18 μm.

  Next, as shown in FIG. 8B, the core insulating plate 101 is formed by forming a through hole 103 from the upper surface to the lower surface of the double-sided copper-clad plate 120. The through hole 103 is formed by, for example, drilling and has a diameter of about 50 to 300 μm.

  Next, as shown in FIG. 8 (c), an electroless copper plating layer and an electrolytic copper plating layer are sequentially deposited on the inner surface of the through hole 103 and the surface of the copper foil 105P to form a through hole conductor 104. Layer 104P is formed. The thickness of the electrolytic copper plating layer is about 0.1 to 1.0 μm, and the thickness of the electrolytic copper plating layer is about 10 to 30 μm.

  Next, as shown in FIG. 8D, a hole-filling resin 106 is filled into the through hole 103 to which the copper plating layer 104P is deposited.

  Next, as shown in FIG. 8E, the upper and lower ends of the hole-filling resin 106 and the upper and lower surfaces of the copper plating layer 104P are polished and flattened. By this polishing, the thickness of the copper foil 105P is set to about 2 to 15 μm. At this time, the through-hole conductor 104 and the copper foil 105P remain in an electrically connected state.

  Next, as shown in FIG. 9F, the electroless copper plating layer and the electrolytic copper plating are applied to the surface of the flattened copper foil 105P, the upper and lower end faces of the through-hole conductor 104, and the upper and lower end faces of the hole-filling resin 106. The copper plating layer 107P for the second conductor layer 107 is formed by sequentially depositing the layers. The thickness of the electroless copper plating layer constituting the copper plating layer 107P for the second conductor layer 107 is about 0.1 to 1.0 μm, and the thickness of the electrolytic copper plating layer is about 10 to 30 μm.

  Next, as shown in FIG. 9G, an etching resist layer 131 having a predetermined pattern including a mask pattern for through-hole lands formed on and around the through-hole 103 is deposited on the copper plating layer 107P. .

  Next, as shown in FIG. 9H, the copper plating layer 107P exposed from the etching resist layer 131 and the underlying copper foil 105P are removed by etching. Thereby, a wiring conductor having a shape corresponding to the pattern of the etching resist layer 131 is formed.

  Next, as shown in FIG. 9I, the etching resist layer 131 is peeled off from the second conductor layer 107. As a result, a core wiring conductor composed of the through-hole conductor 104, the first conductor layer 105, and the second conductor layer 107 is formed.

  Next, as shown in FIG. 9 (j), a resin layer 102P to be a build-up insulating layer 102 is laminated on the upper and lower surfaces of the core insulating plate 101 on which the core wiring conductor is formed. The resin layer 102P is made of an electrically insulating material containing a thermosetting resin such as an epoxy resin, and has a thickness of about 20 to 50 μm.

  Next, as shown in FIG. 10 (k), a via hole 108 having the second conductor layer 107 as a bottom surface is formed in the resin layer 102P, thereby forming the build-up insulating layer 102. The via hole 108 is formed by, for example, laser processing.

  Next, as shown in FIG. 10L, a via conductor 109 is formed in the via hole 108, and a build-up wiring conductor 110 is formed integrally with the via conductor 109 on the surface of the build-up insulating layer 102. To do. The buildup wiring conductor 110 is formed using a known semi-additive method.

  Next, as shown in FIG. 10 (m), a necessary number of build-up insulating layers 102 and build-up wiring conductors 110 are alternately stacked, and the outermost build-up insulating layer is stacked. The conventional wiring substrate 100 is completed by depositing and forming the solder resist layer 113 on the wiring conductor 110 for 102 and the build-up.

  In recent years, as electronic devices typified by portable game machines and communication devices have become more sophisticated, high-density wiring is also required for wiring boards used for them. In order to meet the demand for such high-density fine wiring, there is an increasing demand for the core wiring conductor to have a fine width and interval of 30 μm or less.

  However, in the above-described conventional wiring substrate 100, when the core wiring conductor is formed, the thickness is 10 to 10 mm on the copper foil 105P having a thickness of about 2 to 15 μm laminated on the core insulating plate 101. After a copper plating layer 107P having a thickness of about 30 μm is deposited, the copper plating layer 107P exposed from the etching resist layer 131 formed thereon and the copper foil 105P below the copper plating layer 107P are formed by a subtractive method that is etched away in a predetermined pattern. Therefore, during the etching, the copper plating layer 107P and the copper foil 105P are etched extremely greatly in the lateral direction according to the thickness thereof, so that, for example, the width and the interval are formed on the upper and lower surfaces of the core insulating plate 101. However, it was difficult to form a core wiring conductor including a fine wiring pattern of 30 μm or less.

JP-A-11-274730

  An object of the present invention is to provide a wiring board including a fine wiring pattern having a width and interval of 30 μm or less in a core wiring conductor and a method for manufacturing the same.

The wiring board according to the present invention includes an insulating plate having a through-hole penetrating vertically, a through-hole conductor made of a plated conductor filling the through-hole, and an insulation around the through-hole so as to be electrically connected to the through-hole conductor. A wiring board comprising through-hole lands made of copper foil formed on the upper and lower surfaces of the plate by a subtractive method, and wiring conductors made of plated conductors formed on the upper and lower surfaces of the insulating plate by a semi-additive method , The through-hole conductor is filled with a through-hole so as to have a recess at the center of the upper and lower ends of the through-hole conductor, and the recess is filled with a plating conductor formed simultaneously with the plating conductor forming the wiring conductor. It is characterized by this.

The method for manufacturing a wiring board according to the present invention includes a step of forming a through-hole penetrating vertically in an insulating plate having copper foils attached to the upper and lower surfaces, and a step of filling a through-hole conductor made of a plating conductor in the through-hole. And a step of forming through-hole lands made of copper foil electrically connected to the through-hole conductor around the through-holes on the upper and lower surfaces of the insulating plate by a subtractive method, and a plated conductor extending on the upper and lower surfaces of the insulating plate Forming a wiring conductor comprising a semi-additive method, and in the step of filling the through-hole conductor, the through-hole is formed so that recesses are formed at both upper and lower ends of the through-hole. In the process of forming the wiring conductor, the concave portion is formed into the wiring conductor. It is characterized in that the filling by the plating conductor formed simultaneously with plating conductors.

  According to the wiring board and the method of manufacturing the same of the present invention, the through-hole land connected to the through-hole conductor is formed on the insulating plate for the core by the subtractive method, which is difficult to finely process. Is formed by a semi-additive method capable of microfabrication, it is possible to provide a wiring board having a fine pattern with a width and interval of 30 μm or less and a method for manufacturing the same.

1A and 1B are a schematic cross-sectional view and an enlarged cross-sectional view of a main part showing an example of an embodiment of a wiring board according to the present invention. 2A to 2E are schematic cross-sectional views showing an example of an embodiment of the method for manufacturing the wiring board shown in FIG. FIGS. 3F to 3J are schematic cross-sectional views showing an example of an embodiment of the method for manufacturing the wiring board shown in FIG. 4 (k) to 4 (n) are schematic cross-sectional views showing an example of an embodiment of the method for manufacturing the wiring board shown in FIG. FIGS. 5A and 5B are a schematic cross-sectional view and an enlarged cross-sectional view of an essential part showing an example of another embodiment of the wiring board of the present invention. 6A to 6E are schematic cross-sectional views showing a part of an example of the embodiment of the method for manufacturing the wiring board shown in FIG. 7A and 7B are a schematic cross-sectional view and an enlarged cross-sectional view of a main part showing an example of a conventional wiring board. 8A to 8E are schematic cross-sectional views showing an example of an embodiment of a conventional method for manufacturing the wiring board shown in FIG. 9 (f) to 9 (j) are schematic cross-sectional views showing an example of an embodiment of a conventional method for manufacturing the wiring board shown in FIG. 10 (k) to 10 (m) are schematic cross-sectional views showing an example of an embodiment of a conventional method for manufacturing the wiring board shown in FIG.

  Next, an example of an embodiment of the wiring board and the manufacturing method thereof according to the present invention will be described in detail with reference to FIGS.

  FIG. 1A shows a schematic cross-sectional view of a wiring board 20 in the present invention, and FIG. 1B shows an enlarged cross-sectional view of a main part of a specific layer in the wiring board 20. The wiring board 20 of this example is formed by laminating a plurality of build-up insulating layers 2 on both main surfaces of a core insulating plate 1 to which a core wiring conductor 7 is attached.

  The core insulating plate 1 is made of an electrically insulating material in which a glass cloth is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and has a thickness of about 50 to 400 μm.

  A plurality of through holes 3 having a diameter of 50 to 300 μm are formed from the upper surface to the lower surface of the core insulating plate 1. A through-hole conductor 4 made of a copper plating layer is filled in the through-hole 3. Further, through-hole lands 5 connected to the through-hole conductors 4 are attached to the upper and lower surfaces of the core insulating plate 1. The thickness of the through hole land 5 is about 2 to 15 μm, and the diameter is about 70 to 150 μm larger than the diameter of the through hole 3.

  On the through-hole conductor 4, the through-hole land 5, and the core insulating plate 1, a cover plating 6 that covers the through-hole conductor 4 and the through-hole land 5, and a core having a fine pattern with a width and interval of 30 μm or less The wiring conductor 7 is formed by a semi-additive method. The lid plating 6 and the core wiring conductor 7 are made of a copper plating layer having a thickness of about 10 to 30 μm, and are formed by a semi-additive method. A fine pattern of 30 μm or less can be formed. Thereby, according to the wiring board 20 of this invention, the wiring board which has the fine wiring which made the width | variety and the space | interval of the wiring conductor 7 for cores 30 micrometers or less can be provided.

  The build-up insulating layer 2 is made of an electrical insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a plurality of via holes 8 penetrating from the upper surface to the lower surface. The thickness of the build-up insulating layer 2 is about 10 to 50 μm. The diameter of each via hole 8 is about 30 to 100 μm. Further, each via hole 8 is filled with a via conductor 9 made of copper plating, and a build-up wiring conductor 10 formed integrally with the via conductor 9 on the surface of each build-up insulating layer 2. Is deposited by copper plating. The buildup wiring conductor 10 is connected to the above-described lid plating 6 and core wiring conductor 7 through a part of the via conductor 9. When the build-up wiring conductor 10 is connected to the core wiring conductor 7 via the via hole 8, the via land made of the same copper foil as the through-hole land 5 is formed on the core insulating plate 1 immediately below the via hole 8. It is preferable to form 11 by a subtractive method and to cover it with the wiring conductor 7 for core.

  A part of the build-up wiring conductor 10 deposited on the outermost build-up insulating layer 2 on the upper surface side of the wiring board 20 is applied to the terminal T of the electronic component E, for example, a solder bump. An electronic component connection pad 12 that is electrically connected by flip chip connection via B1 is formed. These electronic component connection pads 12 are covered with a solder resist layer 13 at the outer periphery thereof, and a central portion is exposed from the solder resist layer 13, and the exposed portion of the electronic component E via the solder bump B1. It is electrically connected to the terminal T.

  Further, a part of the buildup wiring conductor 10 deposited on the outermost buildup insulating layer 2 on the lower surface side of the wiring board 20 is connected to the wiring conductor of the external electric circuit board by, for example, soldering. An external connection pad 14 that is electrically connected via the bump B2 is formed. These external connection pads 14 are covered with a solder resist layer 13 at the outer peripheral portion, and the central portion is exposed from the solder resist layer 13, and this exposed portion is formed on the external electric circuit board via the solder bump B2. It is electrically connected to the wiring conductor.

  The solder resist layer 13 is made of an electrically insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin. In the solder resist layer 13 provided on the upper surface side of the wiring board 20, an opening for exposing a part of the outermost buildup wiring conductor 10 as an electronic component connection pad 12 connected to the electrode T of the electronic component E is exposed. A part of the outermost buildup wiring conductor 10 is connected to the wiring conductor of the external electric circuit board as an external connection pad 14 on the solder resist layer 13 provided on the lower surface side. An opening to be exposed is formed.

  Next, an example of the manufacturing method of the wiring board 20 of this invention is demonstrated in detail based on FIGS. 2 to 4, parts similar to those in FIG.

  First, as shown in FIG. 2A, a double-sided copper-clad plate 30 is prepared in which copper foil 5P is laminated on the upper and lower surfaces of a resin substrate 1P formed by impregnating glass fiber with an electrically insulating material such as an epoxy resin. . The thickness of the resin substrate 1P is about 50 to 400 μm, and the thickness of the copper foil 5P is about 2 to 18 μm. The surface of the copper foil 5P that is in close contact with the resin substrate 1P is a rough surface having a ten-point average height Rz of about 0.10 to 7.0 μm.

  Next, as shown in FIG. 2B, the core insulating plate 1 is formed by drilling through holes 3 in the double-sided copper-clad plate 30 by drilling or laser processing. The diameter of the through hole 3 is about 50 to 300 μm. After the through hole 3 is drilled, desmear treatment with an aqueous solution containing potassium permanganate or the like is preferable.

  Next, as shown in FIG. 2 (c), an electroless copper plating layer and an electrolytic copper plating layer are sequentially deposited in the through hole 3 and on the surfaces of the upper and lower copper foils 5P, whereby the inside of the through hole 3 is plated conductor layer. While filling with 4P, the plated conductor layer 4P is formed on the surface of the copper foil 5P. The thickness of the electroless copper plating layer is about 0.1 to 1 μm, and the thickness of the electrolytic copper plating layer is about 5 to 50 μm.

  Next, as shown in FIG. 2 (d), the plated conductor layer 4P deposited on the through hole 3 and the copper foil 5P is placed on the insulating plate 1 for the core so that the copper foil 5P has a thickness of 2 to 15 μm. Polish and flatten so that it remains on the lower surface. Thereby, the through-hole conductor 4 is formed in the through-hole 3.

  Next, as shown in FIG. 2E, an etching resist layer 31 having a pattern corresponding to the through-hole land 5 and the via land 11 is deposited on the copper foil 5P and the through-hole conductor 4. The etching resist layer 31 is formed, for example, by sticking a dry film resist made of a photosensitive resin on the copper foil 5P and the through-hole conductor 4 and exposing and developing the predetermined pattern.

  Next, as shown in FIG. 3F, the copper foil 5P exposed from the etching resist layer 31 is removed by etching. An etching solution containing ferric chloride or the like may be used for etching. At this time, only the copper foil 5 </ b> P corresponding to the through-hole land 5 and the via land 11 remains.

  Next, as shown in FIG. 3G, the etching resist layer 31 remaining on the surface of the portion corresponding to the through-hole land 5 and the via land 11 is peeled and removed.

  Next, electroless copper plating (not shown) is formed on the upper and lower surfaces of the exposed insulating plate 1 for the core, the end surfaces of the through-hole conductors 4, and the surfaces of the through-hole lands 5 and via lands 11 to a thickness of about 0.1 to 1.0 μm. 3 (h), a plating resist layer 32 having an opening pattern having a shape corresponding to the lid plating 6 and the core wiring conductor 7 is deposited on the electroless copper plating. Let

  Next, as shown in FIG. 3I, electrolytic copper plating 6P and 7P having a pattern corresponding to the cover plating 6 and the core wiring conductor 7 is coated on the electroless copper plating layer exposed from the plating resist layer 32. Put on. The thickness of the electrolytic copper plating 6P and 7P is about 10 to 30 μm.

  Next, as shown in FIG. 3 (j), after the plating resist layer 32 is peeled and removed, the electroless copper plating under the plating resist layer 32 is removed by etching, so that the lid plating 6 and the core A wiring conductor 7 is formed. A stripping solution containing sodium hydroxide or the like may be used for stripping the plating resist layer 32. Such a method of forming the lid plating 6 and the core wiring conductor 7 is a so-called semi-additive method, and the plating resist layer 32 is formed when the lid plating 6 and the core wiring conductor 7 are formed. Since only the thickness of the electroless copper plating that is underneath is removed by etching, the lid plating 6 and the core wiring conductor 7 are not greatly etched in the lateral direction. Therefore, it is possible to form the core wiring conductor 7 having a pattern with a wiring width and interval of 30 μm or less.

  Next, as shown in FIG. 4 (k), the resin layer 2P for the insulating layer 2 for build-up is formed so that the upper and lower surfaces of the insulating plate 1 for the core are covered with the cover plating 6 and the wiring conductor 7 for the core. Are laminated. The resin layer 2P is an electrical insulating material containing a thermosetting resin such as an epoxy resin and an inorganic insulating filler such as silica, and has a thickness of 20 to 50 μm. In order to deposit the resin layer 2P on the surface of the core insulating plate 1, for example, a resin film containing an uncured thermosetting resin composition is applied to the surface of the core insulating plate 1 using a vacuum press. What is necessary is just to make it thermoset after sticking to.

  Next, as shown in FIG. 4L, the build-up insulating layer 2 is formed by forming via holes 8 having the bottom surface of the cover plating 6 or the core wiring conductor 7 by laser processing on the resin layer 2P. To do. The diameter of the via hole 8 is about 30 to 100 μm.

  Next, as shown in FIG. 4 (m), the via conductor 9 made of copper plating is filled in the via hole 8, and the build-up formed integrally with the via conductor 9 on the surface of the build-up insulating layer 2 is performed. A wiring conductor 10 is attached. The build-up wiring conductor 10 may be formed using a known semi-additive method.

  Thereafter, as shown in FIG. 4 (n), the build-up insulating layers 2 and the build-up wiring conductors 10 are alternately laminated in the same number as required, and an electronic component is further formed thereon. The wiring substrate 20 is formed by depositing a solder resist layer 13 having an opening through which the connection pad 12 and the external connection pad 14 are exposed. The solder resist layer 13 is made of, for example, an uncured photosensitive resin sheet or resin paste containing a thermosetting resin composition such as an acrylic-modified epoxy resin and an inorganic insulating filler such as silica, as an outermost build-up insulating layer. 2 and the wiring conductor 10 for build-up, and is exposed and developed to a predetermined pattern, and then thermally cured.

  As described above, according to the method for manufacturing a wiring board of the present invention, it is possible to provide a wiring board having fine wiring with a core wiring conductor having a width and interval of 30 μm or less.

  In addition, this invention is not limited to an example of above-mentioned embodiment, A various change is possible if it is a range which does not deviate from the summary of this invention. For example, in FIG. 1 showing an example of the embodiment of the wiring board 20 described above, the through hole 3 is filled only with the through hole conductor 4, but the through hole conductor 4 of the wiring board 40 shown in FIG. Concave portions 4 a are formed at the center portions of the upper and lower ends, and the recessed portions 4 a may be filled with a plating conductor for lid plating 6. In this case, the plating conductor layer 4P for forming the through-hole conductor 4 can be thin. Thereby, the time required for the above-described polishing step can be shortened as compared with the case where the plating conductor layer 4P is thick. In addition, when the thickness of the plated conductor layer 4P is 10 μm or less, the surface of the plated conductor layer 4P is substantially flat, so that the polishing step can be omitted.

  Such a wiring board 40 is formed as follows. First, after the steps of FIGS. 2A to 2B described above, the center portion in the height direction of the through hole 3 is filled with the plated conductor layer 4P as shown in FIG. 6A. At the same time, it is deposited so thin that the recesses 4a are formed at the upper and lower ends of the through hole 3. In this case, the recesses 4a are formed at the upper and lower ends of the plated conductor layer 4P filled in the through hole 3, and the recesses 4a may be filled with electrolytic copper plating 6P described later. Thus, by depositing the conductor layer 4P thinly, the time required for the above-described polishing step can be shortened as compared with the case where the plated conductor layer 4P is thick. In addition, when the thickness of the plated conductor layer 4P is 10 μm or less, the surface of the plated conductor layer 4P is substantially flat, so that the polishing step can be omitted.

Next, as shown in FIG. 6B, after depositing an etching resist layer 31 having a pattern corresponding to the through-hole land 5 and the via land 11 on the conductor layer 4P,
As shown in FIG. 6C, the plating conductor layer 4P exposed from the etching resist layer 31 and the underlying copper foil 5P are removed by etching. As a result, through-hole conductors 4 having recesses 4 a on the upper and lower end surfaces are formed in the through-holes 3, and through-hole lands electrically connected to the through-hole conductors 4 on the upper and lower surfaces around the through-holes 3. 5 is formed.

  Next, electroless copper plating (not shown) is applied to the upper and lower surfaces of the core insulating plate 1 exposed, the end surfaces of the through-hole conductors 4, and the surfaces of the through-hole lands 5 and the via lands 11 while removing the etching resist 31. After being deposited to a thickness of about 1.0 μm, as shown in FIG. 6 (d), an opening pattern having a shape corresponding to the cover plating 6 and the core wiring conductor 7 is formed on the electroless copper plating. A plating resist layer 32 is deposited.

  Next, as shown in FIG. 6 (e), electrolytic copper plating 6P and 7P having a pattern corresponding to the cover plating 6 and the core wiring conductor 7 is coated on the electroless copper plating layer exposed from the plating resist layer 32. Put on. At this time, a part of the electrolytic copper plating 6P is deposited so as to fill the recess 4a. The thickness of the electrolytic copper plating 6P and 7P is about 10 to 30 μm.

  Thereafter, by performing the same steps shown in FIGS. 3 (j) to 4 (n), the core wiring conductor has fine wiring with a width and interval of 30 μm or less as shown in FIG. The wiring board 40 can be provided.

DESCRIPTION OF SYMBOLS 1 Insulation board 3 Through-hole 4 Through-hole conductor 5 Through-hole land 5P Copper foil 7 Wiring conductor 20 Wiring board

Claims (2)

An insulating plate having a through-hole penetrating vertically; a through-hole conductor made of a plated conductor filling the through-hole; and the upper and lower surfaces of the insulating plate around the through-hole so as to be electrically connected to the through-hole conductor A wiring board comprising: a through-hole land made of a copper foil formed by a subtractive method; and a wiring conductor made of a plated conductor formed by a semi-additive method on the upper and lower surfaces of the insulating plate. The hole conductor is filled with the through hole so as to have a recess at the center of the upper and lower ends of the through hole conductor, and the recess is filled with a plating conductor formed simultaneously with the plating conductor forming the wiring conductor. A wiring board characterized by being made . A step of forming a through-hole penetrating vertically in an insulating plate having copper foils on the upper and lower surfaces, a step of filling a through-hole conductor made of a plating conductor in the through-hole, Forming a through-hole land made of the copper foil electrically connected to the through-hole conductor around the through-hole by a subtractive method; and a wiring conductor made of a plated conductor extending on the upper and lower surfaces of the insulating plate Forming a semiconductor substrate by a semi-additive method , wherein in the step of filling the through-hole conductor, a height in the through-hole is formed so that recesses are formed at both upper and lower ends of the through-hole. In the step of filling the central portion in the vertical direction with the through-hole conductor and forming the wiring conductor, the concave portion Method for manufacturing a wiring board, which comprises filling a plating conductor formed simultaneously with plating conductor forming the body.

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