JP5747743B2 - Method for manufacturing light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a light emitting device by dividing a semiconductor wafer to obtain a light emitting device.

  In the semiconductor process, a large number of semiconductor element portions (light emitting element portions) aligned on a semiconductor wafer are simultaneously formed by using photolithography, vacuum vapor deposition, or the like. A divided region for dividing the light emitting element portion is formed between the simultaneously formed light emitting element portions, and a dividing line along the center of the divided region is cut vertically and horizontally by dicing or the like, thereby obtaining the light emitting element. The part is divided into individual rectangular semiconductor chips (light emitting elements).

  Further, in the manufacture of a light emitting device using a nitride semiconductor such as gallium nitride (GaN), a device using a sapphire substrate having high transparency with respect to the emission wavelength is known. However, sapphire having a high hardness is not easily processed as compared with a substrate such as silicon, and it is difficult to divide a semiconductor wafer into individual elements, and the division becomes even more difficult when the substrate is thick.

  Thus, for example, Patent Document 1 describes a method of dividing the sapphire substrate after grinding the back surface to reduce the thickness of the substrate. Further, Patent Document 2 describes a method in which a separation groove is formed in a divided region of a sapphire substrate by a dry etching method, and a scribe line is drawn at the center of the separation groove for division.

  In addition, the area of the light emitting element is reduced in order to reduce the cost of the light emitting element. As the size of the light emitting element is reduced, the area of the divided region in the semiconductor wafer is increased. For this reason, in order to increase the number of light emitting elements to be taken on the semiconductor wafer, there has been a problem of how to effectively narrow the divided regions.

  Therefore, for example, in Patent Document 3, a semiconductor wafer is formed such that the width of the vertical division region and the width of the horizontal division region are different from each other, and the division region in the direction extending along the long side of the semiconductor element. It is described that the width is narrowed (the width of a short side is wide). Patent Document 4 describes a semiconductor wafer in which the width of a dicing line having an alignment mark for a stepper is widened. Further, Patent Document 5 discloses that the width of the divided region along the short side is reduced by arranging the semiconductor element portion along the horizontal direction so that chipping of the semiconductor wafer is less likely to occur in the horizontal direction. Narrowing is described.

JP 2003-218388 A JP-A-10-27769 Japanese Patent Laid-Open No. 11-233458 JP 2000-124158 A JP 2002-246334 A

However, the conventional techniques have the following problems.
When a semiconductor wafer in which a GaN-based semiconductor is stacked on a sapphire substrate having a C-plane as a main surface is divided, it is targeted for cleaving due to the influence of the crystallinity of the sapphire such as the R-plane existing in an oblique direction with respect to the main surface of the substrate. There is a deviation between the cleaving start point on one surface side that is the position and the cleaving position that is the cleaved position on the other surface side. That is, when the semiconductor wafer is divided, the sapphire substrate is divided obliquely in a cross-sectional view of the semiconductor wafer with respect to the thickness direction of the semiconductor wafer from the split starting point of the divided region in a predetermined crystal direction. This shift affects the characteristics of the light emitting element and the number of light emitting elements.

  However, in the above-described conventional technology, the width of a predetermined divided region is narrowed in order to increase the number of light emitting elements to be taken and in order not to deteriorate the mechanical strength of the light emitting elements. Not. For this reason, the splitting position becomes too close to the light emitting element due to the shift at the time of division, so that the appearance of the light emitting element is deteriorated, and the active layer of the light emitting element portion is damaged due to the shift. There is a problem that output is reduced and leakage occurs.

  On the other hand, in the light-emitting element, when the thickness of the substrate is thicker, the number of times the light traveling in the substrate is reflected at the upper and lower interfaces of the substrate before being taken out from the substrate is reduced. For this reason, it is known that the amount of light absorbed in the substrate is reduced, and as a result, the light extraction efficiency of the light emitting element is improved. Further, when a nitride semiconductor with a high film thickness is made into a chip, it has been desired to increase the thickness of the substrate in order to ensure the mechanical strength of the chip. However, when the substrate is thickened, the problem of deviation between the cleaving base point and the cleaving position of the above-described divided area becomes even greater.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a light-emitting element that can reduce adverse effects on the light-emitting element due to cleaving when the semiconductor wafer is divided.

  In order to solve the above-described problems, a method for manufacturing a light emitting device according to the present invention includes an n-type nitride semiconductor layer and a p-type nitride semiconductor layer stacked in this order on a sapphire substrate having a C-plane as a main surface. Then, a plurality of rectangular light emitting element portions are aligned in the vertical and horizontal directions, and the width of the horizontal division region divided along the direction parallel to the intersection line of the A surface of the sapphire substrate and the main surface is The n-side electrode of the light emitting element portion is arranged on at least one side of the vertical division region, which is narrower than the width of the vertical division region divided along the direction perpendicular to the intersecting line between the A plane and the main surface. A method of manufacturing a light emitting device by dividing a semiconductor wafer into a light emitting device, comprising: a wafer manufacturing step for manufacturing the semiconductor wafer; and a wafer splitting step for splitting the manufactured semiconductor wafer, the wafer splitting step In the sapphire substrate A stealth laser process that forms a dissolved region or an altered region inside the sapphire substrate by multi-photon absorption by irradiating with a converging point of the laser light, and from the center line in the width direction of the longitudinally divided region to the width direction. At a line position shifted by a predetermined distance to one side, the strip-shaped dissolved region or the altered region having a predetermined height in the thickness direction of the sapphire substrate is stretched in the longitudinal direction of the longitudinally divided region. It forms as a groove | channel, The said semiconductor wafer is divided | segmented by using the said internal cleavage groove | channel as a cleaving origin.

  According to this manufacturing method, in the semiconductor wafer manufactured in the wafer manufacturing process, the width of the horizontal division region is narrower than the width of the vertical division region, thereby increasing the number of light emitting elements or the area of the active layer region. Is intended. Here, it is necessary to ensure the width | variety in which the vertical division area considered diagonally cracking from the cleaving starting point set to the back surface side of a sapphire substrate to the cleaving position in the main surface side. Therefore, the cleaving start point of the sapphire substrate is shifted to a line position shifted by a predetermined distance from the center line so that the cleaving position on the main surface side approaches the center line. Furthermore, in the part where the internal cleavage groove is formed by forming a band-shaped internal cleavage groove having a predetermined height in the thickness direction of the sapphire substrate along the line position of the cleavage starting point inside the sapphire substrate, Since it is cleaved perpendicular to the main surface, the amount of deviation from the cleaving start point of the cleaving position is reduced by cracking diagonally. Further, since the n-side electrode is arranged on the vertical division region side, as a result, the active layer region arranged on the vertical division region side is reduced. For this reason, the damage which a light emitting element part receives is reduced.

  In the method for manufacturing a light-emitting element according to the present invention, a plurality of convex portions are formed on the sapphire substrate, and the top portions of the convex portions have the same shape and face the same direction in plan view. When the acute angle of the polygon in the horizontal direction in the vertical and horizontal directions is directed to the left side, the line position is shifted to the right side of the center line, and the polygon is oriented to the right side. The line position is shifted to the left of the center line.

  According to such a manufacturing method, the line position of the cleaving start point is determined on either the left or right side of the center line corresponding to the direction of the top of the polygon in the convex part.

  In the method for manufacturing a light-emitting element according to the present invention, the n-side electrode of the light-emitting element unit is disposed on the side where at least the n-side electrode is close to the line position in the vertically divided regions on both sides. preferable.

  According to this manufacturing method, since the n-side electrode that has less influence on the light emission output due to the damage is arranged on the side where the light emitting element portion is more likely to be damaged by cleaving, the damage as the light emitting element portion is reduced.

  The light emitting element manufacturing method according to the present invention is characterized in that the light emitting element portion is rectangular in a plan view, and a short side of the rectangle is formed in parallel with the vertical division region.

  According to such a manufacturing method, since there is a rectangular short side of the light emitting element portion on the side of the vertically divided region where damage to the light emitting element portion is more likely to occur due to cleaving, damage to each light emitting element portion due to cleaving of the vertically divided region is reduced. Is done. In addition, since the number of vertically divided regions is reduced by setting the vertically divided regions that need to have a wide width to the short side, the number of light emitting elements taken per semiconductor wafer or the active layer region of each light emitting element Increases the area.

  In the method for manufacturing a light-emitting element according to the present invention, the irradiation with the laser light is incident from the back side of the sapphire substrate, and the internal cleavage groove is separated by 70 μm or more from the main surface in the thickness direction of the sapphire substrate. It is preferable to form at a different position.

  According to this manufacturing method, the amount of laser light applied to the semiconductor layer is reduced, and the internal cleavage groove is formed while reducing damage to the semiconductor layer.

  In the method of manufacturing a light emitting device according to the present invention, the internal cleaving groove is irradiated with the laser light by sequentially shifting the position of the condensing point of the laser light in the thickness direction of the sapphire substrate in a plurality of stages. It is characterized by forming.

  According to this manufacturing method, the wide internal cleaving grooves are formed so as to stack the narrow internal cleaving grooves in the thickness direction. As a result, a wide internal cleaving groove is formed in the thickness direction without increasing the irradiation intensity of the laser beam and, therefore, without increasing damage to the semiconductor layer.

The method for manufacturing a light-emitting device according to the present invention is a plan view of the n-type nitride semiconductor layer and the p-type nitride semiconductor layer on the main surface side of the vertical division region and the horizontal division region of the semiconductor wafer. It is preferable to form a main surface cleaving groove, which is a cleaving groove exposing the sapphire substrate, in a region including a cleaving position on the main surface of the sapphire substrate when divided from the cleaving starting point.

  According to this manufacturing method, the exposed surface of the sapphire substrate in the main surface cutting groove is the cutting position. At this time, since the semiconductor layer at the cleaving position is removed, the semiconductor wafer is cleaved without cracking due to cleaving reaching the semiconductor layer.

  The method for manufacturing a light emitting device according to the present invention includes a semiconductor wafer sandwiched between blocks along the extending direction of the internal cleaving groove, and the back surface of the sapphire substrate at the end of the semiconductor wafer protruding from the block. In the breaking step of cleaving the semiconductor wafer by applying an impact using a blade extending parallel to the extending direction of the internal cleaving groove on the side, in a plane parallel to the main surface of the sapphire substrate of the block The semiconductor wafer is sandwiched between the blocks so that the line position of the internal cutting groove is centered in a plan view in the width direction that is a direction perpendicular to the extending direction.

  According to this manufacturing method, the impact applied to the edge of the semiconductor wafer by using a blade acts on the internal cleaving groove sandwiched between the upper and lower blocks on the basis of the lever using one side of the lower block as a fulcrum. Then, the semiconductor wafer is cleaved.

  The light emitting device manufacturing method according to the present invention includes two blocks extending parallel to the extending direction of the internal cleaving groove and spaced apart from each other, with the main surface side of the sapphire substrate facing downward, and the internal cleaving The semiconductor wafer is placed on the two blocks such that the line position of the groove is in the center of the separated space of the two blocks, and the back surface side of the sapphire substrate at the line position of the internal cutting groove The semiconductor wafer is divided by applying a load using a blade.

  According to this manufacturing method, the semiconductor wafer is supported at three points in cross-sectional view by the two blocks spaced apart on the lower side and the blade on the back side of the sapphire substrate. Then, by applying a weight to the blade, the semiconductor wafer is cleaved so as to be bent from the central portion with one side of each of the two lower blocks as a fulcrum.

  In the method for manufacturing a light-emitting element according to the present invention, it is preferable that a flexible sheet is bonded to both sides of the semiconductor wafer, and then the division using the blade is performed.

  According to this manufacturing method, the flexible sheet bonded to both sides of the semiconductor wafer prevents the chips to be divided, the chips flying, and the sheet itself from being broken when breaking using a blade.

  In the method for manufacturing a light emitting device according to the present invention, the thickness of the sapphire substrate is preferably 160 μm or more.

  According to this manufacturing method, a light emitting device having a thick substrate is manufactured.

  According to the method for manufacturing a light-emitting element according to the present invention, while reducing damage to the light-emitting element part due to cleaving, the number of light-emitting elements with a thick substrate is increased per wafer, or the active layer region per light-emitting element The area can be increased.

  In addition, according to the method for manufacturing a light emitting element according to the present invention, the convex portion is formed on the sapphire substrate, so that the light extraction efficiency to the outside of the manufactured light emitting element is improved. In addition, since the direction of shifting the cutting start point can be determined without trial splitting of the semiconductor wafer, the light emitting elements can be divided without waste.

In addition, according to the method for manufacturing a light emitting element according to the present invention, it is possible to manufacture a light emitting element having a good light emission output because damage to the light emitting element due to cleaving is reduced.
In addition, according to the method for manufacturing a light emitting element according to the present invention, since damage in each light emitting element due to the splitting of the vertically divided regions is reduced, a light emitting element having a good light emission output can be manufactured. In addition, since the number of light emitting elements per semiconductor wafer or the area of the active layer region of each light emitting element increases, the manufacturing cost of the light emitting element can be reduced, or a light emitting element with high light output can be manufactured. Can do.

  In addition, according to the method for manufacturing a light-emitting element according to the present invention, a light-emitting element having a good light-emission output can be manufactured in order to reduce the amount of laser light applied to the nitride semiconductor layer and reduce damage to the semiconductor layer. Can do.

  In addition, according to the method for manufacturing a light emitting element according to the present invention, a wide internal cleaving groove can be formed in the thickness direction without increasing the damage to the semiconductor layer, so that the substrate is thick and the light emission output is good. A light emitting element can be manufactured.

  Further, according to the method for manufacturing a light emitting element according to the present invention, since the semiconductor wafer is cleaved without cracking due to cleaving on the semiconductor layer, a light emitting element having a good light emission output can be produced.

In addition, according to the method for manufacturing a light emitting element according to the present invention, the semiconductor wafer is cleaved by applying a strong force to the cleaving starting point according to the lever principle, so that even when the substrate is thick, it can be cleaved well. .
In addition, according to the method for manufacturing a light emitting element according to the present invention, the semiconductor wafer is cleaved in a form supported at three points, so that the semiconductor wafer can be cleaved with high accuracy.

  In addition, according to the method for manufacturing a light emitting device according to the present invention, when breaking using a blade, the divided chips are prevented from floating, the chips flying and the sheet itself being torn, so the light emitting devices can be manufactured with good yield. Can be manufactured.

  Further, according to the method for manufacturing a light-emitting element according to the present invention, a light-emitting element having a thick substrate is manufactured. Therefore, a light-emitting element having high mechanical strength and high light extraction efficiency is manufactured. be able to.

(A) is a schematic plan view which shows the structure of the semiconductor wafer used for embodiment of this invention, (b) is a schematic plan view of a light emitting element. It is a flowchart which shows the flow of a process of the manufacturing method which concerns on embodiment of this invention. In the sapphire substrate used for embodiment of this invention, (a) is a typical perspective view which shows the structure of a sapphire crystal, (b) is a typical top view which shows the aggregate | assembly of a sapphire crystal. In the semiconductor wafer used for embodiment of this invention, it is a typical top view which shows the structure of a light emitting element part and a division area. In the sapphire substrate used in the embodiment of the present invention, (a) is a schematic plan view showing the shape of a convex part and the direction of the top part, and (b) is a schematic perspective view showing a state of cleaving in an oblique direction. In the sapphire substrate used in the embodiment of the present invention, (a) is a schematic plan view showing the shape of a convex part and the direction of the top part, and (b) is a schematic perspective view showing a state of cleaving in an oblique direction. It is a figure for demonstrating the mode of cleaving of the sapphire substrate used for embodiment of this invention, (a) when not forming an internal cleaving groove in a board | substrate, (b) when forming an internal cleaving groove in a board | substrate It is typical sectional drawing which shows the mode of cleaving. In the semiconductor wafer used in the embodiment of the present invention, (a) to (d) are schematic planes for explaining the width of the divided regions, the arrangement of the light emitting element portions, the area of the active layer region, and the crushing influence range. FIG. It is a flowchart which shows the flow of a process of the wafer division | segmentation process in the manufacturing method which concerns on embodiment of this invention. It is typical sectional drawing which shows a part of process in the manufacturing method which concerns on embodiment of this invention, (a) And (b) shows a main surface breaking groove formation process, (c) shows a board | substrate back surface grinding | polishing process. It is typical sectional drawing which shows a part of process in the manufacturing method which concerns on embodiment of this invention, (a) shows a 1st sheet bonding process, (b)-(d) shows an internal cutting groove formation process. It is typical sectional drawing which shows a part of process in the manufacturing method which concerns on embodiment of this invention, (a) shows the mode after completion of an internal cleaving groove formation process, (b) is the elements on larger scale. It is typical sectional drawing which shows a part of process in the manufacturing method which concerns on embodiment of this invention, (a) shows a 2nd sheet bonding process, (b) shows a breaking process. It is typical sectional drawing which shows a part of process in the manufacturing method which concerns on embodiment of this invention, (a) is a mode after the completion of a breaking process, (b) shows a sheet | seat peeling process. It is typical sectional drawing which shows the modification of the breaking process in the manufacturing method which concerns on embodiment of this invention. It is a schematic plan view which shows the structure of the light emitting element part and a division area in the semiconductor wafer used for other embodiment of this invention. 4 is a graph showing the relationship between the thickness of a substrate and the light emission output in a light emitting device according to an example of an embodiment of the present invention.

Hereinafter, a method for manufacturing a light emitting device according to an embodiment of the present invention will be described with reference to the drawings. Note that the size, positional relationship, and the like of the members shown in each drawing may be exaggerated for clarity of explanation. Furthermore, in the following description, the same names and symbols indicate the same or the same members in principle, and detailed description will be omitted as appropriate.
In principle, each drawing has an orientation flat (hereinafter referred to as an orientation flat) (hereinafter referred to as orientation flat) (A surface) below or in front of the drawing (however, in FIG. 3A, the dark portion is the A surface). Further, in the case of explaining the direction in the present embodiment, when the orientation flat is down or in front of the paper surface, the left side with respect to the paper surface is “left” and the right side with respect to the paper surface is “right”.

<Method for Manufacturing Semiconductor Light Emitting Element>
As shown in FIGS. 1 (a) and 1 (b), the method for manufacturing the light-emitting element 3 includes a gallium nitride (GaN) based semiconductor (nitride semiconductor) on a sapphire substrate 1 having a C-plane as a main surface (front surface). A semiconductor wafer 100 in which a plurality of rectangular light emitting element portions 2 are aligned and arranged in the vertical and horizontal directions is provided on the −C surface (back surface) side of the sapphire substrate 1 with the cleavage starting points 42 and 51 (see FIG. 4). This is a method of manufacturing the light emitting element (semiconductor chip) 3 by dividing.

  As shown in FIG. 2, the method for manufacturing the light emitting element 3 in the embodiment of the present invention includes a wafer manufacturing process S <b> 1 for manufacturing the semiconductor wafer 100 and a wafer dividing process for dividing the semiconductor wafer 100 into chips of the individual light emitting elements 3. S2 is included. Here, the vertical and horizontal directions are the vertical direction and the parallel direction with respect to the line of intersection between the A plane and the C plane of the sapphire substrate 1 in the main surface (plan view) of the sapphire substrate 1. The horizontal direction. Further, as shown in FIG. 1, the sapphire substrate 1 having the A plane as the orientation flat 1c is easy to understand. Therefore, the embodiment will be described with the orientation flat 1c.

  Before describing each process, the configuration of the semiconductor wafer 100 will be described.

[Semiconductor wafer]
As shown in FIG. 1A, a semiconductor wafer 100 includes a plurality of rectangular light emitting element portions 2 arranged in a vertical and horizontal direction on a sapphire substrate 1 and an orientation flat 1 c of the sapphire substrate 1. A horizontal division region 5 that is divided along a direction parallel to the intersection line between the A surface and the C surface that is the main surface, and a vertical division region 4 that is divided along a direction perpendicular to the intersection line between the A surface and the C surface. (The vertical division region 4 and the horizontal division region 5 are hereinafter referred to as division regions 4 and 5 as appropriate).

(Sapphire substrate)
As shown in FIGS. 3A and 3B, the sapphire substrate 1 is made of an aggregate of sapphire crystals 10 having a predetermined sapphire crystal structure, and has a C plane as a main surface. The sapphire substrate 1 has a direction (breaking direction) that is easy to break due to the crystallinity of sapphire. The arrow in FIG. 3B indicates the direction in which the sapphire substrate 1 is easily cracked. For example, the crack is likely to occur along the thick line in FIG.

  The direction perpendicular to the A plane (11-20) is the direction in which the crack is easily caused, and the vertical division region 4 is formed along this direction, that is, the crystal orientation <11-20>. On the other hand, the direction parallel to the A-plane (11-20) (perpendicular to the M-plane (1-100)) is the direction in which cracking is difficult, and the horizontal division region 5 along this direction, that is, the crystal orientation <1-100>. Form. When the semiconductor wafer 100 is divided, chipping occurs in the crystal orientation <11-20> direction, that is, in the direction along the vertical division region 4 with respect to the crystal orientation <1-100> direction. Likely to happen.

  In addition, an orientation flat (orientation flat) 1c that is linearly cut parallel to the crystal orientation <1-100> direction is provided. Usually, since the A plane is the orientation flat surface and parallel to the crystal orientation <1-100> direction, the vertical division region 4 and the horizontal division region 5 are determined using the orientation flat 1c as an index.

Here, as shown in FIG. 5A and FIG. 6A, it is preferable that a plurality of convex portions 11 are formed on the sapphire substrate 1.
In the semiconductor wafer 100, when the sapphire substrate 1 having the C-plane as the main surface and the A-plane as the orientation flat 1c is used, a predetermined pattern is formed on the main surface 1a depending on the mask pattern shape and etching conditions (etchant type, etching time, etc.). The convex part 11 having a shape can be formed.

  In the case of a semiconductor light emitting device having a flat sapphire substrate 1, the light propagating in the lateral direction in the semiconductor layer is partially absorbed by the semiconductor layer and the electrode while propagating, and attenuated before exiting the semiconductor layer. To do. However, when the convex portion 11 is provided, the luminous flux upward or downward of the sapphire substrate 1 is increased due to the light scattering / diffraction effect of the convex portion 11, and the luminance when the light emitting surface of the light emitting element is observed from the front (= Front luminance) can be increased. Further, the light scattering / diffraction effect by the convex portion 11 can reduce light propagating in the lateral direction in the semiconductor layer, reduce absorption loss during propagation, and increase the total amount of light emission. Moreover, even if the protrusions 11 are formed on the main surface 1a of the sapphire substrate 1, crystal defects due to the protrusions 11 hardly grow on the semiconductor layer, so that the high external quantum efficiency can be stably secured.

  And the convex part 11 is carrying out the shape of the polygon in which all the convex parts 11 have the same shape by planar view, and one of the acute angles of the top part 11a faced the same direction. Examples of polygons include triangles, pentagons, and preferably regular triangles. In addition, making convex part 11 into a polygon means that the shape of planar view of top part 11a which is the upper surface of convex part 11 makes a polygon, and even if the bottom face shape of convex part 11 is circular or a polygon. Good. Moreover, about the cross-sectional shape of the convex part 11, it is preferable that it is a trapezoid. By setting it as such a cross-sectional shape, light scattering and diffraction efficiency can be improved. Note that the planar shape and the cross-sectional shape of the convex portion 11 do not need to be geometrically perfect polygons or trapezoids, and the corners may be rounded for reasons of processing.

  The direction of one acute angle of the polygonal top portion 11a tends to coincide with the direction parallel to the intersecting line between the A plane and the C plane, and the acute angle of the top portion 11a faces either the left or right side. Tend. Then, as will be described later, the line position of the cleaving start point 42 can be determined on either the left or right side of the center line 41 in accordance with the acute angle direction of the polygon. In manufacturing, the size of the protrusions 11 and the interval between them are preferably 10 μm or less. Further, the thickness is preferably 5 μm or less because the scattering surface increases.

  The method for forming the convex portion 11 on the sapphire substrate 1 is not particularly limited, and can be formed by a method known in the art. For example, a method of performing etching such as dry etching or wet etching, which will be described later, using a mask pattern having an appropriate shape may be mentioned. Among these, wet etching is preferable. Examples of the etchant include a mixed acid of sulfuric acid and phosphoric acid, KOH, NaOH, phosphoric acid, potassium pyrosulfate, and the like.

The shape of the convex portion 11 can be controlled by appropriately adjusting the shape of the mask pattern to be used, the etching method and conditions, for example. The material and shape of the mask pattern at this time can be formed by, for example, an insulating film (resist, SiO _2, etc.), and examples thereof include a polygonal repeating pattern such as a circle, an ellipse, a triangle, or a rectangle. Formation of such a mask pattern can be realized by a known method such as photolithography and an etching process.

  As an etching method for forming the mask pattern, for example, a method known in the art such as dry etching or wet etching can be used. For example, examples of dry etching include reactive ion etching, reactive ion beam etching, ion milling, focused ion beam etching, and ECR (electron cyclotron resonance) etching. Examples of the wet etching etchant are the same as those described above.

(Light emitting element)
As shown in FIG. 1A, the light emitting element section 2 is formed by laminating a GaN-based semiconductor on a sapphire substrate 1 and arranging a plurality of them in the vertical and horizontal directions of the sapphire substrate 1. The shape of the light emitting element portion 2 is a rectangular shape in a top view, and is a rectangle here, and the short side of the rectangle is formed in parallel with the vertical division region 4. With such a configuration, since the rectangular short side of the light emitting element portion 2 is on the vertical division region 4 side, the light emitting layer of the light emitting element portion 2 by the cleaving of the vertical division region 4, that is, the active layer 24 (FIG. 10A ( Damage to the active layer region 26 (see FIG. 4), which is a region having a), is reduced, and the influence on the light emission output due to cleaving (breaking influence) is reduced. Further, in order to reduce the width of the horizontal division region 5, when the light emitting element portion 2 is enlarged correspondingly, the active layer region 26 (as compared with the case where the long side of the rectangle is formed in parallel with the vertical division region 4). The area of (see FIG. 4) can be increased. Further, when the light emitting element portions 2 are arranged in the vertical direction, the number of the light emitting elements 3 can be increased. However, depending on the size of the semiconductor wafer 100 and the size and number of the light emitting element portions 2, the short sides of the rectangle may be formed in parallel with the vertical division region 4, and as described later, the light emitting element portion The shape of 2 may be square in plan view.

  Further, as shown in FIG. 4, the n-side electrode 21 of the light emitting element portion 2 is disposed on at least one side of the vertical division region 4 side. Since the vertical division region 4 is likely to be chipped when the wafer is divided, the active layer regions 26 on both sides of the light emitting element portion 2 in contact with the vertical division region 4 are liable to be damaged. However, since the active layer 24 (see FIG. 10A (a)) does not exist in the region where the n-side electrode 21 exists, the active layer on the vertical division region 4 side can be obtained by arranging the n-side electrode 21 on the vertical division region 4 side. The range of the region 26 is reduced, and damage to the active layer 24 (see FIG. 10A (a)) is reduced.

  Here, the n-side electrode 21 is located at the line position of the cleaving start point 42 that is shifted by a predetermined distance from the center line 41 in the width direction of at least the vertical division region 4 to one side in the width direction of the vertical division regions 4 on both sides. It is preferable that it is arrange | positioned at the near side. In the present embodiment, the cleaving start point 42 in the vertical division region 4 is set on the back surface side of the sapphire substrate 1, and the cleaving position 43 is set on the main surface side of the sapphire substrate 1. Therefore, the cleaving position 43 on the main surface (front surface) side of the sapphire substrate 1 is shifted in the direction of the center line 41 from the cleaving starting point 42 in plan view.

  In the present embodiment, laser light that is absorbed by multiple photons is irradiated from the back surface side of the sapphire substrate 1 along the line position of the cleavage starting point 42, and at least on the back surface side in the thickness direction of the sapphire substrate 1. A cleaving groove (internal cleaving groove 7, see FIG. 7B) is formed inside the C surface, which is the main surface, substantially perpendicularly. For this reason, only the part which does not form the cleaving groove in the sapphire substrate 1 is cleaved obliquely. Details of the laser irradiation and the cutting groove will be described later.

  In the vertical division region 4, the active layer 24 (see FIG. 10A) of the light emitting element portion 2 on the side shifted from the cleaving start point 42 has a shorter distance from the line position of the cleaving start point 42 in plan view. The laser beam irradiated from the back surface side of the sapphire substrate 1 along the line position of the cleaving starting point 42 is more susceptible to damage such as alteration (cleaving influence). The vertical side of the light emitting element portion 2 where the n-side electrode 21 is present has fewer active layer regions 26 as much as the n-side electrode 21 is present. Therefore, of the vertical divided regions 4 on both sides, By disposing the n-side electrode 21 on the side closer to the line position of the cleaving start point 42 shifted by a predetermined distance from the center line 41 to one side in the width direction, damage to the active layer region 26 is further reduced and cleaving. The range of influence can be reduced. The n-side electrode 21 may be disposed only on the side close to the line position described above, or may be disposed on both sides of the vertical division region 4.

(Division area)
As shown in FIG. 1A, the divided regions 4 and 5 are regions for dividing the light emitting element portion 2 from the semiconductor wafer 100, and in the plan view, the A plane that is the orientation flat 1c of the sapphire substrate 1; A horizontally divided region 5 that divides along a direction parallel to the line of intersection with the C surface that is the main surface; a vertical divided region 4 that divides along a direction perpendicular to the line of intersection of the A surface and the C surface; Consists of. In the divided areas 4 and 5, the width β of the horizontal divided area 5 is set to be narrower than the width α of the vertical divided area 4. In this way, by reducing the width β of the laterally divided region 5 that is less likely to cause chipping and can be cut substantially perpendicular to the main surface, the number of light emitting elements 3 or the active layer region 26 (see FIG. 4). ) Area can be increased. Further, since the width α of the vertical division region 4 is not reduced, damage to the light emitting element portion 2 can be reduced. The widths α and β of the divided regions 4 and 5 vary depending on the size of the semiconductor wafer 100 and the light emitting element 2 and the thickness of the sapphire substrate 1, for example, 15 to 70 μm in the vertical divided region 4 and in the horizontal divided region 5. 10-60 μm.

Here, with reference to FIG. 7, the state of cleaving in the vertical division region 4 in the present embodiment will be described.
As described above, in the vertical division region 4, as shown in FIG. 7A, the sapphire substrate 1 has a main surface (front surface, C surface) from the cleaving start point 42 of the back surface (−C surface) 1 b of the sapphire substrate 1. It is cleaved diagonally over the cleaving position 43 of 1a. Therefore, when the thickness of the sapphire substrate 1 is increased, it is necessary to ensure a wide width α (see FIG. 1A) of the vertical division region 4.

  Therefore, in the present embodiment, as shown in FIG. 7B, the internal cleaving that extends in a direction substantially perpendicular to the main surface 1 a of the sapphire substrate 1 in a cross-sectional view as viewed from the extending direction of the vertical division region 4. The grooves 7 are formed inside the sapphire substrate 1 and only the upper and lower thickness portions where the internal cutting grooves 7 are not formed are cut obliquely. Thereby, in the thickness direction of the sapphire substrate 1, the portion where the internal cleaving groove 7 is formed is cleaved substantially perpendicular to the main surface 1 a, so that the deviation between the cleaving start point 42 and the cleaving position 43 is reduced. Thus, the width of the vertical division region 4 can be reduced by that amount. Moreover, since the thickness of the sapphire substrate 1 to be cut by the breaking that applies an impact or a load is substantially reduced by forming the internal cleaving groove 7, the cleaving can be easily and stably cleaved.

The internal cleaving groove 7 is formed by stealth laser processing that irradiates the inside of the sapphire substrate 1 with laser light and processes it as a melting region or a modified region along the line position of the cleaving starting point 42. The laser beam for performing such processing is transparent with respect to the sapphire substrate 1, but at a condensing point in which the laser beam is condensed using a condensing lens to be in a high energy density state, by multiphoton absorption. Then, the inside of the sapphire substrate 1 is dissolved or altered. As such a laser beam, various laser beams such as a laser that generates a pulse laser and a continuous wave laser that can cause multiphoton absorption can be used. Among these, a laser that generates a pulse laser such as a femtosecond laser, a picosecond laser, or a nanosecond laser is preferable. The wavelength is not particularly limited, and various types such as Nd: YAG laser, Nd: YVO ₄ laser, Nd: YLF laser, and titanium sapphire laser can be used.

Here, the laser light irradiation is performed from the back surface 1b side of the semiconductor wafer 100 in consideration of absorption in the semiconductor layer 20 (see FIG. 10A), and the semiconductor layer 20 (see FIG. 10A (a)). ), i.e., it performed from the main surface 1a of the sapphire substrate 1 at a predetermined distance gamma ₁ or more away. In this manner, by avoiding laser light irradiation to the semiconductor layer 20, particularly the active layer 24 (see FIG. 10A (a)), it is possible to minimize a decrease in light emission efficiency due to the alteration of the semiconductor layer 20. it can. The above-mentioned distance γ ₁ is preferably about 70 μm so as to avoid the influence on the semiconductor layer 20 and to prevent the vertical division region 4 from becoming too wide due to the sapphire substrate 1 being obliquely cleaved. .

The internal Waridanmizo 7 is preferably formed to near as possible to the rear surface 1b of the sapphire substrate 1, a distance gamma ₂ to the back surface 1b, for example, it may be about 10 to 60 [mu] m.

Next, with reference to FIG. 8 and Table 1, the width of the divided regions 4 and 5, the arrangement of the light emitting element portion 2, the area of the active layer region 26, and the cleavage influence range will be described.
Here, in the spreadsheet software, the light emitting element part 2 in the form of FIGS. 8A to 8D is drawn on a cell made of a large number of grid squares, and the cell is a unit of distance or area. By measuring the number of cells, the width of the divided regions 4 and 5, the arrangement of the light emitting element portion 2, and the like, the area of the active layer region 26, and the cleavage influence range were considered.

  In FIG. 8A, the width of the vertical division region 4 and the width of the horizontal division region 5 are the same, and the light emitting element portion 2 is vertically long (the long side is parallel to the vertical division region 4). FIG. 8B shows a case where the width of the horizontal division region 5 is narrowed and the light emitting element portion 2 is vertically long (the long side is parallel to the vertical division region 4). 8C, the width of the horizontal division region 5 is narrowed, the light emitting element portion 2 is horizontally long (the long side is parallel to the horizontal division region 5), and the n-side electrode 21 is connected to the vertical division regions 4 on both sides. Among them, the n-side electrode 21 is disposed only on the side opposite to the side close to the line position of the cleaving starting point 42. 8D, the width of the horizontal division region 5 is narrowed, the light emitting element portion 2 is horizontally long (the long side is parallel to the horizontal division region 5), and the n-side electrode 21 is connected to the vertical division regions 4 on both sides. Among these, the n-side electrode 21 is disposed only on the side close to the line position of the cleaving starting point 42. 8A to 8D, the cleaving start point 42 is on the back surface of the semiconductor wafer 100, and the cleaving position 43 is on the front surface (C surface). Further, the crushing influence range is greatly influenced by laser light irradiation when forming the internal cleaving groove 7 (see FIG. 7B), and the vertical side of the light emitting element portion 2 is close to the line position of the cleaving start point 42. Because this side is more susceptible to cleaving, this side was considered.

  As shown in Table 1, the active layer that can be formed per unit area of the semiconductor wafer when the width of the horizontal division region 5 is narrowed as shown in FIGS. 8B to 8D as compared with FIG. The area of the region 26 can be increased. Further, if the width of the vertical division region 4 is the same as shown in FIGS. 8A to 8D, the distance in plan view from the cleaving start point 42 to the active layer region 26 is the same. 8B, since the area of the active layer region 26 is increased in FIG. 8B, the cleaving influence range is slightly larger. However, as shown in FIG. If the 4 side is a short side, the crushing influence range can be reduced. Further, as shown in FIG. 8D, if the n-side electrode 21 is disposed only on the side close to the line position of the breaking start point 42, the activity close to the line position of the breaking start point 42 is present due to the presence of the n-side electrode 21. Since the layer region 26 is reduced, the cleavage influence range can be further reduced.

  Next, each process of the manufacturing method of the light emitting element 3 shown in FIG. 2 is demonstrated.

<Wafer manufacturing process>
The wafer manufacturing process S1 is a process for manufacturing the semiconductor wafer 100.
The semiconductor wafer 100 shown in FIG. 1 is manufactured in accordance with a conventionally known method, for example, by using a GaN-based semiconductor on one surface (C surface) of the sapphire substrate 1 provided with the orientation flat 1c using photolithography, vacuum deposition, or the like. This is done by stacking and arranging a plurality of rectangular light emitting element portions 2 in the vertical and horizontal directions.

  For example, as illustrated in FIG. 10A, the light emitting element unit 2 includes a semiconductor layer 20 in which an n-type semiconductor layer 23, an active layer 24, and a p-type semiconductor layer 25 are sequentially stacked on the main surface 1 a of the sapphire substrate 1. The p-type semiconductor layer 25, the active layer 24, and the n-type semiconductor layer 23 are partially removed by etching in a partial region of the upper surface of the semiconductor layer 20, and the n-type semiconductor layer 23 is exposed. An n-side electrode 21 (see FIG. 4) that is a pad electrode is formed on the exposed surface. An active layer region 26 (see FIG. 4), which is a region where the p-type semiconductor layer 25 and the active layer 24 have not been removed, includes a full-surface electrode (not shown) covering substantially the entire upper surface of the p-type semiconductor layer 25, and A p-side electrode 22 (see FIG. 4), which is a pad electrode, is formed on a part of the upper surface of the entire surface electrode.

  The divided regions 4 and 5 for dividing the light emitting element portion 2 are secured between the simultaneously formed light emitting element portions 2, but the width β of the horizontal divided region is larger than the width α of the vertical divided region 4. The widths of the divided regions 4 and 5 are appropriately adjusted so as to be narrowed.

<Wafer division process>
The wafer dividing process S2 shown in FIG. 2 is a process of dividing the semiconductor wafer 100 manufactured in the wafer manufacturing process S1. Here, with reference to FIG. 9, the detailed procedure of wafer division | segmentation process S2 in this embodiment is demonstrated.

As shown in FIG. 9, the wafer dividing step S2 (see FIG. 2) includes a main surface split groove forming step S10, a substrate back surface polishing step S11, a first sheet bonding step S12, and an internal cut groove forming step S13. The second sheet bonding step S14, the breaking step S15, and the sheet peeling step S16 are included.
Subsequently, the wafer dividing step S2 (see FIG. 2) will be described in detail with reference to FIGS. 10A to 10F (see FIG. 9 as appropriate).

  As shown in FIG. 10A (a) and FIG. 10A (b), the main surface breaking groove forming step S10 is a divided region on the main surface 1a side of the sapphire substrate 1, which is a surface on which the semiconductor layers 20 of the semiconductor wafer 100 are laminated. 4 and 5 (refer to FIG. 1 (a)) is a step of forming the main surface split groove 6 within. In the present embodiment, the main surface cutting groove 6 exposes the sapphire substrate 1 as shown in FIG. 10A (a) and the step of exposing the n-type semiconductor layer 23 and as shown in FIG. 10A (b). It consists of a two-stage process.

  10A (a) and 10A (b) show how the vertical division region 4 is formed, but the horizontal division region 5 (see FIG. 1 (a)) also has a width of This is the same except that it is narrower than the width of the vertical division region 4. Further, the same applies to FIGS. 10A (c) to 10F unless otherwise specified. Furthermore, in FIG. 10A to FIG. 10F, illustration of the detailed configuration of the n-side electrode 21, the p-side electrode 22 (see FIG. 4), and the semiconductor layer 20 is omitted as appropriate.

  In the first step shown in FIG. 10A (a), the n-type semiconductor layer 23 is exposed along the vertical division region 4. The bottom surface 6 a of the main surface breaking groove 6 formed in the first step is an exposed surface of the n-type semiconductor layer 23. Thus, when the semiconductor wafer 100 is cleaved, it is possible to prevent cracks from reaching the active layer 24, and the light emitting element 3 (see FIG. 1B) can be formed into chips with stable quality.

  The first step of the main surface breaking groove forming step S10 is an n-type semiconductor layer 23 for forming the n-side electrode 21 (see FIG. 1A) in the wafer manufacturing step S1 (see FIG. 2). It is possible to carry out simultaneously by exposing the vertical division region 4 in the etching process for exposing the film. The same applies to the horizontal division region 5 (see FIG. 1A).

In the second stage process shown in FIG. 10A (b), the sapphire substrate 1 is exposed along the vertical division region 4 within the range of the vertical division region 4. The second-stage bottom surface 6 b of the main surface breaking groove 6 formed in the second step is an exposed surface of the sapphire substrate 1. At this time, it is preferable to expose the sapphire substrate 1 in a region including at least the line position of the cleaving position 43 in a plan view, and the sapphire substrate 1 in a region including the line position of the cleaving start point 42 and the line position of the cleaving position 43. More preferably, it is exposed.
Accordingly, when the semiconductor wafer 100 is cleaved, it is possible to prevent a crack from reaching the semiconductor layer 20, and the light emitting element 3 (FIG. 1B) with more stable quality than when the n-type semiconductor layer 23 is exposed. )) Can be chipped.

In the second step of the main surface split groove forming step S10, following the first step, the areas other than the formation region of the second main face split groove 6 are masked and etched by photolithography. The surface cutting groove 6 can be formed.
The formation of the main surface breaking groove 6 is not limited to two steps, and is a process other than the etching process for forming the n-side electrode 21 (see FIG. 4) except for the divided regions 4 and 5. And the sapphire substrate 1 may be exposed by an etching method.

In addition, the main surface cutting groove 6 is not limited to the formation by an etching method, and may be formed using a dicer or a scriber.
Further, the main surface breaking groove 6 may be formed by performing only the process of exposing the n-type semiconductor layer 23 which is the first-stage process described above.

The substrate back surface polishing step S11 is a step of polishing the back surface 1b of the sapphire substrate 1 until a predetermined thickness is reached, as shown in FIG. 10A (c). The thickness of the sapphire substrate 1 can be appropriately determined from the light extraction efficiency and the time required for processing in the wafer dividing step S2 (see FIG. 2), and can be, for example, about 160 to 240 μm.
In addition, when the thickness of the sapphire substrate 1 used in the wafer manufacturing process S1 (see FIG. 2) is a predetermined thickness, the substrate back surface polishing process S11 may be omitted.

  The first sheet bonding step S12 is a step of bonding the first sheet 36 to the surface of the semiconductor wafer 100 on which the semiconductor layer 20 is laminated, as shown in FIG. 10B (a). The first sheet 36 protects the semiconductor layer 20 from the impact of breaking in the breaking step S15 and holds the semiconductor wafer 100 so that the cleaved semiconductor wafer 100 does not fall apart during the breaking step S15. It is an adhesive sheet.

  As the first sheet 36, for example, a UV sheet in which a UV (ultraviolet) curable adhesive layer is provided on a polyolefin base having a thickness of about 100 μm can be used. For example, a UV sheet manufactured by Nitto Denko Corporation UE111-AJ can be mentioned.

Such a UV sheet holds and protects the semiconductor wafer 100 by bonding the base material of the sheet and the semiconductor wafer 100 with an adhesive layer. Then, after the breaking step S15 is completed, the UV sheet is irradiated with ultraviolet rays, whereby the pressure-sensitive adhesive layer is cured and the adhesiveness is lost. Therefore, it is possible to easily peel the sheet and take out the cleaved chip.
The first sheet 36 may be a thermosetting sheet or the like in addition to the UV curable UV sheet.

  Moreover, it is preferable that the 1st sheet | seat 36 has a softness | flexibility. By sandwiching both surfaces of the semiconductor wafer 100 with a flexible sheet together with a second sheet 37 (see FIG. 10D (a)) to be described later, even if a heavy load impact is applied by the blade 35 in the breaking step S15, the sheet is divided. It is possible to prevent chip floating, chip flying, and sheet tearing.

  As shown in FIG. 10B (b) to FIG. 10B (d), the internal cleaving groove forming step S13 includes lasers along the cleaving start point 42 of the vertical division region 4 and the cleaving start point 51 (see FIG. 4) of the horizontal division region 5. This is a step of forming the internal cleavage groove 7 in the sapphire substrate 1 by irradiation with light 30.

As shown in FIG. 10B (b), the laser beam 30 is condensed by the condenser lens 31 and irradiated from the back surface 1 b side of the sapphire substrate 1 so that the condensing point 30 a is located inside the sapphire substrate 1. Here, the condensing point 30a of the laser beam 30 is set to a predetermined distance γ ₁ from the semiconductor layer 20 in the thickness direction of the sapphire substrate 1 so that the semiconductor layer 20 is not affected by the irradiation of the laser beam 30. Set the position apart. Then, the laser beam 30 is sequentially applied to each of the divided regions 4 and 5 along the line position of the breaking start point 42 of the vertical divided region 4 and the line position of the breaking start point 51 of the horizontal divided region 5 shown in FIG. Scan.

  For scanning with the laser beam 30, the semiconductor wafer 100 is placed on, for example, an XY stage, and the semiconductor wafer 100 in the X direction (the horizontal direction in the main surface of the sapphire substrate 1) or the Y direction (the same vertical direction). It can be done by moving. Further, the laser beam 30 may be moved while the semiconductor wafer 100 is fixed.

Here, the irradiation of one laser beam 30, the height of the internal Waridanmizo 7 ₁ in the thickness direction is formed in the interior of the sapphire substrate 1 depends on the output of the laser beam 30, about 20~40μm It is preferable that Thereby, the influence on the semiconductor layer 20 can be reduced without dissolving or altering the sapphire substrate 1 more than necessary.

Then, as shown in FIG. 10B (c), the position of the condensing lens 31 is adjusted, and the position of the condensing point 30a of the laser beam 30 is set to the back surface 1b in the thickness direction of the sapphire substrate 1, for example, by 20 μm. Set to shift to the side. By irradiating the second laser beam, so as to laminate the end of the inner Waridanmizo 7 ₁ of the rear surface 1b side by the laser beam irradiation of the first, inner Waridanmizo 7 ₂ is formed.

By repeating this laser beam scanning a plurality of stages, the internal cleaving groove 7 can be formed in a predetermined thickness range of the sapphire substrate 1 as shown in FIG. 10B (d).
For example, if the thickness of the sapphire substrate 1 is 240 μm, the height of the internal cleavage grooves 7 ₁ and 7 ₂ formed by one laser light irradiation is 20 μm, the distance γ ₁ is 70 μm, and the distance γ ₂ is 10 μm, The height of the internal breaking groove 7 to be formed is 160 μm. Therefore, the internal cleaving groove 7 can be formed by performing laser light irradiation in 8 stages.
In this way, by performing laser light irradiation in multiple stages while shifting the position of the condensing point 30a in the thickness direction, the internal cleaving groove 7 having an appropriate height is formed even in the thick sapphire substrate 1. be able to.

  In addition, the position of the condensing point 30a fixes the position of the condensing lens 31, for example, the semiconductor wafer 100 is mounted in an XYZ stage, and the semiconductor wafer 100 is made into a Z direction (thickness direction of the sapphire substrate 1). You may make it shift.

  Here, with reference to FIG. 10C, the internal cleaving groove 7 formed along the line position of the cleaving start point 42 of the vertical division region 4 will be described in detail. FIG. 10C is a cross-sectional view taken along a plane perpendicular to the extending direction of the internal cleaving groove 7 formed along the line position of the cleaving start point 42 of the vertical division region 4, that is, a plane parallel to the A plane.

  As shown in FIG. 10C (a) (see also FIG. 10B (d)), the internal cutting groove 7 is formed in a flat strip shape inside the sapphire substrate 1 in each vertical division region 4. At this time, the semiconductor wafer 100 is cleaved along the planned dividing line 8 as shown in FIG. 10C (b). That is, in the thickness direction of the sapphire substrate 1, the portion where the internal cleaving groove 7 is formed is cleaved substantially perpendicular to the main surface 1a, and the other portions are cleaved obliquely.

  Therefore, considering the oblique cracking in the main surface 1a of the sapphire substrate 1 from the end portion of the internal cleaving groove 7 on the semiconductor layer 20 side (the lower end portion in FIG. 10C (b)), the cleaving starting point 42 is the vertically divided region 4. The center line 41 in the width direction is set at a position shifted to the right. If the direction of diagonal cracking is opposite, the setting is shifted to the left.

  In the example shown in FIG. 10C (b), the line position of the cleaving start point 42 and the line position of the cleaving position 43 are set to be symmetrical with respect to the center line 41 in plan view. It is not limited to this. However, it is preferable to set the cleaving start point 42 so that the cleaving position 43 is located in the bottom surface 6b that is the exposed surface of the sapphire substrate 1 of the main surface cleaving groove 6. Thereby, it is possible to reduce the influence such as cracking on the semiconductor layer 20 due to the cleaving. The line position of the cleaving start point 42 is preferably located in the vertical division region 4. Thereby, it is possible to reduce the influence of alteration of the semiconductor layer 20 due to laser light irradiation.

Here, the direction of oblique cracking of the sapphire substrate 1 in the vertical division region 4 will be described with reference to FIGS. 5 and 6.
When the semiconductor wafer 100 is divided, as shown in FIG. 5B and FIG. 6B, the thickness direction of the semiconductor wafer 100 is broken obliquely in a sectional view from the cleaving start point 42 of the vertical division region 4. . In the oblique direction, in the sapphire substrate 1 having the C surface as the main surface 1a and the orientation flat 1c (see FIG. 1) as the A surface, when the orientation flat 1c is the front surface, Is the “right slant” (see FIG. 6B), and “the slant left” (see FIG. 5B) is the case where the inclined surface faces the top right.

This oblique direction can be confirmed by trial splitting of the sapphire substrate 1. Moreover, it can also confirm with the direction of the acute angle of the polygon of the top part 11a in the convex part 11 formed on the above-mentioned sapphire substrate 1. FIG. The relationship between the direction of the acute angle of the polygon of the top portion 11a in the convex portion 11 and the oblique direction in the crack will be described with reference to FIGS.
As shown in FIGS. 5 (a) and 6 (a), the convex portion 11 has the same top shape in the plan view in all the convex portions 11, and the acute angle of the polygon (triangle) of the top portion 11a is the same. They are facing the same direction.

  For example, when one of the polygonal acute angles of the top portion 11a is facing left in plan view as shown in FIG. 5A when the orientation flat surface is facing forward, FIG. As shown in FIG. 6 (b), when a crack occurs obliquely to the left and one of the polygonal acute angles of the top portion 11a faces right as seen in plan view, as shown in FIG. 6 (a). As shown in the figure, cracks occur on the right. If the relationship between the direction of the acute angle of the polygon of the top part 11a and the oblique direction in the crack is confirmed in advance, the line position of the breaking start point 42 is determined by the direction of the acute angle of the polygon of the top part 11a. Therefore, the line position can be easily determined. Furthermore, as shown in FIG. 4, when the n-side electrode 21 is arranged only on the side close to the line position of the cleaving start point 42 in the vertically divided regions 4 on both sides of the light emitting element portion 2. The arrangement of the n-side electrode 21 can be determined by the direction of the acute angle of the polygon of the top portion 11a. The relationship between the direction of the acute angle of the polygon of the top portion 11a in the convex portion 11 and the oblique direction in the crack can be confirmed in advance by the board manufacturer.

  And, as shown in FIGS. 5A and 5B, when one of the acute angles of the polygonal top portion 11a is in the horizontal direction of the vertical and horizontal directions, that is, when facing the left side with the orientation flat surface facing forward, Since the cracks occur diagonally to the left, the line position of the breaking start point 42 is shifted to the right side of the center line 41, and when facing the right side as shown in FIGS. Since cracking occurs, the line position of the cleaving start point 42 is shifted to the left side of the center line 41. Thus, the line position of the cleaving start point 42 can be determined on either the left or right side of the center line 41 in accordance with the acute angle direction of the polygonal top portion 11a.

In addition, when cleaving along the line position of the cleaving start point 51 (see FIG. 1A) of the laterally divided region 5, it can be divided substantially perpendicular to the main surface 1 a of the sapphire substrate 1. For this reason, the line position of the cleaving start point 51 (see FIG. 1A) of the horizontal division region 5 is set to the approximate center in the width direction of the horizontal division region 5 (see FIG. 1A), and the cleaving start point 51 ( The internal cleaving groove 7 is formed along the line position in FIG.
In the thickness direction of the sapphire substrate 1, the distance γ ₁ and the distance γ ₂ indicating the formation range of the internal cleavage groove 7 are the same as those of the internal cleavage groove 7 formed in the vertical division region 4.

  In addition, since the sapphire substrate 1 has no splitting property for the laterally divided region 5 (see FIG. 1A) and does not inadvertently break during the operation of the process, before the vertically divided region 4, It is preferable to form the internal cutting groove 7 in the laterally divided region 5 (see FIG. 1A).

  The second sheet bonding step S14 is for protecting the sapphire substrate 1 from impact in the breaking step S15 on the back surface side of the semiconductor wafer 100, that is, the back surface 1b of the sapphire substrate 1, as shown in FIG. 10D (a). This is a process for bonding the second sheet 37.

  As the second sheet 37, a UV sheet similar to the first sheet 36 can be used. The second sheet 37 may not be sticky, and for example, a separator such as PET (polyethylene terephthalate) having a thickness of about 30 μm can be used.

  In the breaking step S15, as shown in FIG. 10D (b), an impact is applied to the semiconductor wafer 100 with the blade 35, and the individual light emitting elements 3 (FIG. 1 (b) along the main surface breaking groove 6 and the inner breaking groove 7 are applied. This is a step of dividing into chips).

  In the present embodiment, as shown in FIG. 10D (b), the line position of the cleaving start point 42 of the semiconductor wafer 100 is substantially centered in plan view with the side of the semiconductor wafer 100 on which the semiconductor layer 20 is laminated facing downward. Thus, 00 is sandwiched between the upper receiving block 32 and the lower receiving block 33 on the semiconductor. Then, using the blade 35, an impact is applied to the end portion of the light emitting element 3 protruding from the upper receiving block 32 and the lower receiving block 33 from the back surface 1 b side of the sapphire substrate 1 through the second sheet 37. As a result, a large force acts on the internal cleaving groove 7 sandwiched between the upper receiving block 32 and the lower receiving block 33 by the lever principle with the side on the blade 35 side of the upper surface of the lower receiving block 33 as a fulcrum 33a. The sapphire substrate 1 is cleaved along the division line 8. This breaking method by applying an impact is a method particularly suitable for cleaving a substrate having no cleaveability and high hardness like the sapphire substrate 1.

  In addition, it is preferable that the shape and magnitude | size of the surface which pinches | interposes the semiconductor wafer 100 of the upper receiving block 32 and the lower receiving block 33 are the same. Further, it is preferable that the width of this surface is sandwiched to about half of the width of the light emitting element 3 on both the left and right sides of the line position of the split starting point 42 in the sectional view shown in FIG. 10D (b). Further, the length of the upper receiving block 32, the lower receiving block 33, and the blade 35 in the depth direction of the paper surface in FIG. 10D (b) is the length of the semiconductor wafer 100 in the depth direction (in the case of a circle in plan view, It is preferable that the length is equal to or longer than the diameter.

  As the upper receiving block 32 and the lower receiving block 33, for example, ceramic or SUS (stainless steel) blocks can be used.

  In the breaking step S15, first, the plurality of vertical division regions 4 in the vertical direction are sequentially divided from either the left or right end, and then the plurality of horizontal division regions 5 are sequentially divided from either the upper or lower end. To do. Note that the horizontal division region 5 may be divided first.

  As for the horizontal division, the line position of the cleaving start point 51 is sandwiched between the upper receiving block 32 and the lower receiving block 33 so that the line position of the cleaving starting point 51 to be cleaved is substantially the center. Then, the edge of the cleaved semiconductor wafer 100 is cleaved by applying an impact using the blade 35.

  Thus, in the breaking step S15, when the cleaving is finished for all the divided regions 4 and 5 (see FIG. 1A), as shown in FIG. 10E (a), the first sheet 36 (and the second sheet 37). ), The light-emitting element 3 is divided into individual chips.

The sheet peeling step S16 is a step of peeling the first sheet 36 and the second sheet 37 holding the divided light emitting elements 3 and taking out the light emitting elements 3 as individual chips.
When UV sheets are used as the first sheet 36 and the second sheet 37, the first sheet 36 and the second sheet 37 are irradiated with ultraviolet rays to cure the pressure-sensitive adhesive layer. Thereby, the adhesiveness of the pressure-sensitive adhesive layer is lost, and it can be easily peeled from the semiconductor wafer 100 as shown in FIG. 10E (b). And the chip | tip of each light emitting element 3 divided | segmented along the division | segmentation planned line 8 can be taken out.

<Modification of the breaking process>
Next, a modified example of the breaking step S15 will be described with reference to FIG. 10F.
In the modification shown in FIG. 10F, two blocks 34 are installed on the lower side of the semiconductor wafer 100 with the side of the semiconductor wafer 100 on which the semiconductor layers 20 are laminated facing downward. The two blocks 34 are arranged at a distance of about half the chip width of the light emitting element 3 on the left and right sides with the line position of the cleaving start point 42 to be cleaved as the center. Then, a load is applied to the line position of the cleaving start point 42 via the second sheet 37 from the back surface of the semiconductor wafer 100, that is, the back surface 1 b side of the sapphire substrate 1 using the blade 35 </ b> A. Thereby, a force acts on the internal cleaving groove 7 to be cleaved, the side near the line position of the cleaving start point 42 on the upper surface of the two blocks 34 is bent as a fulcrum 34 a, and the sapphire substrate 1 is along the scheduled dividing line 8. It is cleaved. That is, it is a breaking method by a three-point support method.

  In addition, as the block 34 of this modification, the block similar to the upper receiving block 32 and the lower receiving block 33 in embodiment shown to FIG. 10D (b) can be used.

As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, It can change in the range which does not deviate from the meaning of this invention.
For example, as another embodiment, the present invention can be applied to a semiconductor wafer having a light emitting element portion that is square.

<Other embodiments>
In another embodiment, a method of manufacturing a light-emitting device includes cutting a semiconductor wafer in which a GaN-based semiconductor is stacked on a sapphire substrate having a C-plane as a main surface, and a plurality of square light-emitting device portions are aligned in the vertical and horizontal directions. A starting point is provided on the back side of a sapphire substrate, and a light emitting device is manufactured by dividing the sapphire substrate, and includes a wafer manufacturing process and a wafer dividing process.

  As shown in FIG. 11, the semiconductor wafer 100 </ b> A is arranged on a sapphire substrate along a direction parallel to a plurality of square light emitting element portions 2 </ b> A aligned in the vertical and horizontal directions and the A surface of the sapphire substrate. A horizontal division region 5 to be divided and a vertical division region 4 to be divided along a direction perpendicular to the A plane are provided.

Here, three n-side electrodes 21A of the light emitting element portion 2A are provided on the vertical division region 4 side, respectively. However, the n-side electrode 21A of the light emitting element portion 2A only needs to be disposed on at least one side of the vertical division region 4 side. In the case where the n-side electrode 21A is disposed only on one side, the cleavage starting point 42 obtained by shifting a predetermined distance from the center line 41 in the width direction of the vertical division region 4 to one side in the width direction among the vertical division regions 4 on both sides. It is preferable to arrange only on the side close to the line position.
In addition, the wafer manufacturing process and the wafer splitting process are the same as the above-described light emitting element manufacturing method.

<Others>
The number of the n-side electrodes 21 and 21A of the light emitting element portions 2 and 2A is not particularly limited, and may be one or may be two or more.
Furthermore, in carrying out the present invention, steps other than the steps described above may be included between or before and after each step within a range that does not adversely affect each step. For example, a substrate cleaning process for cleaning the sapphire substrate, an unnecessary object removing process for removing unnecessary substances such as dust, a finishing process for polishing a cut surface of the light emitting element, and the like may be included.

  Next, a light emitting device manufactured by the manufacturing method of the embodiment of the present invention and a manufacturing method thereof will be described.

  First, for a semiconductor wafer in which a GaN-based semiconductor layer including an active layer and an n-side electrode and a p-side electrode are formed on a sapphire substrate, the back surface of the sapphire substrate is polished so that the thickness of the substrate becomes 85 to 240 μm. . In addition, the dice size (chip size) of the light emitting element part is produced in three types shown in Table 2. The sizes in plan view are 230 μm × 230 μm for size 1, 500 μm × 290 μm for size 2, and 750 μm × 550 μm for size 3.

  Next, a UV sheet (UE111-AJ manufactured by Nitto Denko Corporation) is bonded to the surface on which the semiconductor layers are laminated.

  Next, the surface of the semiconductor wafer on which the UV sheet is bonded is placed on the stealth laser processing apparatus downward, and a femtosecond laser is irradiated from the back side of the sapphire substrate to form a cleaving groove inside the sapphire substrate. According to the die size (chip) size and the thickness of the sapphire substrate, laser light irradiation is performed with the number of steps described in the leftmost column of Table 2. The irradiation position of the first stage is a position 70 μm away from the surface on which the semiconductor layers of the sapphire substrate are laminated, and the height of the cleaving groove per stage in the thickness direction of the substrate is 20 μm.

  After forming the cleaving groove by stealth laser processing, a UV sheet is bonded to the back side of the sapphire substrate, and the chip is divided into chips by the impact method breaking method shown in FIG. 10D (b).

  The UV sheet is peeled off, and the individually divided chips are mounted on a lead frame and sealed with resin to produce an LED (light emitting diode).

  About the produced LED, the light emission output is measured, and the output ratio at each thickness when the light emission output when the thickness of the sapphire substrate is 85 μm for each size is 100 [%] is calculated. The results are shown in Table 2. Further, for each size, the relationship between the thickness of the sapphire substrate and the output ratio is shown in FIG.

  As shown in Table 2 and FIG. 12, a high output can be obtained when the thickness of the sapphire substrate is 140 μm or more, and a particularly high output can be obtained when the thickness is 160 μm to 180 μm.

1 Sapphire substrate 1a Main surface 1b Back surface 1c Orientation flat (orientation flat)
2, 2A Light emitting element part 3 Light emitting element (semiconductor chip)
DESCRIPTION OF SYMBOLS 4 Vertical division | segmentation area | region 5 Horizontal division | segmentation area | region 6 Main surface cleaving groove 6a 1st bottom face 6b 2nd bottom face 7 Internal cleaving groove 8 Divided dividing line 10 Sapphire crystal 11 Convex part 11a Top part 20 Semiconductor layer (nitride semiconductor layer)
21 n-side electrode 22 p-side electrode 23 n-type semiconductor layer (n-type nitride semiconductor layer)
24 active layer 25 p-type semiconductor layer (p-type nitride semiconductor layer)
26 Active layer region 30 Laser light 30a Condensing point 31 Condensing lens 32 Upper receiving block (block)
33 Lower receiving block (block)
34 Receiving block (block)
35, 35A Blade 36 First sheet 37 Second sheet 41 Center line 42, 51 Split starting point 43 Split position 100, 100A Semiconductor wafer

Claims (11)

An n-type nitride semiconductor layer and a p-type nitride semiconductor layer are stacked in this order on a sapphire substrate having a C-plane as a main surface, and a plurality of rectangular light emitting element portions are arranged in vertical and horizontal directions, The width of the laterally divided region that is divided along the direction parallel to the line of intersection between the A surface of the sapphire substrate and the main surface is a length that is divided along the direction perpendicular to the line of intersection between the A surface and the main surface. A method of manufacturing a light-emitting element that is smaller than a width of a divided region and divides a semiconductor wafer in which an n-side electrode of the light-emitting element unit is disposed on at least one side of the vertical divided region side to form a light-emitting element,
A wafer manufacturing process for manufacturing the semiconductor wafer;
A wafer dividing step of dividing the manufactured semiconductor wafer,
In the wafer dividing step,
By irradiating the inside of the sapphire substrate with a converging point of the laser light and performing a stealth laser processing to form a dissolved region or an altered region inside the sapphire substrate by multiphoton absorption, the width direction of the longitudinally divided region is increased. At the line position shifted by a predetermined distance from the center line to one side in the width direction, the strip-shaped melted region extending in the extending direction of the longitudinally divided region and having a predetermined height in the thickness direction of the sapphire substrate or Forming the altered region as an internal cleavage groove;
A method of manufacturing a light emitting device, wherein the semiconductor wafer is divided using the internal cleaving groove as a cleaving starting point.   A plurality of protrusions are formed on the sapphire substrate, and in all the protrusions, the tops of the protrusions are polygons having the same shape and facing the same direction in plan view, and the polygon When the acute angle in the horizontal and vertical direction is directed to the left side, the line position is shifted to the right side of the center line.When the acute angle is directed to the right side, the line position is set to the left side of the center line. The method of manufacturing a light emitting element according to claim 1, wherein shifting is performed.   The n-side electrode of the light emitting element portion is disposed on the side where at least the n-side electrode is close to the line position in the vertically divided regions on both sides. The manufacturing method of the light emitting element of description.   4. The light emitting device according to claim 1, wherein the light emitting element portion is rectangular in a plan view, and a short side of the rectangle is formed in parallel with the vertical division region. 5. Device manufacturing method. The laser beam irradiation is incident from the back side of the sapphire substrate,
5. The light emitting device according to claim 1, wherein the internal cleaving groove is formed at a position separated by 70 μm or more from the main surface in the thickness direction of the sapphire substrate. Production method.   2. The internal cleaving groove is formed by sequentially irradiating the laser light by shifting the position of the condensing point of the laser light in the thickness direction of the sapphire substrate in a plurality of stages. The manufacturing method of the light emitting element as described in any one of Claims 5. The sapphire substrate when the n-type nitride semiconductor layer and the p-type nitride semiconductor layer are divided from the cleavage starting point in plan view on the main surface side of the vertical division region and the horizontal division region of the semiconductor wafer 7. The light emitting device according to claim 1, wherein a main surface cleaving groove that is a cleaving groove in which the sapphire substrate is exposed is formed in a region including a cleaving position on the main surface. Device manufacturing method. Along the extending direction of the internal cleaving groove, the upper and lower sides of the semiconductor wafer are sandwiched between blocks, and on the back surface side of the sapphire substrate protruding from the block, the extending direction of the internal cleaving groove and In the breaking step of cleaving the semiconductor wafer by applying an impact using a blade extending in parallel,
In the block, in the width direction that is in a plane parallel to the main surface of the sapphire substrate and perpendicular to the extending direction, the line position of the internal cleaving groove is centered in plan view. The method for manufacturing a light-emitting element according to claim 1, wherein the semiconductor wafer is sandwiched.   The two blocks extending parallel to the extending direction of the internal cleaving groove are arranged apart from each other, and the main surface side of the sapphire substrate is directed downward, and the line position of the internal cleaving groove is set to the two blocks. The semiconductor wafer is placed on the two blocks so as to be in the center of the separated space, and at the line position of the internal cutting groove, a load is applied by using a blade from the back side of the sapphire substrate. 8. The method for manufacturing a light emitting element according to claim 1, wherein the semiconductor wafer is divided.   The method for manufacturing a light-emitting element according to claim 8 or 9, wherein a flexible sheet is bonded to both surfaces of the semiconductor wafer, and then division using the blade is performed.   The method of manufacturing a light emitting device according to claim 1, wherein the sapphire substrate has a thickness of 160 μm or more.

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