JP5571306B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5571306B2 JP5571306B2 JP2008321295A JP2008321295A JP5571306B2 JP 5571306 B2 JP5571306 B2 JP 5571306B2 JP 2008321295 A JP2008321295 A JP 2008321295A JP 2008321295 A JP2008321295 A JP 2008321295A JP 5571306 B2 JP5571306 B2 JP 5571306B2
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- 239000004065 semiconductor Substances 0.000 title claims description 208
- 239000000758 substrate Substances 0.000 claims description 52
- 230000007480 spreading Effects 0.000 claims description 9
- 238000003892 spreading Methods 0.000 claims description 9
- 239000010410 layer Substances 0.000 description 34
- 238000000034 method Methods 0.000 description 13
- 230000015556 catabolic process Effects 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000002093 peripheral effect Effects 0.000 description 7
- 239000012535 impurity Substances 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
Description
上記のように、本発明は実施の形態によって記載したが、この開示の一部をなす論述及び図面はこの発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例及び運用技術が明らかとなろう。
10…半導体基板
21〜23…半導体領域
31〜3n…半導体領域
41…ソース領域
42…ドレイン領域
43…ベース領域
45…コンタクト領域
51…ゲート絶縁膜
52…層間絶縁膜
100…ドリフト領域
101…第1の主面
102…第2の主面
300…半導体領域
310…溝
410…ソース電極層
420…ドレイン電極層
430…ゲート電極層
435…周辺部
Claims (9)
- 第1の主面を有する第1導電型の半導体基板であって、前記半導体基板内に形成された溝を有する半導体基板と、
前記第1の主面上に形成された第2導電型のベース領域と、
その上端で前記ベース領域に接し、一定の間隔で互いに離間して前記第1の主面の広がり方向に平行な方向にそれぞれ延伸し、且つ前記第1の主面の前記広がり方向に垂直な方向に延伸して前記半導体基板内に形成された複数の溝に、それぞれ埋め込まれた第2導電型の複数の半導体領域と、
前記複数の半導体領域と前記複数の半導体領域間の前記半導体基板とを含むドリフト領域と
を備え、前記半導体基板と前記複数の半導体領域によりそれぞれ形成される複数のpn接合から前記第1の主面の前記広がり方向に平行な方向に延びる空乏層によって前記ドリフト領域が空乏化されるとともに、
前記第2導電型の半導体領域が延伸する前記第1の主面の前記広がり方向に平行な方向は、少なくとも第1の方向と、前記第1の方向に直交する第2の方向とを含み、
前記複数の半導体領域のうちの少なくとも1つは、前記第1の方向に延伸して形成され、残りの前記半導体領域のうちの少なくとも1つは、前記第2の方向に延伸して形成され、
前記複数の半導体領域のそれぞれの幅は、すべて一定であるとともに、同一の方向に延伸して形成された前記半導体領域同士の間隔と、前記第1の方向に延伸して形成された前記半導体領域と前記第2の方向に延伸して形成された前記半導体領域との間隔は、すべて一定であることを特徴とする半導体装置。 - 前記半導体基板の前記第1の主面上に配置された第1の主電極と、
前記半導体基板の第2の主面上に配置された第2の主電極と
を更に備え、前記半導体基板を介して前記第1の主電極と前記第2の主電極間に主電流が流れることを特徴とする請求項1に記載の半導体装置。 - 前記複数の半導体領域が、エピタキシャル成長により前記溝内に形成されることを特徴とする請求項1又は2に記載の半導体装置。
- 前記複数の半導体領域のそれぞれの幅と、前記複数の半導体領域間に配置された領域の前記半導体基板の幅が同一であることを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。
- 前記溝の深さが20μm以上であることを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。
- 前記第1の主面の前記広がり方向に平行な前記複数の半導体領域間の距離が10μm以下であることを特徴とする請求項1乃至5のいずれか1項に記載の半導体装置。
- 前記半導体領域は、前記一定の間隔で互いに離間して前記第1の方向にストライプ状に複数形成される請求項1に記載の半導体装置。
- 前記半導体領域は、更に、前記第2の方向にもストライプ状に複数形成される請求項7に記載の半導体装置。
- 前記第1の方向に延伸する前記ストライプの短手端と、前記第2の方向に延伸する前記ストライプの長手端とは面一とされる請求項8に記載の半導体装置。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008321295A JP5571306B2 (ja) | 2008-12-17 | 2008-12-17 | 半導体装置 |
US13/140,316 US9231099B2 (en) | 2008-12-17 | 2009-11-27 | Semiconductor power MOSFET device having a super-junction drift region |
CN200980151001.3A CN102257620B (zh) | 2008-12-17 | 2009-11-27 | 半导体装置 |
PCT/JP2009/070015 WO2010071015A1 (ja) | 2008-12-17 | 2009-11-27 | 半導体装置 |
EP09833319A EP2378558A1 (en) | 2008-12-17 | 2009-11-27 | Semiconductor device |
US14/987,729 US9640612B2 (en) | 2008-12-17 | 2016-01-04 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008321295A JP5571306B2 (ja) | 2008-12-17 | 2008-12-17 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010147176A JP2010147176A (ja) | 2010-07-01 |
JP5571306B2 true JP5571306B2 (ja) | 2014-08-13 |
Family
ID=42268688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008321295A Expired - Fee Related JP5571306B2 (ja) | 2008-12-17 | 2008-12-17 | 半導体装置 |
Country Status (5)
Country | Link |
---|---|
US (2) | US9231099B2 (ja) |
EP (1) | EP2378558A1 (ja) |
JP (1) | JP5571306B2 (ja) |
CN (1) | CN102257620B (ja) |
WO (1) | WO2010071015A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201430957A (zh) * | 2013-01-25 | 2014-08-01 | Anpec Electronics Corp | 半導體功率元件的製作方法 |
DE102013112887B4 (de) * | 2013-11-21 | 2020-07-09 | Infineon Technologies Ag | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
US9443758B2 (en) | 2013-12-11 | 2016-09-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Connecting techniques for stacked CMOS devices |
US9515199B2 (en) * | 2015-01-02 | 2016-12-06 | Cree, Inc. | Power semiconductor devices having superjunction structures with implanted sidewalls |
US11075264B2 (en) | 2016-05-31 | 2021-07-27 | Cree, Inc. | Super junction power semiconductor devices formed via ion implantation channeling techniques and related methods |
US9929284B1 (en) | 2016-11-11 | 2018-03-27 | Cree, Inc. | Power schottky diodes having local current spreading layers and methods of forming such devices |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4447065B2 (ja) * | 1999-01-11 | 2010-04-07 | 富士電機システムズ株式会社 | 超接合半導体素子の製造方法 |
JP4774586B2 (ja) * | 1999-10-21 | 2011-09-14 | 富士電機株式会社 | 半導体素子の製造方法 |
US6475864B1 (en) * | 1999-10-21 | 2002-11-05 | Fuji Electric Co., Ltd. | Method of manufacturing a super-junction semiconductor device with an conductivity type layer |
DE10205345B9 (de) * | 2001-02-09 | 2007-12-20 | Fuji Electric Co., Ltd., Kawasaki | Halbleiterbauelement |
JP2003101022A (ja) * | 2001-09-27 | 2003-04-04 | Toshiba Corp | 電力用半導体素子 |
JP2003086800A (ja) * | 2001-09-12 | 2003-03-20 | Toshiba Corp | 半導体装置及びその製造方法 |
EP1267415A3 (en) | 2001-06-11 | 2009-04-15 | Kabushiki Kaisha Toshiba | Power semiconductor device having resurf layer |
DE10137676B4 (de) * | 2001-08-01 | 2007-08-23 | Infineon Technologies Ag | ZVS-Brückenschaltung zum entlasteten Schalten |
JP3908572B2 (ja) * | 2002-03-18 | 2007-04-25 | 株式会社東芝 | 半導体素子 |
JP2006005275A (ja) * | 2004-06-21 | 2006-01-05 | Toshiba Corp | 電力用半導体素子 |
JP4825424B2 (ja) | 2005-01-18 | 2011-11-30 | 株式会社東芝 | 電力用半導体装置 |
JP5369372B2 (ja) * | 2005-11-28 | 2013-12-18 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
US8106453B2 (en) | 2006-01-31 | 2012-01-31 | Denso Corporation | Semiconductor device having super junction structure |
JP5076335B2 (ja) * | 2006-03-09 | 2012-11-21 | 株式会社デンソー | 半導体装置およびスーパージャンクション構造を有する半導体基板の製造方法 |
US7595542B2 (en) * | 2006-03-13 | 2009-09-29 | Fairchild Semiconductor Corporation | Periphery design for charge balance power devices |
US7510938B2 (en) * | 2006-08-25 | 2009-03-31 | Freescale Semiconductor, Inc. | Semiconductor superjunction structure |
JP5228430B2 (ja) * | 2007-10-01 | 2013-07-03 | サンケン電気株式会社 | 半導体装置 |
-
2008
- 2008-12-17 JP JP2008321295A patent/JP5571306B2/ja not_active Expired - Fee Related
-
2009
- 2009-11-27 EP EP09833319A patent/EP2378558A1/en not_active Withdrawn
- 2009-11-27 US US13/140,316 patent/US9231099B2/en active Active
- 2009-11-27 CN CN200980151001.3A patent/CN102257620B/zh not_active Expired - Fee Related
- 2009-11-27 WO PCT/JP2009/070015 patent/WO2010071015A1/ja active Application Filing
-
2016
- 2016-01-04 US US14/987,729 patent/US9640612B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9640612B2 (en) | 2017-05-02 |
CN102257620B (zh) | 2015-06-03 |
US20110248335A1 (en) | 2011-10-13 |
US9231099B2 (en) | 2016-01-05 |
US20160141356A1 (en) | 2016-05-19 |
WO2010071015A1 (ja) | 2010-06-24 |
JP2010147176A (ja) | 2010-07-01 |
CN102257620A (zh) | 2011-11-23 |
EP2378558A1 (en) | 2011-10-19 |
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