JP5452983B2 - プロセスモニタ回路およびプロセス特性の判定方法 - Google Patents
プロセスモニタ回路およびプロセス特性の判定方法 Download PDFInfo
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- JP5452983B2 JP5452983B2 JP2009133970A JP2009133970A JP5452983B2 JP 5452983 B2 JP5452983 B2 JP 5452983B2 JP 2009133970 A JP2009133970 A JP 2009133970A JP 2009133970 A JP2009133970 A JP 2009133970A JP 5452983 B2 JP5452983 B2 JP 5452983B2
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- circuit
- signal
- transition
- inverter
- delay circuit
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- 238000000034 method Methods 0.000 title claims description 63
- 230000008569 process Effects 0.000 title claims description 50
- 230000007704 transition Effects 0.000 claims description 26
- 238000001514 detection method Methods 0.000 claims description 6
- 230000004044 response Effects 0.000 claims description 2
- MWPLVEDNUUSJAV-UHFFFAOYSA-N anthracene Chemical compound C1=CC=CC2=CC3=CC=CC=C3C=C21 MWPLVEDNUUSJAV-UHFFFAOYSA-N 0.000 description 10
- 230000003111 delayed effect Effects 0.000 description 8
- 101000596041 Homo sapiens Plastin-1 Proteins 0.000 description 7
- 102100035181 Plastin-1 Human genes 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
Images
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- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133970A JP5452983B2 (ja) | 2009-06-03 | 2009-06-03 | プロセスモニタ回路およびプロセス特性の判定方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133970A JP5452983B2 (ja) | 2009-06-03 | 2009-06-03 | プロセスモニタ回路およびプロセス特性の判定方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010283054A JP2010283054A (ja) | 2010-12-16 |
| JP2010283054A5 JP2010283054A5 (https=) | 2012-04-19 |
| JP5452983B2 true JP5452983B2 (ja) | 2014-03-26 |
Family
ID=43539570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009133970A Expired - Fee Related JP5452983B2 (ja) | 2009-06-03 | 2009-06-03 | プロセスモニタ回路およびプロセス特性の判定方法 |
Country Status (1)
| Country | Link |
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| JP (1) | JP5452983B2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5752577B2 (ja) | 2011-12-07 | 2015-07-22 | 株式会社東芝 | 半導体集積回路 |
| JP6545564B2 (ja) * | 2015-08-06 | 2019-07-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US10191106B2 (en) * | 2015-09-25 | 2019-01-29 | Qualcomm Incorporated | Techniques to identify a process corner |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02194372A (ja) * | 1989-01-24 | 1990-07-31 | Oki Electric Ind Co Ltd | 伝播遅延時間の測定方法 |
| US5068547A (en) * | 1990-09-05 | 1991-11-26 | Lsi Logic Corporation | Process monitor circuit |
| JP2001250916A (ja) * | 2000-03-03 | 2001-09-14 | Mitsubishi Electric Corp | 半導体集積回路 |
| JP2002359289A (ja) * | 2001-03-29 | 2002-12-13 | Mitsubishi Electric Corp | プロセスモニタ回路を備えた半導体装置、その試験方法、並びにその製造方法 |
| JP2003023055A (ja) * | 2001-07-10 | 2003-01-24 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JP2004158631A (ja) * | 2002-11-06 | 2004-06-03 | Nec Electronics Corp | 半導体装置 |
| JP4367225B2 (ja) * | 2004-05-11 | 2009-11-18 | ソニー株式会社 | 半導体集積回路 |
| JP2010278332A (ja) * | 2009-05-29 | 2010-12-09 | Renesas Electronics Corp | 半導体集積回路およびその動作方法 |
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2009
- 2009-06-03 JP JP2009133970A patent/JP5452983B2/ja not_active Expired - Fee Related
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| Publication number | Publication date |
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| JP2010283054A (ja) | 2010-12-16 |
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